| /external/vixl/test/aarch32/ |
| H A D | test-simulator-cond-rd-memop-immediate-512-a32.cc | 146 uint32_t memop[2]; member in struct:vixl::aarch32::__anon30039::Inputs
3338 #include "aarch32/traces/simulator-cond-rd-memop-immediate-512-ldrh-a32.h"
3339 #include "aarch32/traces/simulator-cond-rd-memop-immediate-512-ldrsb-a32.h"
3340 #include "aarch32/traces/simulator-cond-rd-memop-immediate-512-ldrsh-a32.h"
3341 #include "aarch32/traces/simulator-cond-rd-memop-immediate-512-strh-a32.h"
3349 const MemOperand& memop);
3390 MemOperand memop(rn, sign, offset, addr_mode);
3425 Register base_register = memop.GetBaseRegister();
3429 __ Ldr(memop_tmp, MemOperand(input_ptr, offsetof(Inputs, memop) + 4));
3435 if (!memop
3561 uint32_t memop[2] = {results[i]->outputs[j].memop[0], local
[all...] |
| H A D | test-simulator-cond-rd-memop-immediate-8192-a32.cc | 146 uint32_t memop[2]; member in struct:vixl::aarch32::__anon30040::Inputs
3338 #include "aarch32/traces/simulator-cond-rd-memop-immediate-8192-ldr-a32.h"
3339 #include "aarch32/traces/simulator-cond-rd-memop-immediate-8192-ldrb-a32.h"
3340 #include "aarch32/traces/simulator-cond-rd-memop-immediate-8192-str-a32.h"
3341 #include "aarch32/traces/simulator-cond-rd-memop-immediate-8192-strb-a32.h"
3349 const MemOperand& memop);
3390 MemOperand memop(rn, sign, offset, addr_mode);
3425 Register base_register = memop.GetBaseRegister();
3429 __ Ldr(memop_tmp, MemOperand(input_ptr, offsetof(Inputs, memop) + 4));
3435 if (!memop
3561 uint32_t memop[2] = {results[i]->outputs[j].memop[0], local
[all...] |
| H A D | test-simulator-cond-rd-memop-rs-a32.cc | 151 uint32_t memop[2]; member in struct:vixl::aarch32::__anon30041::Inputs
3345 #include "aarch32/traces/simulator-cond-rd-memop-rs-ldr-a32.h"
3346 #include "aarch32/traces/simulator-cond-rd-memop-rs-ldrb-a32.h"
3347 #include "aarch32/traces/simulator-cond-rd-memop-rs-ldrh-a32.h"
3348 #include "aarch32/traces/simulator-cond-rd-memop-rs-ldrsb-a32.h"
3349 #include "aarch32/traces/simulator-cond-rd-memop-rs-ldrsh-a32.h"
3350 #include "aarch32/traces/simulator-cond-rd-memop-rs-str-a32.h"
3351 #include "aarch32/traces/simulator-cond-rd-memop-rs-strb-a32.h"
3352 #include "aarch32/traces/simulator-cond-rd-memop-rs-strh-a32.h"
3360 const MemOperand& memop);
3578 uint32_t memop[2] = {results[i]->outputs[j].memop[0], local
[all...] |
| H A D | test-simulator-cond-rd-memop-rs-shift-amount-1to31-a32.cc | 149 uint32_t memop[2]; member in struct:vixl::aarch32::__anon30042::Inputs
3343 #include "aarch32/traces/simulator-cond-rd-memop-rs-shift-amount-1to31-ldr-a32.h"
3344 #include "aarch32/traces/simulator-cond-rd-memop-rs-shift-amount-1to31-ldrb-a32.h"
3345 #include "aarch32/traces/simulator-cond-rd-memop-rs-shift-amount-1to31-str-a32.h"
3346 #include "aarch32/traces/simulator-cond-rd-memop-rs-shift-amount-1to31-strb-a32.h"
3354 const MemOperand& memop);
3397 MemOperand memop(rn, sign, rm, shift, amount, addr_mode);
3434 Register base_register = memop.GetBaseRegister();
3438 __ Ldr(memop_tmp, MemOperand(input_ptr, offsetof(Inputs, memop) + 4));
3444 if (!memop
3574 uint32_t memop[2] = {results[i]->outputs[j].memop[0], local
[all...] |
| H A D | test-simulator-cond-rd-memop-rs-shift-amount-1to32-a32.cc | 149 uint32_t memop[2]; member in struct:vixl::aarch32::__anon30043::Inputs
3343 #include "aarch32/traces/simulator-cond-rd-memop-rs-shift-amount-1to32-ldr-a32.h"
3344 #include "aarch32/traces/simulator-cond-rd-memop-rs-shift-amount-1to32-ldrb-a32.h"
3345 #include "aarch32/traces/simulator-cond-rd-memop-rs-shift-amount-1to32-str-a32.h"
3346 #include "aarch32/traces/simulator-cond-rd-memop-rs-shift-amount-1to32-strb-a32.h"
3354 const MemOperand& memop);
3397 MemOperand memop(rn, sign, rm, shift, amount, addr_mode);
3434 Register base_register = memop.GetBaseRegister();
3438 __ Ldr(memop_tmp, MemOperand(input_ptr, offsetof(Inputs, memop) + 4));
3444 if (!memop
3574 uint32_t memop[2] = {results[i]->outputs[j].memop[0], local
[all...] |
| /external/vixl/src/aarch64/ |
| H A D | assembler-aarch64.cc | 978 Instr memop = op | Rt(rt) | Rt2(rt2) | RnSP(addr.GetBaseRegister()) | local
993 Emit(addrmodeop | memop);
|
| /external/v8/src/arm64/ |
| H A D | assembler-arm64.cc | 1609 Instr memop = op | Rt(rt) | Rt2(rt2) | RnSP(addr.base()) | local
1627 Emit(addrmodeop | memop);
2557 Instr memop = op | Rt(rt) | RnSP(addr.base()); local
2564 Emit(LoadStoreUnsignedOffsetFixed | memop |
2569 Emit(LoadStoreUnscaledOffsetFixed | memop | ImmLS(offset));
2588 Emit(LoadStoreRegisterOffsetFixed | memop | Rm(addr.regoffset()) |
2596 Emit(LoadStorePreIndexFixed | memop | ImmLS(offset));
2599 Emit(LoadStorePostIndexFixed | memop | ImmLS(offset));
|