/external/v8/src/interpreter/ |
H A D | bytecode-register.cc | 108 Register reg4, Register reg5) { 118 if (reg5.is_valid() && reg4.index() + 1 != reg5.index()) { 107 AreContiguous(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5) argument
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/external/libyuv/files/source/ |
H A D | rotate_msa.cc | 85 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; local 109 ILVRL_H(vec0, vec2, vec1, vec3, reg4, reg5, reg6, reg7); 110 ILVRL_W(reg0, reg4, reg1, reg5, res0, res1, res2, res3); 131 ILVRL_H(vec0, vec2, vec1, vec3, reg4, reg5, reg6, reg7); 137 res8 = (v16u8)__msa_ilvr_w((v4i32)reg5, (v4i32)reg1); 138 res9 = (v16u8)__msa_ilvl_w((v4i32)reg5, (v4i32)reg1); 166 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; local 190 ILVRL_H(vec0, vec2, vec1, vec3, reg4, reg5, reg6, reg7); 191 ILVRL_W(reg0, reg4, reg1, reg5, res0, res1, res2, res3); 212 ILVRL_H(vec0, vec2, vec1, vec3, reg4, reg5, reg [all...] |
H A D | scale_msa.cc | 133 v8u16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; local 162 reg5 = (v8u16)__msa_pckev_d((v2i64)reg3, (v2i64)reg1); 166 reg5 += reg7; 168 reg5 = (v8u16)__msa_srari_h((v8i16)reg5, 2); 169 dst0 = (v16u8)__msa_pckev_b((v16i8)reg5, (v16i8)reg4);
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H A D | row_msa.cc | 774 v8u16 reg0, reg1, reg2, reg3, reg4, reg5; local 795 reg5 = (v8u16)__msa_ilvod_b(zero, (v16i8)vec1); 801 reg5 *= const_0x42; 805 reg1 += reg5; 826 v8u16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8, reg9; local 863 reg5 = __msa_hadd_u_h(vec1, vec1); 891 reg5 += __msa_hadd_u_h(vec1, vec1); 897 reg5 = (v8u16)__msa_srai_h((v8i16)reg5, 2); 905 reg9 += reg5 * const_0x2 1237 v4u32 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; local 1506 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6; local 1553 v8u16 reg0, reg1, reg2, reg3, reg4, reg5; local 1648 v8u16 reg0, reg1, reg2, reg3, reg4, reg5; local 1705 v8u16 reg0, reg1, reg2, reg3, reg4, reg5; local 2666 v4i32 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8, reg9; local [all...] |
/external/libvpx/libvpx/vpx_dsp/mips/ |
H A D | idct32x32_msa.c | 44 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; local 48 LD_SH8(tmp_buf, 32, reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7); 51 DOTP_CONST_PAIR(reg5, reg3, cospi_12_64, cospi_20_64, reg5, reg3); 52 BUTTERFLY_4(reg1, reg7, reg3, reg5, vec1, vec3, vec2, vec0); 65 LD_SH8((tmp_buf + 16), 32, reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7); 68 DOTP_CONST_PAIR(reg2, reg5, cospi_22_64, cospi_10_64, reg2, reg5); 75 reg2 = reg1 + reg5; 76 reg1 = reg1 - reg5; 128 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; local 354 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; local 434 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; local [all...] |
H A D | idct16x16_msa.c | 16 v8i16 reg3, reg13, reg11, reg5, reg7, reg9, reg1, reg15; local 19 LD_SH8(input, 16, reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7); 23 TRANSPOSE8x8_SH_SH(reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg0, reg1, 24 reg2, reg3, reg4, reg5, reg6, reg7); 48 DOTP_CONST_PAIR(reg5, reg11, cospi_22_64, cospi_10_64, reg5, reg11); 50 BUTTERFLY_4(loc0, loc1, reg11, reg5, reg13, reg3, reg11, reg5); 66 DOTP_CONST_PAIR((-reg5), (-reg11), cospi_8_64, cospi_24_64, reg5, reg1 110 v8i16 reg3, reg13, reg11, reg5, reg7, reg9, reg1, reg15; local [all...] |
/external/v8/src/arm/ |
H A D | macro-assembler-arm.cc | 3713 Register reg5, 3720 if (reg5.is_valid()) regs |= reg5.bit(); 3739 Register reg5, 3744 reg3.is_valid() + reg4.is_valid() + reg5.is_valid() + reg6.is_valid() + 3752 if (reg5.is_valid()) regs |= reg5.bit(); 3709 GetRegisterThatIsNotOneOf(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5, Register reg6) argument 3735 AreAliased(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5, Register reg6, Register reg7, Register reg8) argument
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/external/v8/src/arm64/ |
H A D | assembler-arm64.cc | 229 const CPURegister& reg5, const CPURegister& reg6, 237 const CPURegister regs[] = {reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8}; 266 const CPURegister& reg5, const CPURegister& reg6, 273 match &= !reg5.IsValid() || reg5.IsSameSizeAndType(reg1); 227 AreAliased(const CPURegister& reg1, const CPURegister& reg2, const CPURegister& reg3, const CPURegister& reg4, const CPURegister& reg5, const CPURegister& reg6, const CPURegister& reg7, const CPURegister& reg8) argument 264 AreSameSizeAndType(const CPURegister& reg1, const CPURegister& reg2, const CPURegister& reg3, const CPURegister& reg4, const CPURegister& reg5, const CPURegister& reg6, const CPURegister& reg7, const CPURegister& reg8) argument
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/external/v8/src/ia32/ |
H A D | macro-assembler-ia32.cc | 2649 Register reg5, 2654 reg3.is_valid() + reg4.is_valid() + reg5.is_valid() + reg6.is_valid() + 2662 if (reg5.is_valid()) regs |= reg5.bit(); 2645 AreAliased(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5, Register reg6, Register reg7, Register reg8) argument
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/external/v8/src/mips64/ |
H A D | macro-assembler-mips64.cc | 6785 Register reg5, 6792 if (reg5.is_valid()) regs |= reg5.bit(); 6807 Register reg5, Register reg6, Register reg7, Register reg8, 6810 reg4.is_valid() + reg5.is_valid() + reg6.is_valid() + 6819 if (reg5.is_valid()) regs |= reg5.bit(); 6781 GetRegisterThatIsNotOneOf(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5, Register reg6) argument 6806 AreAliased(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5, Register reg6, Register reg7, Register reg8, Register reg9, Register reg10) argument
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/external/v8/src/x87/ |
H A D | macro-assembler-x87.cc | 2495 Register reg5, 2500 reg3.is_valid() + reg4.is_valid() + reg5.is_valid() + reg6.is_valid() + 2508 if (reg5.is_valid()) regs |= reg5.bit(); 2491 AreAliased(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5, Register reg6, Register reg7, Register reg8) argument
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/external/v8/src/mips/ |
H A D | macro-assembler-mips.cc | 6378 Register reg5, 6385 if (reg5.is_valid()) regs |= reg5.bit(); 6400 Register reg5, Register reg6, Register reg7, Register reg8, 6403 reg4.is_valid() + reg5.is_valid() + reg6.is_valid() + 6412 if (reg5.is_valid()) regs |= reg5.bit(); 6374 GetRegisterThatIsNotOneOf(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5, Register reg6) argument 6399 AreAliased(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5, Register reg6, Register reg7, Register reg8, Register reg9, Register reg10) argument
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/external/v8/src/ppc/ |
H A D | macro-assembler-ppc.cc | 4238 Register reg4, Register reg5, 4245 if (reg5.is_valid()) regs |= reg5.bit(); 4261 Register reg5, Register reg6, Register reg7, Register reg8, 4264 reg4.is_valid() + reg5.is_valid() + reg6.is_valid() + 4273 if (reg5.is_valid()) regs |= reg5.bit(); 4237 GetRegisterThatIsNotOneOf(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5, Register reg6) argument 4260 AreAliased(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5, Register reg6, Register reg7, Register reg8, Register reg9, Register reg10) argument
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/external/v8/src/s390/ |
H A D | macro-assembler-s390.cc | 3184 Register reg4, Register reg5, 3191 if (reg5.is_valid()) regs |= reg5.bit(); 5260 Register reg5, Register reg6, Register reg7, Register reg8, 5263 reg4.is_valid() + reg5.is_valid() + reg6.is_valid() + 5272 if (reg5.is_valid()) regs |= reg5.bit(); 3183 GetRegisterThatIsNotOneOf(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5, Register reg6) argument 5259 AreAliased(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5, Register reg6, Register reg7, Register reg8, Register reg9, Register reg10) argument
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/external/v8/src/x64/ |
H A D | macro-assembler-x64.cc | 5058 Register reg5, 5063 reg3.is_valid() + reg4.is_valid() + reg5.is_valid() + reg6.is_valid() + 5071 if (reg5.is_valid()) regs |= reg5.bit(); 5054 AreAliased(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5, Register reg6, Register reg7, Register reg8) argument
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