Searched defs:reg7 (Results 1 - 14 of 14) sorted by relevance

/external/libyuv/files/source/
H A Drotate_msa.cc85 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; local
109 ILVRL_H(vec0, vec2, vec1, vec3, reg4, reg5, reg6, reg7);
111 ILVRL_W(reg2, reg6, reg3, reg7, res4, res5, res6, res7);
131 ILVRL_H(vec0, vec2, vec1, vec3, reg4, reg5, reg6, reg7);
147 res8 = (v16u8)__msa_ilvr_w((v4i32)reg7, (v4i32)reg3);
148 res9 = (v16u8)__msa_ilvl_w((v4i32)reg7, (v4i32)reg3);
166 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; local
190 ILVRL_H(vec0, vec2, vec1, vec3, reg4, reg5, reg6, reg7);
192 ILVRL_W(reg2, reg6, reg3, reg7, res4, res5, res6, res7);
212 ILVRL_H(vec0, vec2, vec1, vec3, reg4, reg5, reg6, reg7);
[all...]
H A Dscale_msa.cc133 v8u16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; local
164 reg7 = (v8u16)__msa_pckod_d((v2i64)reg3, (v2i64)reg1);
166 reg5 += reg7;
H A Drow_msa.cc826 v8u16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8, reg9; local
899 reg7 = reg1 * const_0x70;
903 reg7 += const_0x8080;
917 reg7 -= reg9;
921 reg7 = (v8u16)__msa_srai_h((v8i16)reg7, 8);
924 dst0 = (v16u8)__msa_pckev_b((v16i8)reg7, (v16i8)reg6);
1237 v4u32 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; local
1267 reg7 = (v4u32)__msa_ilvl_h(zero, (v8i16)vec7);
1275 reg7 *
2666 v4i32 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8, reg9; local
[all...]
/external/libvpx/libvpx/vpx_dsp/mips/
H A Didct32x32_msa.c44 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; local
48 LD_SH8(tmp_buf, 32, reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7);
50 DOTP_CONST_PAIR(reg1, reg7, cospi_28_64, cospi_4_64, reg1, reg7);
52 BUTTERFLY_4(reg1, reg7, reg3, reg5, vec1, vec3, vec2, vec0);
65 LD_SH8((tmp_buf + 16), 32, reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7);
66 DOTP_CONST_PAIR(reg0, reg7, cospi_30_64, cospi_2_64, reg0, reg7);
77 reg5 = reg7 + reg3;
78 reg7
128 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; local
354 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; local
434 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; local
[all...]
H A Didct16x16_msa.c16 v8i16 reg3, reg13, reg11, reg5, reg7, reg9, reg1, reg15; local
19 LD_SH8(input, 16, reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7);
23 TRANSPOSE8x8_SH_SH(reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg0, reg1,
24 reg2, reg3, reg4, reg5, reg6, reg7);
41 DOTP_CONST_PAIR(reg9, reg7, cospi_14_64, cospi_18_64, loc2, loc3);
45 reg7 = reg15 - loc3;
65 DOTP_CONST_PAIR(reg7, reg9, cospi_24_64, cospi_8_64, reg7, reg9);
73 loc0 = reg7 + reg11;
74 reg11 = reg7
110 v8i16 reg3, reg13, reg11, reg5, reg7, reg9, reg1, reg15; local
[all...]
/external/v8/src/arm/
H A Dmacro-assembler-arm.cc3741 Register reg7,
3745 reg7.is_valid() + reg8.is_valid();
3754 if (reg7.is_valid()) regs |= reg7.bit();
3735 AreAliased(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5, Register reg6, Register reg7, Register reg8) argument
/external/v8/src/arm64/
H A Dassembler-arm64.cc230 const CPURegister& reg7, const CPURegister& reg8) {
237 const CPURegister regs[] = {reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8};
267 const CPURegister& reg7, const CPURegister& reg8) {
275 match &= !reg7.IsValid() || reg7.IsSameSizeAndType(reg1);
227 AreAliased(const CPURegister& reg1, const CPURegister& reg2, const CPURegister& reg3, const CPURegister& reg4, const CPURegister& reg5, const CPURegister& reg6, const CPURegister& reg7, const CPURegister& reg8) argument
264 AreSameSizeAndType(const CPURegister& reg1, const CPURegister& reg2, const CPURegister& reg3, const CPURegister& reg4, const CPURegister& reg5, const CPURegister& reg6, const CPURegister& reg7, const CPURegister& reg8) argument
/external/v8/src/ia32/
H A Dmacro-assembler-ia32.cc2651 Register reg7,
2655 reg7.is_valid() + reg8.is_valid();
2664 if (reg7.is_valid()) regs |= reg7.bit();
2645 AreAliased(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5, Register reg6, Register reg7, Register reg8) argument
/external/v8/src/mips64/
H A Dmacro-assembler-mips64.cc6807 Register reg5, Register reg6, Register reg7, Register reg8,
6811 reg7.is_valid() + reg8.is_valid() + reg9.is_valid() +
6821 if (reg7.is_valid()) regs |= reg7.bit();
6806 AreAliased(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5, Register reg6, Register reg7, Register reg8, Register reg9, Register reg10) argument
/external/v8/src/x87/
H A Dmacro-assembler-x87.cc2497 Register reg7,
2501 reg7.is_valid() + reg8.is_valid();
2510 if (reg7.is_valid()) regs |= reg7.bit();
2491 AreAliased(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5, Register reg6, Register reg7, Register reg8) argument
/external/v8/src/mips/
H A Dmacro-assembler-mips.cc6400 Register reg5, Register reg6, Register reg7, Register reg8,
6404 reg7.is_valid() + reg8.is_valid() + reg9.is_valid() +
6414 if (reg7.is_valid()) regs |= reg7.bit();
6399 AreAliased(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5, Register reg6, Register reg7, Register reg8, Register reg9, Register reg10) argument
/external/v8/src/ppc/
H A Dmacro-assembler-ppc.cc4261 Register reg5, Register reg6, Register reg7, Register reg8,
4265 reg7.is_valid() + reg8.is_valid() + reg9.is_valid() +
4275 if (reg7.is_valid()) regs |= reg7.bit();
4260 AreAliased(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5, Register reg6, Register reg7, Register reg8, Register reg9, Register reg10) argument
/external/v8/src/s390/
H A Dmacro-assembler-s390.cc5260 Register reg5, Register reg6, Register reg7, Register reg8,
5264 reg7.is_valid() + reg8.is_valid() + reg9.is_valid() +
5274 if (reg7.is_valid()) regs |= reg7.bit();
5259 AreAliased(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5, Register reg6, Register reg7, Register reg8, Register reg9, Register reg10) argument
/external/v8/src/x64/
H A Dmacro-assembler-x64.cc5060 Register reg7,
5064 reg7.is_valid() + reg8.is_valid();
5073 if (reg7.is_valid()) regs |= reg7.bit();
5054 AreAliased(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5, Register reg6, Register reg7, Register reg8) argument

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