| /external/mdnsresponder/mDNSShared/ |
| H A D | dnssd_ipc.h | 180 uint32_t reg_index; // identifier for a record registered via DNSServiceRegisterRecord() on a variable
|
| /external/v8/src/crankshaft/ |
| H A D | lithium.cc | 64 int reg_index = unalloc->fixed_register_index(); local
65 if (reg_index < 0 || reg_index >= Register::kNumRegisters) {
66 stream->Add("(=invalid_reg#%d)", reg_index);
69 GetRegConfig()->GetGeneralRegisterName(reg_index);
75 int reg_index = unalloc->fixed_register_index(); local
76 if (reg_index < 0 || reg_index >= DoubleRegister::kMaxNumRegisters) {
77 stream->Add("(=invalid_double_reg#%d)", reg_index);
80 GetRegConfig()->GetDoubleRegisterName(reg_index);
112 int reg_index = index(); local
122 int reg_index = index(); local
[all...] |
| H A D | lithium-allocator.cc | 603 int reg_index = operand->fixed_register_index(); local
604 operand->ConvertTo(LOperand::REGISTER, reg_index);
606 int reg_index = operand->fixed_register_index(); local
607 operand->ConvertTo(LOperand::DOUBLE_REGISTER, reg_index);
|
| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| H A D | si_shader_tgsi_setup.c | 392 unsigned reg_index,
405 if (reg_index >= array->range.First && reg_index <= array->range.Last)
414 unsigned File, unsigned reg_index,
421 unsigned array_id = get_temp_array_id(bld_base, reg_index, reg);
456 unsigned reg_index,
470 array_id = get_temp_array_id(&ctx->bld_base, reg_index, reg_indirect);
484 reg_index - ctx->temp_arrays[array_id - 1].range.First);
569 unsigned reg_index,
577 ptr = get_pointer_into_array(ctx, file, swizzle, reg_index, reg_indirec
391 get_temp_array_id(struct lp_build_tgsi_context *bld_base, unsigned reg_index, const struct tgsi_ind_register *reg) argument
413 get_array_range(struct lp_build_tgsi_context *bld_base, unsigned File, unsigned reg_index, const struct tgsi_ind_register *reg) argument
453 get_pointer_into_array(struct si_shader_context *ctx, unsigned file, unsigned swizzle, unsigned reg_index, const struct tgsi_ind_register *reg_indirect) argument
565 load_value_from_array(struct lp_build_tgsi_context *bld_base, unsigned file, enum tgsi_opcode_type type, unsigned swizzle, unsigned reg_index, const struct tgsi_ind_register *reg_indirect) argument
600 store_value_to_array(struct lp_build_tgsi_context *bld_base, LLVMValueRef value, unsigned file, unsigned chan_index, unsigned reg_index, const struct tgsi_ind_register *reg_indirect) argument
1025 unsigned reg_index = reg->Register.Index; local
[all...] |
| H A D | si_shader.c | 2227 unsigned reg_index; local
2236 for (reg_index = 0; reg_index < 2; reg_index ++) {
2237 LLVMValueRef *args = pos[2 + reg_index];
2248 ((reg_index * 4 + chan) * 4 +
2263 V_008DFC_SQ_EXP_POS + 2 + reg_index);
|
| /external/v8/src/interpreter/ |
| H A D | interpreter-assembler.cc | 197 Node* InterpreterAssembler::RegisterLocation(Node* reg_index) { argument
199 RegisterFrameOffset(reg_index));
211 Node* InterpreterAssembler::LoadRegister(Node* reg_index) { argument
213 RegisterFrameOffset(reg_index));
227 Node* InterpreterAssembler::StoreRegister(Node* value, Node* reg_index) { argument
230 RegisterFrameOffset(reg_index), value);
239 Node* InterpreterAssembler::NextRegister(Node* reg_index) { argument
241 return IntPtrAdd(reg_index, IntPtrConstant(-1));
1378 Node* reg_index = IntPtrSub(IntPtrConstant(Register(0).ToOperand()), index); local
1379 Node* value = LoadRegister(reg_index);
1413 Node* reg_index = IntPtrSub(IntPtrConstant(Register(0).ToOperand()), index); local
[all...] |
| H A D | interpreter.cc | 461 Node* reg_index = __ BytecodeOperandReg(0); local
462 Node* value = __ LoadRegister(reg_index);
471 Node* reg_index = __ BytecodeOperandReg(0); local
473 __ StoreRegister(accumulator, reg_index);
622 Node* reg_index = __ BytecodeOperandReg(0); local
623 Node* context = __ LoadRegister(reg_index);
667 Node* reg_index = __ BytecodeOperandReg(0); local
668 Node* context = __ LoadRegister(reg_index);
870 Node* reg_index = __ BytecodeOperandReg(0); local
871 Node* object = __ LoadRegister(reg_index);
1073 Node* reg_index = __ BytecodeOperandReg(0); local
1085 Node* reg_index = __ BytecodeOperandReg(0); local
1094 Node* reg_index = __ BytecodeOperandReg(0); local
1115 Node* reg_index = __ BytecodeOperandReg(0); local
1129 Node* reg_index = __ BytecodeOperandReg(0); local
1371 Node* reg_index = __ BytecodeOperandReg(0); local
1501 Node* reg_index = __ BytecodeOperandReg(1); local
1555 Node* reg_index = __ BytecodeOperandReg(1); local
1605 Node* reg_index = __ BytecodeOperandReg(1); local
1632 Node* reg_index = __ BytecodeOperandReg(1); local
1660 Node* reg_index = __ BytecodeOperandReg(1); local
1689 Node* reg_index = __ BytecodeOperandReg(1); local
2110 Node* reg_index = __ BytecodeOperandReg(0); local
2416 Node* reg_index = __ BytecodeOperandReg(0); local
2447 Node* reg_index = __ BytecodeOperandReg(0); local
2470 Node* reg_index = __ BytecodeOperandReg(0); local
2984 Node* reg_index = __ BytecodeOperandReg(0); local
[all...] |
| /external/mesa3d/src/gallium/auxiliary/gallivm/ |
| H A D | lp_bld_tgsi_soa.c | 1092 unsigned reg_file, unsigned reg_index,
1106 base = lp_build_const_int_vec(bld->bld_base.base.gallivm, uint_bld->type, reg_index);
1091 get_indirect_index(struct lp_build_tgsi_soa_context *bld, unsigned reg_file, unsigned reg_index, const struct tgsi_ind_register *indirect_reg) argument
|
| /external/v8/src/arm/ |
| H A D | simulator-arm.cc | 947 void Simulator::SetVFPRegister(int reg_index, const InputType& value) { argument
948 DCHECK(reg_index >= 0);
949 if (register_size == 1) DCHECK(reg_index < num_s_registers);
950 if (register_size == 2) DCHECK(reg_index < DwVfpRegister::NumRegisters());
954 memcpy(&vfp_registers_[reg_index * register_size], buffer,
960 ReturnType Simulator::GetFromVFPRegister(int reg_index) {
961 DCHECK(reg_index >= 0);
962 if (register_size == 1) DCHECK(reg_index < num_s_registers);
963 if (register_size == 2) DCHECK(reg_index < DwVfpRegister::NumRegisters());
967 memcpy(buffer, &vfp_registers_[register_size * reg_index],
[all...] |
| /external/vixl/src/aarch64/ |
| H A D | simulator-aarch64.cc | 3878 int reg_index = imm5 >> (tz + 1); local
3883 ins_element(vf, rd, reg_index, rn, rn_index);
3885 ins_immediate(vf, rd, reg_index, ReadXRegister(instr->GetRn()));
3887 uint64_t value = LogicVRegister(rn).Uint(vf, reg_index);
3891 int64_t value = LogicVRegister(rn).Int(vf, reg_index);
3898 dup_element(vf, rd, rn, reg_index);
|
| /external/vixl/test/aarch64/ |
| H A D | test-assembler-aarch64.cc | 13941 Register reg_index = x21; local
13956 __ Mov(reg_index, size_stored);
13957 __ StoreCPURegList(list_src, MemOperand(reg_base, reg_index));
13958 __ LoadCPURegList(list_dst, MemOperand(reg_base, reg_index));
13965 __ Mov(reg_index, size_stored);
13966 __ StoreCPURegList(list_fp_src_1, MemOperand(reg_base, reg_index));
13967 __ LoadCPURegList(list_fp_dst_1, MemOperand(reg_base, reg_index));
13980 __ Mov(reg_index, size_stored);
13981 __ StoreCPURegList(list_fp_src_2, MemOperand(reg_base, reg_index));
13982 __ LoadCPURegList(list_fp_dst_2, MemOperand(reg_base, reg_index));
[all...] |
| /external/mesa3d/src/gallium/drivers/svga/ |
| H A D | svga_tgsi_vgpu10.c | 3271 unsigned reg_index = emit->clip_dist_out_index + i / 4; local
3276 dst = make_dst_reg(TGSI_FILE_OUTPUT, reg_index);
3313 unsigned reg_index = emit->clip_dist_out_index + i / 4; local
3318 dst = make_dst_reg(TGSI_FILE_OUTPUT, reg_index);
|