Searched defs:rm (Results 126 - 150 of 194) sorted by relevance

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/external/compiler-rt/lib/tsan/rtl/
H A Dtsan_rtl_report.cc264 ReportMutex *rm = new(mem) ReportMutex; local
265 rep_->mutexes.PushBack(rm);
266 rm->id = s->uid;
267 rm->addr = s->addr;
268 rm->destroyed = false;
269 rm->stack = SymbolizeStackId(s->creation_stack_id);
297 ReportMutex *rm = new(mem) ReportMutex; local
298 rep_->mutexes.PushBack(rm);
299 rm->id = id;
300 rm
[all...]
/external/swiftshader/third_party/subzero/src/DartARM32/
H A Dassembler_arm.h154 explicit Operand(Register rm) {
156 encoding_ = static_cast<uint32_t>(rm);
161 Operand(Register rm, Shift shift, uint32_t shift_imm) {
166 static_cast<uint32_t>(rm);
171 Operand(Register rm, Shift shift, Register rs) {
175 static_cast<uint32_t>(rm);
301 Address(Register rn, Register rm, argument
303 Operand o(rm, shift, shift_imm);
314 Address(Register rn, Register rm, Shift shift, Register r, Mode am = Offset);
333 Register rm() cons function in class:dart::Address
[all...]
/external/v8/src/arm/
H A Ddisasm-arm.cc196 int rm = instr->RmValue(); local
198 PrintRegister(rm);
201 // Special case for using rm only.
317 } else if (format[1] == 'm') { // 'rm: Rm register
735 Format(instr, "mul'cond's 'rn, 'rm, 'rs");
742 Format(instr, "mla'cond's 'rn, 'rm, 'rs, 'rd");
748 Format(instr, "mls'cond's 'rn, 'rm, 'rs, 'rd");
758 Format(instr, "'um'al'cond's 'rd, 'rn, 'rm, 'rs");
781 // "rt" register is using the rm bits.
784 Format(instr, "strex'cond 'rd, 'rm, ['r
[all...]
/external/v8/src/x87/
H A Ddisasm-x87.cc299 static void get_modrm(byte data, int* mod, int* regop, int* rm) { argument
302 *rm = data & 7;
354 int mod, regop, rm; local
355 get_modrm(*modrmp, &mod, &regop, &rm);
360 if (rm == ebp) {
364 } else if (rm == esp) {
369 AppendToBuffer("[%s]", (this->*register_name)(rm));
391 AppendToBuffer("[%s]", (this->*register_name)(rm));
397 if (rm == esp) {
403 if (index == base && index == rm /*es
462 int mod, regop, rm; local
490 int mod, regop, rm; local
519 int mod, regop, rm; local
561 int mod, regop, rm; local
1039 int mod, regop, rm; local
1063 int mod, regop, rm; local
1092 int mod, regop, rm; local
1116 int mod, regop, rm; local
1124 int mod, regop, rm; local
1133 int mod, regop, rm; local
1155 int mod, regop, rm; local
1165 int mod, regop, rm; local
1177 int mod, regop, rm; local
1187 int mod, regop, rm; local
1193 int mod, regop, rm; local
1205 int mod, regop, rm; local
1216 int mod, regop, rm; local
1254 int mod, regop, rm; local
1273 int mod, regop, rm; local
1307 int mod, regop, rm; local
1313 int mod, regop, rm; local
1343 int mod, regop, rm; local
1359 int mod, regop, rm; local
1369 int mod, regop, rm; local
1379 int mod, regop, rm; local
1389 int mod, regop, rm; local
1403 int mod, regop, rm; local
1416 int mod, regop, rm; local
1424 int mod, regop, rm; local
1432 int mod, regop, rm; local
1440 int mod, regop, rm; local
1448 int mod, regop, rm; local
1454 int mod, regop, rm; local
1460 int mod, regop, rm; local
1470 int mod, regop, rm; local
1481 int mod, regop, rm; local
1489 int mod, regop, rm; local
1500 int mod, regop, rm; local
1509 int mod, regop, rm; local
1515 int mod, regop, rm; local
1522 int mod, regop, rm; local
1530 int mod, regop, rm; local
1540 int mod, regop, rm; local
1548 int mod, regop, rm; local
1567 int mod, regop, rm; local
1625 int mod, regop, rm; local
1631 int mod, regop, rm; local
1637 int mod, regop, rm; local
1654 int mod, regop, rm; local
1695 int mod, regop, rm; local
1701 int mod, regop, rm; local
1707 int mod, regop, rm; local
1713 int mod, regop, rm; local
1719 int mod, regop, rm; local
1726 int mod, regop, rm; local
[all...]
/external/valgrind/VEX/priv/
H A Dguest_s390_helpers.c919 UChar rm; local
922 rm = gpr0 & 0xf;
923 if (rm > 1 && rm < 8)
H A Dhost_s390_isel.c2080 s390_dfp_round_t rm; local
2101 rm = get_dfp_rounding_mode(env, irrm);
2105 f4, INVALID_HREG, r1, rm));
2118 s390_dfp_round_t rm; local
2130 rm = get_dfp_rounding_mode(env, irrm);
2136 f4, f6, r1, rm));
2149 s390_bfp_round_t rm; local
2162 rm = get_bfp_rounding_mode(env, irrm);
2165 rm = S390_BFP_ROUND_PER_FPC;
2173 f0, f2, f4, f6, rm));
2457 s390_dfp_round_t rm; local
2475 s390_dfp_round_t rm; local
2832 s390_dfp_round_t rm; local
2870 s390_dfp_round_t rm; local
3057 s390_dfp_round_t rm; local
3075 s390_dfp_round_t rm; local
[all...]
H A Dhost_amd64_isel.c2156 AMD64RM* rm = iselIntExpr_RM_wrk(env, e); local
2158 switch (rm->tag) {
2160 vassert(hregClass(rm->Arm.Reg.reg) == HRcInt64);
2161 vassert(hregIsVirtual(rm->Arm.Reg.reg));
2162 return rm;
2164 vassert(sane_AMode(rm->Arm.Mem.am));
2165 return rm;
H A Dhost_x86_isel.c1736 X86RM* rm = iselIntExpr_RM_wrk(env, e); local
1738 switch (rm->tag) {
1740 vassert(hregClass(rm->Xrm.Reg.reg) == HRcInt32);
1741 vassert(hregIsVirtual(rm->Xrm.Reg.reg));
1742 return rm;
1744 vassert(sane_AMode(rm->Xrm.Mem.am));
1745 return rm;
1823 X86RM* rm = iselIntExpr_RM(env, e->Iex.Unop.arg); local
1824 addInstr(env, X86Instr_Test32(1,rm));
1833 X86RM* rm local
1843 X86RM* rm = iselIntExpr_RM(env, e->Iex.Unop.arg); local
[all...]
/external/valgrind/none/tests/amd64/
H A Dsse4-64.c2420 UInt rm; local
2447 rm = get_sse_roundingmode();
2448 assert(rm == 0); // 0 == RN == default
2453 for (rm = 0; rm <= 3; rm++) {
2454 set_sse_roundingmode(rm);
2460 printf("r (rm=%u) roundsd_1XX ", rm);
2471 printf("m (rm
2736 UInt rm; local
3067 UInt rm; local
3434 UInt rm; local
[all...]
/external/mesa3d/src/gallium/drivers/nouveau/codegen/
H A Dnv50_ir_emit_gm107.cpp469 int rm = 0, ri = 0; local
472 case ROUND_N : rm = 0; break;
474 case ROUND_M : rm = 1; break;
476 case ROUND_P : rm = 2; break;
478 case ROUND_Z : rm = 3; break;
484 emitField(rmp, 2, rm);
/external/swiftshader/third_party/subzero/src/
H A DIceAssemblerX86BaseImpl.h3866 void AssemblerX86Base<TraitsType>::emitOperand(int rm, const Operand &operand, argument
3868 assert(rm >= 0 && rm < 8);
3874 emitUint8(operand.encoding_[0] + (rm << 3));
3925 void AssemblerX86Base<TraitsType>::emitComplexI8(int rm, const Operand &operand, argument
3927 assert(rm >= 0 && rm < 8);
3931 emitUint8(0x04 + (rm << 3));
3937 emitOperand(rm, operand, OffsetFromNextInstruction);
3943 void AssemblerX86Base<TraitsType>::emitComplex(Type Ty, int rm, argument
3994 emitGenericShift(int rm, Type Ty, GPRRegister reg, const Immediate &imm) argument
4017 emitGenericShift(int rm, Type Ty, const Operand &operand, GPRRegister shifter) argument
[all...]
H A DIceTargetLoweringX8632Traits.h97 GPRRegister rm() const { function in class:Ice::X8632::TargetX8632Traits::Operand
131 void SetModRM(int mod, GPRRegister rm) { argument
133 encoding_[0] = (mod << 6) | rm;
H A DIceTargetLoweringX8664Traits.h107 GPRRegister rm() const { function in class:Ice::X8664::TargetX8664Traits::Operand
134 void SetModRM(int mod, GPRRegister rm) { argument
136 encoding_[0] = (mod << 6) | (rm & 0x07);
137 rex_ = (rm & 0x08) ? RexB : RexNone;
184 (rm() == reg); // Register codes match.
/external/tensorflow/tensorflow/contrib/verbs/
H A Drdma.h138 static string CreateMessage(const RdmaMessage& rm);
139 static void ParseMessage(RdmaMessage& rm, void* buffer);
311 RdmaTensorResponse(RdmaChannel* channel, const RdmaMessage& rm) argument
312 : channel_(channel), rm_(rm) {}
314 void Update(const RdmaMessage& rm) { rm_ = rm; } argument
439 RdmaTensorResponse* AddTensorResponse(const RdmaMessage& rm);
440 RdmaTensorResponse* UpdateTensorResponse(const RdmaMessage& rm);
/external/v8/src/arm64/
H A Ddisasm-arm64.cc1673 unsigned rm = instr->Rm(); local
1674 if (rm == kZeroRegCode) {
1677 AppendToOutput("%c%d", reg_type, rm);
H A Dmacro-assembler-arm64-inl.h340 const Register& rm) {
343 asrv(rd, rn, rm);
499 const Register& rm,
504 csinc(rd, rn, rm, cond);
510 const Register& rm,
515 csinv(rd, rn, rm, cond);
521 const Register& rm,
526 csneg(rd, rn, rm, cond);
550 const Register& rm,
554 extr(rd, rn, rm, ls
338 Asr(const Register& rd, const Register& rn, const Register& rm) argument
497 Csinc(const Register& rd, const Register& rn, const Register& rm, Condition cond) argument
508 Csinv(const Register& rd, const Register& rn, const Register& rm, Condition cond) argument
519 Csneg(const Register& rd, const Register& rn, const Register& rm, Condition cond) argument
548 Extr(const Register& rd, const Register& rn, const Register& rm, unsigned lsb) argument
910 Lsl(const Register& rd, const Register& rn, const Register& rm) argument
928 Lsr(const Register& rd, const Register& rn, const Register& rm) argument
937 Madd(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
947 Mneg(const Register& rd, const Register& rn, const Register& rm) argument
988 Msub(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
998 Mul(const Register& rd, const Register& rn, const Register& rm) argument
1052 Ror(const Register& rd, const Register& rn, const Register& rm) argument
1089 Sdiv(const Register& rd, const Register& rn, const Register& rm) argument
1098 Smaddl(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
1108 Smsubl(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
1118 Smull(const Register& rd, const Register& rn, const Register& rm) argument
1127 Smulh(const Register& rd, const Register& rn, const Register& rm) argument
1136 Umull(const Register& rd, const Register& rn, const Register& rm) argument
1193 Udiv(const Register& rd, const Register& rn, const Register& rm) argument
1202 Umaddl(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
1212 Umsubl(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
[all...]
/external/v8/src/ia32/
H A Ddisasm-ia32.cc362 static void get_modrm(byte data, int* mod, int* regop, int* rm) { argument
365 *rm = data & 7;
418 int mod, regop, rm; local
419 get_modrm(*modrmp, &mod, &regop, &rm);
424 if (rm == ebp) {
428 } else if (rm == esp) {
433 AppendToBuffer("[%s]", (this->*register_name)(rm));
455 AppendToBuffer("[%s]", (this->*register_name)(rm));
461 if (rm == esp) {
467 if (index == base && index == rm /*es
526 int mod, regop, rm; local
554 int mod, regop, rm; local
583 int mod, regop, rm; local
625 int mod, regop, rm; local
736 int mod, regop, rm, vvvv = vex_vreg(); local
808 int mod, regop, rm, vvvv = vex_vreg(); local
845 int mod, regop, rm, vvvv = vex_vreg(); local
882 int mod, regop, rm, vvvv = vex_vreg(); local
923 int mod, regop, rm, vvvv = vex_vreg(); local
945 int mod, regop, rm, vvvv = vex_vreg(); local
962 int mod, regop, rm; local
975 int mod, regop, rm, vvvv = vex_vreg(); local
992 int mod, regop, rm, vvvv = vex_vreg(); local
1366 int mod, regop, rm; local
1390 int mod, regop, rm; local
1419 int mod, regop, rm; local
1429 int mod, regop, rm; local
1441 int mod, regop, rm; local
1463 int mod, regop, rm; local
1471 int mod, regop, rm; local
1480 int mod, regop, rm; local
1502 int mod, regop, rm; local
1512 int mod, regop, rm; local
1524 int mod, regop, rm; local
1534 int mod, regop, rm; local
1540 int mod, regop, rm; local
1552 int mod, regop, rm; local
1563 int mod, regop, rm; local
1601 int mod, regop, rm; local
1620 int mod, regop, rm; local
1654 int mod, regop, rm; local
1660 int mod, regop, rm; local
1690 int mod, regop, rm; local
1706 int mod, regop, rm; local
1714 int mod, regop, rm; local
1724 int mod, regop, rm; local
1734 int mod, regop, rm; local
1744 int mod, regop, rm; local
1758 int mod, regop, rm; local
1771 int mod, regop, rm; local
1779 int mod, regop, rm; local
1787 int mod, regop, rm; local
1795 int mod, regop, rm; local
1803 int mod, regop, rm; local
1809 int mod, regop, rm; local
1815 int mod, regop, rm; local
1825 int mod, regop, rm; local
1832 int mod, regop, rm; local
1839 int mod, regop, rm; local
1850 int mod, regop, rm; local
1858 int mod, regop, rm; local
1867 int mod, regop, rm; local
1878 int mod, regop, rm; local
1887 int mod, regop, rm; local
1893 int mod, regop, rm; local
1900 int mod, regop, rm; local
1908 int mod, regop, rm; local
1918 int mod, regop, rm; local
1926 int mod, regop, rm; local
1945 int mod, regop, rm; local
2003 int mod, regop, rm; local
2009 int mod, regop, rm; local
2015 int mod, regop, rm; local
2054 int mod, regop, rm; local
2095 int mod, regop, rm; local
2101 int mod, regop, rm; local
2107 int mod, regop, rm; local
2113 int mod, regop, rm; local
2120 int mod, regop, rm; local
2126 int mod, regop, rm; local
2132 int mod, regop, rm; local
2138 int mod, regop, rm; local
2177 int mod, regop, rm; local
[all...]
/external/v8/src/mips64/
H A Dmacro-assembler-mips64.h142 inline MemOperand UntagSmiMemOperand(Register rm, int offset) { argument
145 return MemOperand(rm, SmiWordOffset(offset));
149 inline MemOperand UntagSmiFieldMemOperand(Register rm, int offset) { argument
150 return UntagSmiMemOperand(rm, offset - kHeapObjectTag);
/external/v8/src/x64/
H A Ddisasm-x64.cc444 int* rm) {
447 *rm = (data & 7) | (rex_b() ? 8 : 0);
508 int mod, regop, rm; local
509 get_modrm(*modrmp, &mod, &regop, &rm);
514 if ((rm & 7) == 5) {
518 } else if ((rm & 7) == 4) {
549 AppendToBuffer("[%s]", NameOfCPURegister(rm));
555 if ((rm & 7) == 4) {
580 NameOfCPURegister(rm),
587 AppendToBuffer("%s", (this->*register_name)(rm));
441 get_modrm(byte data, int* mod, int* regop, int* rm) argument
651 int mod, regop, rm; local
687 int mod, regop, rm; local
732 int mod, regop, rm; local
786 int mod, regop, rm; local
885 int mod, regop, rm, vvvv = vex_vreg(); local
970 int mod, regop, rm, vvvv = vex_vreg(); local
1016 int mod, regop, rm, vvvv = vex_vreg(); local
1083 int mod, regop, rm, vvvv = vex_vreg(); local
1164 int mod, regop, rm, vvvv = vex_vreg(); local
1208 int mod, regop, rm, vvvv = vex_vreg(); local
1231 int mod, regop, rm, vvvv = vex_vreg(); local
1249 int mod, regop, rm; local
1272 int mod, regop, rm, vvvv = vex_vreg(); local
1325 int mod, regop, rm, vvvv = vex_vreg(); local
1634 int mod, regop, rm; local
1908 int mod, regop, rm; local
1919 int mod, regop, rm; local
1926 int mod, regop, rm; local
1933 int mod, regop, rm; local
1940 int mod, regop, rm; local
1946 int mod, regop, rm; local
1964 int mod, regop, rm; local
1976 int mod, regop, rm; local
1987 int mod, regop, rm; local
1994 int mod, regop, rm; local
2000 int mod, regop, rm; local
2006 int mod, regop, rm; local
2011 int mod, regop, rm; local
2017 int mod, regop, rm; local
2023 int mod, regop, rm; local
2030 int mod, regop, rm; local
2044 int mod, regop, rm; local
2056 int mod, regop, rm; local
2071 int mod, regop, rm; local
2078 int mod, regop, rm; local
2085 int mod, regop, rm; local
2106 int mod, regop, rm; local
2114 int mod, regop, rm; local
2124 int mod, regop, rm; local
2132 int mod, regop, rm; local
2153 int mod, regop, rm; local
2164 int mod, regop, rm; local
2406 int mod, regop, rm; local
2417 int mod, regop, rm; local
2489 int mod, regop, rm; local
2558 int mod, regop, rm; local
[all...]
/external/vixl/src/aarch64/
H A Dassembler-aarch64.cc556 const Register& rm) {
558 VIXL_ASSERT(rd.GetSizeInBits() == rm.GetSizeInBits());
559 Emit(SF(rd) | LSLV | Rm(rm) | Rn(rn) | Rd(rd));
565 const Register& rm) {
567 VIXL_ASSERT(rd.GetSizeInBits() == rm.GetSizeInBits());
568 Emit(SF(rd) | LSRV | Rm(rm) | Rn(rn) | Rd(rd));
574 const Register& rm) {
576 VIXL_ASSERT(rd.GetSizeInBits() == rm.GetSizeInBits());
577 Emit(SF(rd) | ASRV | Rm(rm) | Rn(rn) | Rd(rd));
583 const Register& rm) {
554 lslv(const Register& rd, const Register& rn, const Register& rm) argument
563 lsrv(const Register& rd, const Register& rn, const Register& rm) argument
572 asrv(const Register& rd, const Register& rn, const Register& rm) argument
581 rorv(const Register& rd, const Register& rn, const Register& rm) argument
624 extr(const Register& rd, const Register& rn, const Register& rm, unsigned lsb) argument
636 csel(const Register& rd, const Register& rn, const Register& rm, Condition cond) argument
644 csinc(const Register& rd, const Register& rn, const Register& rm, Condition cond) argument
652 csinv(const Register& rd, const Register& rn, const Register& rm, Condition cond) argument
660 csneg(const Register& rd, const Register& rn, const Register& rm, Condition cond) argument
700 ConditionalSelect(const Register& rd, const Register& rn, const Register& rm, Condition cond, ConditionalSelectOp op) argument
727 DataProcessing3Source(const Register& rd, const Register& rn, const Register& rm, const Register& ra, DataProcessing3SourceOp op) argument
800 mul(const Register& rd, const Register& rn, const Register& rm) argument
808 madd(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
816 mneg(const Register& rd, const Register& rn, const Register& rm) argument
824 msub(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
881 sdiv(const Register& rd, const Register& rn, const Register& rm) argument
906 udiv(const Register& rd, const Register& rn, const Register& rm) argument
[all...]
H A Dassembler-aarch64.h672 void lslv(const Register& rd, const Register& rn, const Register& rm);
675 void lsrv(const Register& rd, const Register& rn, const Register& rm);
678 void asrv(const Register& rd, const Register& rn, const Register& rm);
681 void rorv(const Register& rd, const Register& rn, const Register& rm);
814 const Register& rm,
817 // Conditional select: rd = cond ? rn : rm.
820 const Register& rm,
823 // Conditional select increment: rd = cond ? rn : rm + 1.
826 const Register& rm,
829 // Conditional select inversion: rd = cond ? rn : ~rm
2594 Rm(CPURegister rm) argument
2599 RmNot31(CPURegister rm) argument
[all...]
H A Ddisasm-aarch64.cc4843 unsigned rm = instr->GetRm(); local
4844 if (rm == kZeroRegCode) {
4847 AppendToOutput("%c%d", reg_type, rm);
/external/clang/lib/StaticAnalyzer/Core/
H A DRegionStore.cpp669 ClusterAnalysis(RegionStoreManager &rm, ProgramStateManager &StateMgr, argument
671 : RM(rm), Ctx(StateMgr.getContext()),
937 invalidateRegionsWorker(RegionStoreManager &rm, argument
946 : ClusterAnalysis<invalidateRegionsWorker>(rm, stateMgr, b),
2280 removeDeadBindingsWorker(RegionStoreManager &rm, argument
2284 : ClusterAnalysis<removeDeadBindingsWorker>(rm, stateMgr, b),
/external/linux-kselftest/tools/testing/selftests/x86/
H A Dmpx-mini-test.c228 uint8_t rm; local
257 rm = modrm & 7;
266 if (rm == 4) {
290 if (rm == 5)
/external/icu/icu4c/source/test/cintltst/
H A Dcbiditst.c1706 UBiDiReorderingMode rm; local
1769 rm = ubidi_getReorderingMode(bidi);
1771 if (rm != ubidi_getReorderingMode(bidi)) {
1775 if (rm != ubidi_getReorderingMode(bidi)) {

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