Searched defs:subreg (Results 1 - 7 of 7) sorted by relevance
/external/mesa3d/src/gallium/drivers/ilo/shader/ |
H A D | toy_compiler.c | 47 int reg, subreg; local 51 subreg = (val32 % TOY_REG_WIDTH) / toy_type_size(type); 69 if (subreg) 70 ilo_printf(".%d", subreg); 78 ilo_printf("a0.%d", subreg); 82 ilo_printf("acc%d.%d", (reg & 1), subreg); 85 ilo_printf("f0.%d", subreg); 88 ilo_printf("sr0.%d", subreg); 91 ilo_printf("cr0.%d", subreg); 95 ilo_printf("n%d.%d", (reg & 1), subreg); [all...] |
H A D | toy_legalize_ra.c | 533 int subreg = val32 % TOY_REG_WIDTH; local 539 inst->dst.val32 = reg * TOY_REG_WIDTH + subreg; 544 int reg, subreg; local 550 subreg = val32 % TOY_REG_WIDTH; 556 inst->src[i].val32 = reg * TOY_REG_WIDTH + subreg; 581 int subreg = val32 % TOY_REG_WIDTH; local 586 inst->dst.val32 = reg * TOY_REG_WIDTH + subreg; 594 int reg, subreg; local 600 subreg = val32 % TOY_REG_WIDTH; 605 inst->src[i].val32 = reg * TOY_REG_WIDTH + subreg; [all...] |
H A D | ilo_shader_gs.c | 574 int slot, reg = -1, subreg; local 586 subreg = (i % 2) * 4; 612 attr = tsrc_offset(gcc->payload.vues[dim], reg, subreg); 619 attr = tsrc_offset(gcc->payload.vues[dim], reg, subreg); 625 attr = tsrc_offset(gcc->payload.vues[dim], reg, subreg);
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H A D | toy_compiler.h | 142 uint32_t subreg[32]; member in struct:toy_compaction_table
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H A D | toy_compiler_reg.h | 124 unsigned indirect_subreg:6; /* which subreg of a0? */ 140 unsigned indirect_subreg:6; /* which subreg of a0? */ 336 tdst_offset(struct toy_dst dst, int reg, int subreg) argument 338 dst.val32 += reg * TOY_REG_WIDTH + subreg * toy_type_size(dst.type); 616 tsrc_offset(struct toy_src src, int reg, int subreg) argument 618 src.val32 += reg * TOY_REG_WIDTH + subreg * toy_type_size(src.type);
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H A D | toy_compiler_disasm.c | 46 unsigned subreg:5; member in struct:disasm_operand 340 inst->dst.base.subreg = GEN_EXTRACT(dw1, GEN6_INST_DST_SUBREG); 342 inst->dst.base.subreg = 456 src->base.subreg = GEN_EXTRACT(dw, GEN6_INST_SRC_SUBREG); 458 src->base.subreg = GEN_EXTRACT(dw, GEN6_INST_SRC_SUBREG_ALIGN16) << 561 inst->dst.base.subreg = GEN_EXTRACT(dw1, GEN6_3SRC_DST_SUBREG) << 622 inst->dst.base.subreg = GEN_EXTRACT(dw1, GEN6_3SRC_DST_SUBREG) << 646 src->base.subreg = GEN_EXTRACT(dw, GEN6_3SRC_SRC_SUBREG) << 1527 unsigned reg, subreg; local 1533 subreg [all...] |
/external/mesa3d/src/mesa/drivers/dri/i965/ |
H A D | brw_eu.c | 173 void brw_set_default_flag_reg(struct brw_codegen *p, int reg, int subreg) argument 178 brw_inst_set_flag_subreg_nr(p->devinfo, p->current, subreg);
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