/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
H A D | RegAllocPBQP.h | 35 /// to a register allocation solution. (i.e. The PBQP-node <--> vreg map, 48 /// and the set of allowed pregs for the vreg. 54 void recordVReg(unsigned vreg, PBQP::Graph::NodeItr node, argument 57 assert(vreg2Node.find(vreg) == vreg2Node.end() && "Re-mapping vreg."); 58 assert(allowedSets[vreg].empty() && "vreg already has pregs."); 60 node2VReg[node] = vreg; 61 vreg2Node[vreg] = node; 62 std::copy(arBegin, arEnd, std::back_inserter(allowedSets[vreg])); 73 isPRegOption(unsigned vreg, unsigned option) const argument 81 isSpillOption(unsigned vreg, unsigned option) const argument [all...] |
H A D | LiveIntervalAnalysis.h | 410 unsigned vreg; member in struct:llvm::LiveIntervals::SRInfo 413 : index(i), vreg(vr), canFold(f) {}
|
/external/v8/src/compiler/ |
H A D | instruction-scheduler.cc | 176 int32_t vreg = UnallocatedOperand::cast(input)->virtual_register(); local 177 auto it = operands_map_.find(vreg);
|
H A D | register-allocator-verifier.cc | 162 int vreg = unallocated->virtual_register(); local 163 constraint->virtual_register_ = vreg; 171 if (sequence()->IsFP(vreg)) { 191 if (sequence()->IsFP(vreg)) { 200 ElementSizeLog2Of(sequence()->GetRepresentation(vreg)); 563 int vreg = pair.second; local 570 vreg); 576 pending, vreg); 578 new (zone()) FinalAssessment(vreg, pending);
|
H A D | register-allocator-verifier.h | 215 void AddDelayedAssessment(InstructionOperand op, int vreg) { argument 218 map_.insert(std::make_pair(op, vreg)); 220 CHECK_EQ(it->second, vreg);
|
H A D | graph-visualizer.cc | 280 void PrintLiveRange(const LiveRange* range, const char* type, int vreg); 573 int vreg = range->vreg(); local 576 PrintLiveRange(child, type, vreg); 581 int vreg) { 584 os_ << vreg << ":" << range->relative_id() << " " << type; 618 os_ << " " << vreg; local 580 PrintLiveRange(const LiveRange* range, const char* type, int vreg) argument
|
H A D | instruction-selector-impl.h | 187 InstructionOperand DefineSameAsFirstForVreg(int vreg) { argument 188 return UnallocatedOperand(UnallocatedOperand::SAME_AS_FIRST_INPUT, vreg); 191 InstructionOperand DefineAsRegistertForVreg(int vreg) { argument 192 return UnallocatedOperand(UnallocatedOperand::MUST_HAVE_REGISTER, vreg); 195 InstructionOperand UseRegisterForVreg(int vreg) { argument 197 UnallocatedOperand::USED_AT_START, vreg);
|
H A D | instruction.cc | 793 int vreg = (output->IsConstant()) local 796 CHECK(!definitions.Contains(vreg)); 797 definitions.Add(vreg);
|
H A D | register-allocator.h | 489 explicit TopLevelLiveRange(int vreg, MachineRepresentation rep); 593 int vreg() const { return vreg_; } function in class:v8::internal::compiler::LiveRange::final 829 return code()->IsReference(top_range->vreg());
|
/external/vixl/test/aarch64/ |
H A D | test-utils-aarch64.cc | 160 const VRegister& vreg) { 161 VIXL_ASSERT(vreg.Is128Bits()); 163 vec128_t result = core->qreg(vreg.GetCode()); 207 const VRegister& vreg) { 208 VIXL_ASSERT(vreg.Is64Bits()); 209 uint64_t result = core->dreg_bits(vreg.GetCode()); 157 Equal128(uint64_t expected_h, uint64_t expected_l, const RegisterDump* core, const VRegister& vreg) argument 205 Equal64(uint64_t expected, const RegisterDump* core, const VRegister& vreg) argument
|
/external/mesa3d/src/gallium/drivers/r600/sb/ |
H A D | sb_bc_finalize.cpp | 486 unsigned vreg = v->gpr.sel(); local 490 reg = vreg; 491 else if ((unsigned)reg != vreg) { 591 unsigned vreg = v->gpr.sel(); local 595 reg = vreg; 596 else if ((unsigned)reg != vreg) { 638 unsigned vreg = v->gpr.sel(); local 642 reg = vreg; 643 else if ((unsigned)reg != vreg) { 710 unsigned vreg local 755 unsigned vreg = v->gpr.sel(); local 789 unsigned vreg = v->gpr.sel(); local [all...] |
/external/swiftshader/third_party/LLVM/lib/CodeGen/ |
H A D | Splitter.cpp | 100 unsigned vreg = ls.mri->createVirtualRegister(trc); local 101 newLI = &ls.lis->getOrCreateInterval(vreg);
|
H A D | VirtRegRewriter.cpp | 89 /// rewrites vreg def/uses to use the assigned preg, but does not insert any 372 unsigned vreg) 374 AssignedPhysReg(apr), VirtReg(vreg) {} 2465 // so, realize that the vreg is available now, and add the store to the 371 ReusedOp(unsigned o, unsigned ss, unsigned prr, unsigned apr, unsigned vreg) argument
|
H A D | RegAllocPBQP.cpp | 141 /// \brief Finds the initial set of vreg intervals to allocate. 165 assert(vregItr != node2VReg.end() && "No vreg for node."); 169 PBQP::Graph::NodeItr PBQPRAProblem::getNodeForVReg(unsigned vreg) const { 170 VReg2Node::const_iterator nodeItr = vreg2Node.find(vreg); 171 assert(nodeItr != vreg2Node.end() && "No node for vreg."); 177 PBQPRAProblem::getAllowedSet(unsigned vreg) const { 178 AllowedSetMap::const_iterator allowedSetItr = allowedSets.find(vreg); 179 assert(allowedSetItr != allowedSets.end() && "No pregs for vreg."); 184 unsigned PBQPRAProblem::getPRegForOption(unsigned vreg, unsigned option) const { argument 185 assert(isPRegOption(vreg, optio 220 unsigned vreg = *vregItr; local 528 unsigned vreg = problem.getVRegForNode(node); local [all...] |
/external/v8/src/x64/ |
H A D | assembler-x64-inl.h | 228 void Assembler::emit_vex_prefix(XMMRegister reg, XMMRegister vreg, argument 234 emit_vex3_byte2(w, vreg, l, pp); 237 emit_vex2_byte1(reg, vreg, l, pp); 242 void Assembler::emit_vex_prefix(Register reg, Register vreg, Register rm, argument 246 XMMRegister ivreg = {vreg.code()}; 252 void Assembler::emit_vex_prefix(XMMRegister reg, XMMRegister vreg, argument 258 emit_vex3_byte2(w, vreg, l, pp); 261 emit_vex2_byte1(reg, vreg, l, pp); 266 void Assembler::emit_vex_prefix(Register reg, Register vreg, const Operand& rm, argument 270 XMMRegister ivreg = {vreg [all...] |
/external/valgrind/VEX/priv/ |
H A D | host_generic_reg_alloc2.c | 109 vreg. Is safely left at False, and becomes True after a 115 Bound /* in use (holding value of some vreg) */ 118 /* If .disp == Bound, what vreg is it bound to? */ 119 HReg vreg; member in struct:__anon28367 125 (vreg_state) from vreg numbers back to entries in rreg_state. It 127 hregNumber(rreg_state[j].vreg) == i -- that is, the two entries 129 which involve looking for a particular vreg: there is no need to 131 vreg_state. The FAQ "does this vreg already have an associated 134 To indicate, in vreg_state[i], that a given vreg is not currently 149 finding the vreg whic 604 HReg vreg = reg_usage_arr[ii].vRegs[j]; local 1283 HReg vreg = reg_usage_arr[ii].vRegs[j]; local 1336 HReg vreg = reg_usage_arr[ii].vRegs[j]; local [all...] |
H A D | host_amd64_defs.c | 1998 AMD64Instr* directReload_AMD64( AMD64Instr* i, HReg vreg, Short spill_off ) argument 2002 /* Deal with form: src=RMI_Reg, dst=Reg where src == vreg 2009 && sameHReg(i->Ain.Alu64R.src->Armi.Reg.reg, vreg)) { 2010 vassert(! sameHReg(i->Ain.Alu64R.dst, vreg)); 2018 /* Deal with form: src=RMI_Imm, dst=Reg where dst == vreg 2024 && sameHReg(i->Ain.Alu64R.dst, vreg)) {
|
H A D | host_x86_defs.c | 1755 /* The given instruction reads the specified vreg exactly once, and 1756 that vreg is currently located at the given spill offset. If 1760 X86Instr* directReload_X86( X86Instr* i, HReg vreg, Short spill_off ) argument 1764 /* Deal with form: src=RMI_Reg, dst=Reg where src == vreg 1771 && sameHReg(i->Xin.Alu32R.src->Xrmi.Reg.reg, vreg)) { 1772 vassert(! sameHReg(i->Xin.Alu32R.dst, vreg)); 1780 /* Deal with form: src=RMI_Imm, dst=Reg where dst == vreg 1786 && sameHReg(i->Xin.Alu32R.dst, vreg)) { 1799 && sameHReg(i->Xin.Push.src->Xrmi.Reg.reg, vreg)) { 1805 /* Deal with form: CMov32(src=RM_Reg, dst) where vreg [all...] |
/external/v8/src/crankshaft/ |
H A D | lithium-allocator.cc | 836 int vreg = GetVirtualRegister(); local 838 cur_input->set_virtual_register(vreg); 2029 int vreg = GetVirtualRegister(); local 2031 LiveRange* result = LiveRangeFor(vreg);
|
/external/v8/src/crankshaft/arm/ |
H A D | lithium-arm.cc | 564 int vreg = allocator_->GetVirtualRegister(); local 567 vreg = 0; 569 operand->set_virtual_register(vreg); 577 int vreg = allocator_->GetVirtualRegister(); local 580 vreg = 0; 582 operand->set_virtual_register(vreg);
|
/external/v8/src/crankshaft/arm64/ |
H A D | lithium-arm64.cc | 461 int vreg = allocator_->GetVirtualRegister(); local 464 vreg = 0; 466 operand->set_virtual_register(vreg); 474 int vreg = allocator_->GetVirtualRegister(); local 477 vreg = 0; 479 operand->set_virtual_register(vreg);
|
/external/v8/src/crankshaft/ia32/ |
H A D | lithium-ia32.cc | 609 int vreg = allocator_->GetVirtualRegister(); local 612 vreg = 0; 614 operand->set_virtual_register(vreg);
|
/external/v8/src/crankshaft/mips/ |
H A D | lithium-mips.cc | 571 int vreg = allocator_->GetVirtualRegister(); local 574 vreg = 0; 576 operand->set_virtual_register(vreg); 584 int vreg = allocator_->GetVirtualRegister(); local 587 vreg = 0; 589 operand->set_virtual_register(vreg);
|
/external/v8/src/crankshaft/mips64/ |
H A D | lithium-mips64.cc | 571 int vreg = allocator_->GetVirtualRegister(); local 574 vreg = 0; 576 operand->set_virtual_register(vreg); 584 int vreg = allocator_->GetVirtualRegister(); local 587 vreg = 0; 589 operand->set_virtual_register(vreg);
|
/external/v8/src/crankshaft/ppc/ |
H A D | lithium-ppc.cc | 576 int vreg = allocator_->GetVirtualRegister(); local 579 vreg = 0; 581 operand->set_virtual_register(vreg); 589 int vreg = allocator_->GetVirtualRegister(); local 592 vreg = 0; 594 operand->set_virtual_register(vreg);
|