Searched refs:opc (Results 76 - 100 of 112) sorted by relevance

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/external/wpa_supplicant_8/src/eap_peer/
H A Deap_aka.c275 u8 opc[16], k[16], sqn[6]; local
292 if (hexstr2bin(pos, opc, 16))
302 return milenage_check(opc, k, sqn, data->rand, data->autn,
/external/wpa_supplicant_8/wpa_supplicant/src/eap_peer/
H A Deap_aka.c275 u8 opc[16], k[16], sqn[6]; local
292 if (hexstr2bin(pos, opc, 16))
302 return milenage_check(opc, k, sqn, data->rand, data->autn,
/external/llvm/include/llvm/Target/
H A DTargetInstrInfo.h1273 virtual bool isHighLatencyDef(int opc) const { return false; }
H A DTargetLowering.h541 unsigned opc; // target opcode member in struct:llvm::TargetLoweringBase::IntrinsicInfo
552 IntrinsicInfo() : opc(0), ptrVal(nullptr), offset(0), size(0), align(1),
/external/libpcap/
H A Dscanner.l370 opc return OPC;
/external/llvm/lib/IR/
H A DCore.cpp1058 #define HANDLE_INST(num, opc, clas) case num: return LLVM##opc;
1067 #define HANDLE_INST(num, opc, clas) case LLVM##opc: return num;
/external/swiftshader/third_party/LLVM/lib/Target/Mips/
H A DMipsISelLowering.cpp424 unsigned opc = N->getOpcode() == ISD::SDIVREM ? MipsISD::DivRem : local
428 SDValue DivRem = DAG.getNode(opc, dl, MVT::Glue,
640 unsigned opc = N->getOpcode(); local
642 switch (opc) {
/external/swiftshader/third_party/LLVM/lib/VMCore/
H A DCore.cpp665 #define HANDLE_INST(num, opc, clas) case num: return LLVM##opc;
676 #define HANDLE_INST(num, opc, clas) case LLVM##opc: return num;
/external/valgrind/VEX/priv/
H A Dhost_arm64_defs.c3354 UInt opc = 0; /* invalid */ local
3358 case ARM64lo_OR: opc = X101; break;
3359 case ARM64lo_AND: opc = X100; break;
3360 case ARM64lo_XOR: opc = X110; break;
3363 vassert(opc != 0);
3370 opc, X100100, argR->ARM64riL.I13.bitN,
3382 *p++ = X_3_8_5_6_5_5(opc, X01010000, rM, X000000, rN, rD);
H A Dguest_arm_toIR.c12754 UInt regD = 99, regM = 99, opc = 4/*invalid*/; local
12764 opc = INSN(7,6);
12784 assign(src, opc == BITS2(0,0) || opc == BITS2(0,1)
12797 vassert(opc >= 0 && opc <= 3);
12798 void* helper = helpers[opc];
12799 const HChar* hname = hNames[opc];
12814 DIP("%s.8 q%d, q%d\n", iNames[opc], regD >> 1, regM >> 1);
14709 UInt opc local
14757 UInt opc = (INSN(22,21) << 2) | INSN(6,5); local
14934 UInt opc = (bP << 3) | (bQ << 2) | (bR << 1) | bS; local
15442 UInt opc = (bP << 3) | (bQ << 2) | (bR << 1) | bS; local
[all...]
H A Dhost_ppc_defs.c5076 UInt opc; local
5081 opc = (sz == 4) ? 535 : 599;
5082 p = doAMode_RR(p, 31, opc, f_reg, am_addr, mode64, endness_host);
5084 opc = (sz == 4) ? 48 : 50;
5085 p = doAMode_IR(p, opc, f_reg, am_addr, mode64, endness_host);
5089 opc = (sz == 4) ? 663 : 727;
5090 p = doAMode_RR(p, 31, opc, f_reg, am_addr, mode64, endness_host);
5092 opc = (sz == 4) ? 52 : 54;
5093 p = doAMode_IR(p, opc, f_reg, am_addr, mode64, endness_host);
H A Dguest_s390_toIR.c583 s390_cc_thunk_put1(UInt opc, IRTemp d1, Bool sign_extend) argument
587 op = mkU64(opc);
597 s390_cc_thunk_put2(UInt opc, IRTemp d1, IRTemp d2, Bool sign_extend) argument
601 op = mkU64(opc);
622 s390_cc_thunk_put3(UInt opc, IRTemp d1, IRTemp d2, IRTemp nd, Bool sign_extend) argument
626 op = mkU64(opc);
639 s390_cc_thunk_put1f(UInt opc, IRTemp d1) argument
651 op = mkU64(opc);
663 s390_cc_thunk_putFZ(UInt opc, IRTemp d1, IRTemp d2) argument
675 op = mkU64(opc);
687 s390_cc_thunk_put1f128(UInt opc, IRTemp d1) argument
703 s390_cc_thunk_put1f128Z(UInt opc, IRTemp d1, IRTemp nd) argument
721 s390_cc_thunk_put1d128(UInt opc, IRTemp d1) argument
737 s390_cc_thunk_put1d128Z(UInt opc, IRTemp d1, IRTemp nd) argument
785 s390_call_calculate_icc(UInt m, UInt opc, IRTemp op1, IRTemp op2) argument
[all...]
/external/pcre/dist2/src/sljit/
H A DsljitNativeTILEGX-encoder.c9544 const struct tilegx_opcode *opc; local
9549 opc = find_opcode (bits, (tilegx_pipeline)pipe);
9550 d->opcode = opc;
9553 for (i = 0; i < opc->num_operands; i++)
9556 &tilegx_operands[opc->operands[pipe][i]];
/external/valgrind/perf/
H A Dtinycc.c6160 int r, fr, opc, c;
6165 opc = 0;
6176 o(0xc0 | (opc << 3) | r);
6180 oad(0xc0 | (opc << 3) | r, c);
6186 o((opc << 3) | 0x01);
6197 opc = 5;
6200 opc = 2;
6203 opc = 3;
6206 opc = 4;
6209 opc
6158 int r, fr, opc, c; local
[all...]
/external/libmtp/src/
H A Dptp.c3621 * uint16_t opc - object property code
3629 PTPParams* params, uint16_t opc, uint16_t ofc, PTPObjectPropDesc *opd
3635 PTP_CNT_INIT(ptp, PTP_OC_MTP_GetObjectPropDesc, opc, ofc);
3649 * uint16_t opc - object prop code
3656 PTPParams* params, uint32_t oid, uint16_t opc,
3664 PTP_CNT_INIT(ptp, PTP_OC_MTP_GetObjectPropValue, oid, opc);
3681 * uint16_t opc - object prop code
3688 PTPParams* params, uint32_t oid, uint16_t opc,
3696 PTP_CNT_INIT(ptp, PTP_OC_MTP_SetObjectPropValue, oid, opc);
3628 ptp_mtp_getobjectpropdesc( PTPParams* params, uint16_t opc, uint16_t ofc, PTPObjectPropDesc *opd ) argument
3655 ptp_mtp_getobjectpropvalue( PTPParams* params, uint32_t oid, uint16_t opc, PTPPropertyValue *value, uint16_t datatype ) argument
3687 ptp_mtp_setobjectpropvalue( PTPParams* params, uint32_t oid, uint16_t opc, PTPPropertyValue *value, uint16_t datatype ) argument
H A Dptp.h2738 uint16_t ptp_mtp_getobjectpropdesc (PTPParams* params, uint16_t opc, uint16_t ofc,
2740 uint16_t ptp_mtp_getobjectpropvalue (PTPParams* params, uint32_t oid, uint16_t opc,
2742 uint16_t ptp_mtp_setobjectpropvalue (PTPParams* params, uint32_t oid, uint16_t opc,
/external/swiftshader/third_party/LLVM/include/llvm/Target/
H A DTargetLowering.h321 unsigned opc; // target opcode member in struct:llvm::TargetLowering::IntrinsicInfo
/external/capstone/arch/ARM/
H A DARMInstPrinter.c721 unsigned int opc = MCInst_getOpcode(MI); local
730 if (ARM_rel_branch(MI->csh, opc)) {
736 if (ARM_blx_to_arm_mode(MI->csh, opc)) {
849 // Print the shift opc.
877 // Print the shift opc.
1860 // Print the shift opc.
H A DARMDisassembler.c3937 unsigned opc = fieldFromInstruction_4(Insn, 4, 28); local
3938 switch (opc) {
/external/llvm/lib/Target/Hexagon/
H A DHexagonInstrInfo.cpp2657 llvm_unreachable("Not an auto-inc opc!");
3618 int HexagonInstrInfo::getDotOldOp(const int opc) const {
3619 int NewOp = opc;
/external/llvm/lib/Target/ARM/
H A DARMISelDAGToDAG.cpp2970 unsigned opc = Subtarget->isThumb() ? ARM::t2UMAAL : ARM::UMAAL; local
2971 CurDAG->SelectNodeTo(N, opc, MVT::i32, MVT::i32, Ops);
3385 Ops.push_back(getI32Imm(cast<ConstantSDNode>(N->getOperand(3))->getZExtValue(), dl)); /* opc */
/external/llvm/lib/Transforms/Vectorize/
H A DSLPVectorizer.cpp1704 for (unsigned op = 0, opc = CI->getNumArgOperands(); op!= opc; ++op) {
/external/swiftshader/third_party/LLVM/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp1407 ARM_AM::AddrOpc opc = PostIdxReg.isAdd ? ARM_AM::add : ARM_AM::sub; local
1408 unsigned Imm = ARM_AM::getAM2Opc(opc, PostIdxReg.ShiftImm,
/external/swiftshader/third_party/LLVM/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp3126 unsigned opc = fieldFromInstruction32(Insn, 4, 28); local
3127 switch (opc) {
/external/swiftshader/third_party/LLVM/lib/Target/X86/
H A DX86InstrInfo.cpp3401 bool X86InstrInfo::isHighLatencyDef(int opc) const {
3402 switch (opc) {

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