Searched refs:src1 (Results 126 - 150 of 339) sorted by relevance

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/external/mesa3d/src/compiler/nir/
H A Dnir_lower_indirect_derefs.c85 nir_phi_src *src1 = ralloc(phi, nir_phi_src); local
86 src1->pred = nir_if_last_else_block(if_stmt);
87 src1->src = nir_src_for_ssa(else_dest);
88 exec_list_push_tail(&phi->srcs, &src1->node);
H A Dnir_lower_double_ops.c442 lower_mod(nir_builder *b, nir_ssa_def *src0, nir_ssa_def *src1) argument
450 nir_ssa_def *floor = nir_ffloor(b, nir_fdiv(b, src0, src1));
451 nir_ssa_def *mod = nir_fsub(b, src0, nir_fmul(b, src1, floor));
454 nir_fne(b, mod, src1),
552 nir_ssa_def *src1 = nir_fmov_alu(&bld, instr->src[1], local
554 result = lower_mod(&bld, src, src1);
/external/mesa3d/src/gallium/drivers/llvmpipe/
H A Dlp_bld_blend.h65 LLVMValueRef src1,
/external/mesa3d/src/intel/vulkan/
H A Danv_nir_apply_dynamic_offsets.c110 nir_phi_src *src1 = ralloc(phi, nir_phi_src); local
112 src1->pred = exec_node_data(nir_block, tnode, cf_node.node);
113 src1->src = nir_src_for_ssa(&intrin->dest.ssa);
114 exec_list_push_tail(&phi->srcs, &src1->node);
/external/v8/src/ppc/
H A Dassembler-ppc.cc769 void Assembler::xor_(Register dst, Register src1, Register src2, RCBit rc) { argument
770 x_form(EXT2 | XORX, dst, src1, src2, rc);
849 void Assembler::srw(Register dst, Register src1, Register src2, RCBit r) { argument
850 x_form(EXT2 | SRWX, dst, src1, src2, r);
854 void Assembler::slw(Register dst, Register src1, Register src2, RCBit r) { argument
855 x_form(EXT2 | SLWX, dst, src1, src2, r);
883 void Assembler::addc(Register dst, Register src1, Register src2, OEBit o, argument
885 xo_form(EXT2 | ADDCX, dst, src1, src2, o, r);
888 void Assembler::adde(Register dst, Register src1, Register src2, OEBit o, argument
890 xo_form(EXT2 | ADDEX, dst, src1, src
893 addze(Register dst, Register src1, OEBit o, RCBit r) argument
899 sub(Register dst, Register src1, Register src2, OEBit o, RCBit r) argument
904 subc(Register dst, Register src1, Register src2, OEBit o, RCBit r) argument
909 sube(Register dst, Register src1, Register src2, OEBit o, RCBit r) argument
919 add(Register dst, Register src1, Register src2, OEBit o, RCBit r) argument
926 mullw(Register dst, Register src1, Register src2, OEBit o, RCBit r) argument
933 mulhw(Register dst, Register src1, Register src2, RCBit r) argument
939 mulhwu(Register dst, Register src1, Register src2, RCBit r) argument
945 divw(Register dst, Register src1, Register src2, OEBit o, RCBit r) argument
952 divwu(Register dst, Register src1, Register src2, OEBit o, RCBit r) argument
992 nor(Register dst, Register src1, Register src2, RCBit r) argument
1012 orx(Register dst, Register src1, Register src2, RCBit rc) argument
1017 orc(Register dst, Register src1, Register src2, RCBit rc) argument
1022 cmpi(Register src1, const Operand& src2, CRegister cr) argument
1036 cmpli(Register src1, const Operand& src2, CRegister cr) argument
1050 cmp(Register src1, Register src2, CRegister cr) argument
1062 cmpl(Register src1, Register src2, CRegister cr) argument
1074 cmpwi(Register src1, const Operand& src2, CRegister cr) argument
1092 cmplwi(Register src1, const Operand& src2, CRegister cr) argument
1102 cmpw(Register src1, Register src2, CRegister cr) argument
1110 cmplw(Register src1, Register src2, CRegister cr) argument
1377 andc(Register dst, Register src1, Register src2, RCBit rc) argument
1512 srd(Register dst, Register src1, Register src2, RCBit r) argument
1517 sld(Register dst, Register src1, Register src2, RCBit r) argument
1552 mulld(Register dst, Register src1, Register src2, OEBit o, RCBit r) argument
1558 divd(Register dst, Register src1, Register src2, OEBit o, RCBit r) argument
1564 divdu(Register dst, Register src1, Register src2, OEBit o, RCBit r) argument
[all...]
H A Dmacro-assembler-ppc.h282 void Push(Register src1, Register src2) { argument
284 StoreP(src1, MemOperand(sp, kPointerSize));
288 void Push(Register src1, Register src2, Register src3) { argument
291 StoreP(src1, MemOperand(sp, 2 * kPointerSize));
295 void Push(Register src1, Register src2, Register src3, Register src4) { argument
299 StoreP(src1, MemOperand(sp, 3 * kPointerSize));
303 void Push(Register src1, Register src2, Register src3, Register src4, argument
309 StoreP(src1, MemOperand(sp, 4 * kPointerSize));
315 void Pop(Register src1, Register src2) { argument
317 LoadP(src1, MemOperan
322 Pop(Register src1, Register src2, Register src3) argument
330 Pop(Register src1, Register src2, Register src3, Register src4) argument
339 Pop(Register src1, Register src2, Register src3, Register src4, Register src5) argument
[all...]
/external/vboot_reference/firmware/lib/include/
H A Dutility.h50 * Compare [n] bytes in [src1] and [src2].
53 * [n] bytes of [src1] is found, respectively, to be less than, to match, or be
55 int Memcmp(const void *src1, const void *src2, size_t n);
/external/v8/src/crankshaft/mips/
H A Dlithium-codegen-mips.h230 Register src1 = zero_reg,
234 Register src1 = zero_reg,
272 Register src1,
277 FPURegister src1,
280 void EmitTrueBranch(InstrType instr, Condition condition, Register src1,
283 void EmitFalseBranch(InstrType instr, Condition condition, Register src1,
288 FPURegister src1,
/external/v8/src/crankshaft/mips64/
H A Dlithium-codegen-mips64.h232 Register src1 = zero_reg,
236 Register src1 = zero_reg,
275 Register src1,
280 FPURegister src1,
283 void EmitTrueBranch(InstrType instr, Condition condition, Register src1,
286 void EmitFalseBranch(InstrType instr, Condition condition, Register src1,
291 FPURegister src1,
/external/icu/icu4c/source/i18n/
H A Ducol.cpp116 ucol_mergeSortkeys(const uint8_t *src1, int32_t src1Length, argument
120 if( src1==NULL || src1Length<-1 || src1Length==0 || (src1Length>0 && src1[src1Length-1]!=0) ||
133 src1Length=(int32_t)uprv_strlen((const char *)src1)+1;
148 /* copy level from src1 not including 00 or 01 */
150 while((b=*src1)>=2) {
151 ++src1;
165 if(*src1==1 && *src2==1) {
166 ++src1;
179 if(*src1!
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/external/mesa3d/src/gallium/auxiliary/tgsi/
H A Dtgsi_ureg.h784 struct ureg_src src1 ) \
803 ureg_emit_src( ureg, src1 ); \
812 struct ureg_src src1 ) \
832 ureg_emit_src( ureg, src1 ); \
840 struct ureg_src src1 ) \
861 ureg_emit_src( ureg, src1 ); \
869 struct ureg_src src1, \
889 ureg_emit_src( ureg, src1 ); \
898 struct ureg_src src1, \
920 ureg_emit_src( ureg, src1 ); \
[all...]
/external/v8/src/x64/
H A Dmacro-assembler-x64.h472 Register src1,
570 void JumpIfNotBothSmi(Register src1,
576 void JumpUnlessBothNonNegativeSmi(Register src1, Register src2,
618 // If dst is src1, then src1 will be destroyed if the operation is
621 Register src1,
626 Register src1,
632 Register src1,
636 // If dst is src1, then src1 wil
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/external/pcre/dist2/src/sljit/
H A DsljitNativeARM_32.c820 #define EMIT_DATA_PROCESS_INS(opcode, set_flags, dst, src1, src2) \
821 (0xe0000000 | ((opcode) << 21) | (set_flags) | RD(dst) | RN(src1) | (src2))
825 sljit_s32 src1, sljit_sw src1w,
964 src1: reg
970 return push_inst(compiler, EMIT_DATA_PROCESS_INS(opcode, flags & SET_FLAGS, dst, src1, (src2 & SRC2_IMM) ? src2 : RM(src2)))
972 #define EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(opcode, dst, src1, src2) \
973 return push_inst(compiler, EMIT_DATA_PROCESS_INS(opcode, flags & SET_FLAGS, dst, src1, src2))
978 SLJIT_ASSERT(src1 == TMP_REG1); \
984 return push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, flags & SET_FLAGS, dst, SLJIT_UNUSED, (reg_map[(flags & ARGS_SWAPPED) ? src1 : src2] << 8) | (opcode << 5) | 0x10 | ((flags & ARGS_SWAPPED) ? reg_map[src2] : reg_map[src1])));
986 emit_single_op(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 flags, sljit_s32 dst, sljit_s32 src1, sljit_s32 src2) argument
1602 emit_op(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 inp_flags, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument
1932 sljit_emit_op2(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument
2152 sljit_emit_fop1_cmp(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument
2218 sljit_emit_fop2(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument
[all...]
H A DsljitLir.c1096 sljit_s32 src1, sljit_sw src1w,
1107 FUNCTION_CHECK_SRC(src1, src1w);
1118 sljit_verbose_param(compiler, src1, src1w);
1212 sljit_s32 src1, sljit_sw src1w,
1224 FUNCTION_FCHECK(src1, src1w);
1231 sljit_verbose_fparam(compiler, src1, src1w);
1302 sljit_s32 src1, sljit_sw src1w,
1309 FUNCTION_FCHECK(src1, src1w);
1318 sljit_verbose_fparam(compiler, src1, src1w);
1360 sljit_s32 src1, sljit_s
1094 check_sljit_emit_op2(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument
1211 check_sljit_emit_fop1_cmp(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument
1300 check_sljit_emit_fop2(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument
1359 check_sljit_emit_cmp(struct sljit_compiler *compiler, sljit_s32 type, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument
1382 check_sljit_emit_fcmp(struct sljit_compiler *compiler, sljit_s32 type, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument
1595 sljit_emit_cmp(struct sljit_compiler *compiler, sljit_s32 type, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument
1677 sljit_emit_fcmp(struct sljit_compiler *compiler, sljit_s32 type, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument
1858 sljit_emit_op2(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument
1911 sljit_emit_fop2(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument
1943 sljit_emit_cmp(struct sljit_compiler *compiler, sljit_s32 type, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument
1957 sljit_emit_fcmp(struct sljit_compiler *compiler, sljit_s32 type, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument
[all...]
H A DsljitNativeARM_64.c1432 sljit_s32 src1, sljit_sw src1w,
1438 CHECK(check_sljit_emit_op2(compiler, op, dst, dstw, src1, src1w, src2, src2w));
1440 ADJUST_LOCAL_OFFSET(src1, src1w);
1460 if (src1 & SLJIT_MEM) {
1461 if (getput_arg_fast(compiler, mem_flags, TMP_REG1, src1, src1w))
1474 if (!can_cache(src1, src1w, src2, src2w) && can_cache(src1, src1w, dst, dstw)) {
1475 FAIL_IF(getput_arg(compiler, mem_flags, TMP_REG2, src2, src2w, src1, src1w));
1476 FAIL_IF(getput_arg(compiler, mem_flags, TMP_REG1, src1, src1w, dst, dstw));
1479 FAIL_IF(getput_arg(compiler, mem_flags, TMP_REG1, src1, src1
1430 sljit_emit_op2(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument
1654 sljit_emit_fop1_cmp(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument
1721 sljit_emit_fop2(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument
[all...]
/external/swiftshader/src/Shader/
H A DPixelPipeline.cpp88 const Src &src1 = instruction->src[1]; local
101 if(src1.type != Shader::PARAMETER_VOID) s1 = fetchRegister(src1);
1458 void PixelPipeline::ADD(Vector4s &dst, Vector4s &src0, Vector4s &src1)
1460 dst.x = AddSat(src0.x, src1.x);
1461 dst.y = AddSat(src0.y, src1.y);
1462 dst.z = AddSat(src0.z, src1.z);
1463 dst.w = AddSat(src0.w, src1.w);
1466 void PixelPipeline::SUB(Vector4s &dst, Vector4s &src0, Vector4s &src1)
1468 dst.x = SubSat(src0.x, src1
[all...]
/external/mesa3d/src/mesa/drivers/dri/i915/
H A Di915_fragprog.c419 GLuint src0, src1, src2, flags; local
438 src1 = src_vector(p, &inst->SrcReg[1], program);
440 i915_emit_arith(p, A0_CMP, get_result_vector(p, inst), get_result_flags(inst), 0, src0, src2, src1); /* NOTE: order of src2, src1 */
524 src1 = src_vector(p, &inst->SrcReg[1], program);
530 swizzle(src1, X, Y, ZERO, ZERO),
544 src1 = src_vector(p, &inst->SrcReg[1], program);
550 swizzle(src0, X, Y, Z, ONE), src1, 0);
555 src1 = src_vector(p, &inst->SrcReg[1], program);
567 swizzle(src1, ON
[all...]
/external/webp/src/enc/
H A Dpicture_csp_enc.c280 static void UpdateChroma(const fixed_y_t* src1, const fixed_y_t* src2, argument
284 const int r = ScaleDown(src1[0 * uv_w + 0], src1[0 * uv_w + 1],
286 const int g = ScaleDown(src1[2 * uv_w + 0], src1[2 * uv_w + 1],
288 const int b = ScaleDown(src1[4 * uv_w + 0], src1[4 * uv_w + 1],
295 src1 += 2;
478 fixed_y_t* const src1 = tmp_buffer + 0 * w; local
482 ImportOneRow(r_ptr, g_ptr, b_ptr, step, picture->width, src1);
516 fixed_y_t* const src1 = tmp_buffer + 0 * w; local
[all...]
/external/mesa3d/src/gallium/auxiliary/gallivm/
H A Dlp_bld_tgsi_info.c405 struct lp_tgsi_channel_info src1; local
408 analyse_src(ctx, &src1, &inst->Src[1].Register, chan);
412 } else if (is_immediate(&src1, 0.0f)) {
413 res[chan] = src1;
415 res[chan] = src1;
416 } else if (is_immediate(&src1, 1.0f)) {
/external/mesa3d/src/mesa/drivers/dri/i965/
H A Dbrw_vec4.h178 const src_reg &src0, const src_reg &src1);
180 const src_reg &src0, const src_reg &src1,
211 vec4_instruction *CMP(dst_reg dst, src_reg src0, src_reg src1,
213 vec4_instruction *IF(src_reg src0, src_reg src1,
238 src_reg src0, src_reg src1);
253 const src_reg &src1 = src_reg());
H A Dbrw_vec4_visitor.cpp32 const src_reg &src0, const src_reg &src1,
38 this->src[1] = src1;
89 const src_reg &src1, const src_reg &src2)
91 return emit(new(mem_ctx) vec4_instruction(opcode, dst, src0, src1, src2));
97 const src_reg &src1)
99 return emit(new(mem_ctx) vec4_instruction(opcode, dst, src0, src1));
130 const src_reg &src1) \
133 src0, src1); \
139 const src_reg &src1) \
142 BRW_OPCODE_##op, dst, src0, src1); \
31 vec4_instruction(enum opcode opcode, const dst_reg &dst, const src_reg &src0, const src_reg &src1, const src_reg &src2) argument
88 emit(enum opcode opcode, const dst_reg &dst, const src_reg &src0, const src_reg &src1, const src_reg &src2) argument
96 emit(enum opcode opcode, const dst_reg &dst, const src_reg &src0, const src_reg &src1) argument
205 IF(src_reg src0, src_reg src1, enum brw_conditional_mod condition) argument
228 CMP(dst_reg dst, src_reg src0, src_reg src1, enum brw_conditional_mod condition) argument
347 emit_math(enum opcode opcode, const dst_reg &dst, const src_reg &src0, const src_reg &src1) argument
721 emit_minmax(enum brw_conditional_mod conditionalmod, dst_reg dst, src_reg src0, src_reg src1) argument
[all...]
/external/opencv/cxcore/include/
H A Dcxcore.h460 CVAPI(void) cvMerge( const CvArr* src0, const CvArr* src1,
506 /* dst(mask) = src1(mask) + src2(mask) */
507 CVAPI(void) cvAdd( const CvArr* src1, const CvArr* src2, CvArr* dst,
514 /* dst(mask) = src1(mask) - src2(mask) */
515 CVAPI(void) cvSub( const CvArr* src1, const CvArr* src2, CvArr* dst,
530 /* dst(idx) = src1(idx) * src2(idx) * scale
532 CVAPI(void) cvMul( const CvArr* src1, const CvArr* src2,
536 dst(idx) = src1(idx) * scale / src2(idx)
537 or dst(idx) = scale / src2(idx) if src1 == 0 */
538 CVAPI(void) cvDiv( const CvArr* src1, cons
[all...]
/external/mesa3d/src/gallium/drivers/ilo/shader/
H A Dtoy_compiler_disasm.c106 struct disasm_src_operand src1; member in struct:disasm_inst
304 inst->src1.base.file = GEN_EXTRACT(dw1, GEN6_INST_SRC1_FILE);
305 inst->src1.base.type = GEN_EXTRACT(dw1, GEN6_INST_SRC1_TYPE);
412 inst->src1.base.file = GEN6_FILE_IMM;
413 inst->src1.base.type = GEN6_TYPE_D;
415 inst->src1.base.file = GEN_EXTRACT(dw2, GEN8_INST_SRC1_FILE);
416 inst->src1.base.type = GEN_EXTRACT(dw2, GEN8_INST_SRC1_TYPE);
419 inst->src1.base.file == GEN6_FILE_IMM)
428 inst->src1.base.file == GEN6_FILE_IMM)
447 struct disasm_src_operand *src = (i == 0) ? &inst->src0 : &inst->src1;
[all...]
/external/webp/src/dsp/
H A Dfilters_msa.c28 v16u8 src1, pred1, dst1; local
29 LD_UB2(src, 16, src0, src1);
31 SUB2(src0, pred0, src1, pred1, dst0, dst1);
/external/opencv/cxcore/src/
H A Dcxmatmul.cpp571 typedef CvStatus (CV_STDCALL *CvGEMMSingleMulFunc)( const void* src1, size_t step1,
576 typedef CvStatus (CV_STDCALL *CvGEMMBlockMulFunc)( const void* src1, size_t step1,
580 typedef CvStatus (CV_STDCALL *CvGEMMStoreFunc)( const void* src1, size_t step1,
2118 #define ICV_DEF_MULADDC_CASE_C1( arrtype, temptype, src1, src2, dst, len ) \
2124 temptype t0 = (src1)[i]*s0 + (src2)[i]; \
2125 temptype t1 = (src1)[i+1]*s0 + (src2)[i+1]; \
2130 t0 = (src1)[i+2]*s0 + (src2)[i+2]; \
2131 t1 = (src1)[i+3]*s0 + (src2)[i+3]; \
2139 temptype t0 = (src1)[i]*s0 + (src2)[i]; \
2145 #define ICV_DEF_MULADDC_CASE_C2( arrtype, temptype, src1, src
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