/external/pcre/dist2/src/sljit/ |
H A D | sljitNativeARM_T2_32.c | 1449 sljit_s32 src1, sljit_sw src1w, 1455 CHECK(check_sljit_emit_op2(compiler, op, dst, dstw, src1, src1w, src2, src2w)); 1457 ADJUST_LOCAL_OFFSET(src1, src1w); 1469 if (src1 & SLJIT_MEM) { 1470 if (getput_arg_fast(compiler, WORD_SIZE, TMP_REG1, src1, src1w)) 1483 if (!can_cache(src1, src1w, src2, src2w) && can_cache(src1, src1w, dst, dstw)) { 1484 FAIL_IF(getput_arg(compiler, WORD_SIZE, TMP_REG2, src2, src2w, src1, src1w)); 1485 FAIL_IF(getput_arg(compiler, WORD_SIZE, TMP_REG1, src1, src1w, dst, dstw)); 1488 FAIL_IF(getput_arg(compiler, WORD_SIZE, TMP_REG1, src1, src1 1447 sljit_emit_op2(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument 1674 sljit_emit_fop1_cmp(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument 1740 sljit_emit_fop2(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument [all...] |
/external/mesa3d/src/mesa/drivers/dri/i965/ |
H A D | brw_eu.h | 140 struct brw_reg src1); 146 struct brw_reg src1, \ 332 struct brw_reg src1); 393 struct brw_reg src0, struct brw_reg src1); 426 struct brw_reg src1);
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/external/dng_sdk/source/ |
H A D | dng_pixel_buffer.cpp | 1632 real64 MaxDiff (const T *src1, argument 1648 const T *src1Save = src1; 1656 real64 diff = fabs ((real64)src1 [col] - src2 [col]); 1663 src1 += s1RowStep; 1668 src1 = src1Save + s1PlaneStep; 1678 real64 MaxDiff (const T *src1, argument 1693 return MaxDiff (src1, 1708 const T *src1Save = src1; 1716 real64 diff = fabs ((real64)src1 [col * s1ColStep] - src2 [col * s2ColStep]); 1723 src1 [all...] |
/external/libmpeg2/common/arm/ |
H A D | impeg2_inter_pred.s | 644 @// Inputs : r0 - pointer to src1 668 ldr r4, [r0, #0] @ptr_y src1 679 vld1.8 {d0, d1}, [r4]! @row1 src1 681 vld1.8 {d2, d3}, [r4]! @row2 src1 683 vld1.8 {d4, d5}, [r4]! @row3 src1 685 vld1.8 {d6, d7}, [r4]! @row4 src1 724 ldr r4, [r0, #4] @ptr_u src1 738 vld1.8 {d0, d1}, [r4]! @row1 & 2 src1 740 vld1.8 {d2, d3}, [r4]! @row3 & 4 src1 742 vld1.8 {d4, d5}, [r4]! @row5 & 6 src1 [all...] |
/external/mesa3d/src/mesa/program/ |
H A D | ir_to_mesa.cpp | 279 dst_reg dst, src_reg src0, src_reg src1); 283 src_reg src0, src_reg src1, src_reg src2); 291 src_reg src1, 298 dst_reg dst, src_reg src0, src_reg src1); 309 const src_reg &src0, const src_reg &src1); 312 const src_reg &src0, const src_reg &src1) 314 emit_equality_comparison(ir, OPCODE_SLT, dst, src0, src1); 318 const src_reg &src0, const src_reg &src1) 320 emit_equality_comparison(ir, OPCODE_SGE, dst, src0, src1); 355 src_reg src0, src_reg src1, src_re 311 emit_sne(ir_expression *ir, dst_reg dst, const src_reg &src0, const src_reg &src1) argument 317 emit_seq(ir_expression *ir, dst_reg dst, const src_reg &src0, const src_reg &src1) argument 353 emit(ir_instruction *ir, enum prog_opcode op, dst_reg dst, src_reg src0, src_reg src1, src_reg src2) argument 393 emit(ir_instruction *ir, enum prog_opcode op, dst_reg dst, src_reg src0, src_reg src1) argument 414 emit_dp(ir_instruction *ir, dst_reg dst, src_reg src0, src_reg src1, unsigned elements) argument 449 src_reg src1 = orig_src1; local 930 emit_equality_comparison(ir_expression *ir, enum prog_opcode op, dst_reg dst, const src_reg &src0, const src_reg &src1) argument [all...] |
/external/valgrind/none/tests/ppc32/ |
H A D | jm-insns.c | 6322 unsigned int *src1, *src2, *dst; local 6362 src1 = (unsigned int*)&vec_in1; 6367 printf("%08x%08x%08x%08x, ", src1[0], src1[1], src1[2], src1[3]); 6388 unsigned int *src1, *src2, *src3, *dst; local 6431 src1 = (unsigned int*)&vec_in1; 6437 src1[0], src1[ 6463 unsigned int *src1, *src2, *dst; local 6533 unsigned int *src1, *dst; local 6661 unsigned int *src1, *src2, *dst; local 7088 unsigned int *src1, *src2, *dst; local 7155 unsigned int *src1, *src2, *src3, *dst; local [all...] |
/external/valgrind/none/tests/ppc64/ |
H A D | jm-insns.c | 6322 unsigned int *src1, *src2, *dst; local 6362 src1 = (unsigned int*)&vec_in1; 6367 printf("%08x%08x%08x%08x, ", src1[0], src1[1], src1[2], src1[3]); 6388 unsigned int *src1, *src2, *src3, *dst; local 6431 src1 = (unsigned int*)&vec_in1; 6437 src1[0], src1[ 6463 unsigned int *src1, *src2, *dst; local 6533 unsigned int *src1, *dst; local 6661 unsigned int *src1, *src2, *dst; local 7088 unsigned int *src1, *src2, *dst; local 7155 unsigned int *src1, *src2, *src3, *dst; local [all...] |
/external/libvpx/libvpx/vp8/common/x86/ |
H A D | mfqe_sse2.asm | 163 ; unsigned char *src1, 0 180 mov rax, arg(0) ; src1 195 movdqa xmm0, [rax] ; src1 197 add rax, rcx ; src1 + stride1 200 ; SAD(src1, src2)
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/external/libvpx/libvpx/vp9/common/x86/ |
H A D | vp9_mfqe_sse2.asm | 164 ; unsigned char *src1, 0 181 mov rax, arg(0) ; src1 196 movdqa xmm0, [rax] ; src1 198 add rax, rcx ; src1 + stride1 201 ; SAD(src1, src2)
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/external/mesa3d/src/mesa/main/ |
H A D | image.c | 490 const GLubyte (*src1)[4] = (const GLubyte (*)[4]) src; 495 dst2[i][RCOMP] = UBYTE_TO_USHORT(src1[i][RCOMP]); 496 dst2[i][GCOMP] = UBYTE_TO_USHORT(src1[i][GCOMP]); 497 dst2[i][BCOMP] = UBYTE_TO_USHORT(src1[i][BCOMP]); 498 dst2[i][ACOMP] = UBYTE_TO_USHORT(src1[i][ACOMP]); 505 const GLubyte (*src1)[4] = (const GLubyte (*)[4]) src; 511 dst4[i][RCOMP] = UBYTE_TO_FLOAT(src1[i][RCOMP]); 512 dst4[i][GCOMP] = UBYTE_TO_FLOAT(src1[i][GCOMP]); 513 dst4[i][BCOMP] = UBYTE_TO_FLOAT(src1[i][BCOMP]); 514 dst4[i][ACOMP] = UBYTE_TO_FLOAT(src1[ [all...] |
/external/opencv/cxcore/src/ |
H A D | _cxipp.h | 93 ( const uchar* src1, int srcstep1, const uchar* src2, int srcstep2, \ 97 ( const ushort* src1, int srcstep1, const ushort* src2, int srcstep2,\ 101 ( const short* src1, int srcstep1, const short* src2, int srcstep2, \ 105 ( const int* src1, int srcstep1, const int* src2, int srcstep2, \ 109 ( const float* src1, int srcstep1, const float* src2, int srcstep2, \ 113 ( const double* src1, int srcstep1, const double* src2, int srcstep2,\ 129 ( const uchar* src1, int srcstep1, const uchar* src2, int srcstep2, \ 431 ( const arrtype* src1, int srcstep1, \ 449 ( const arrtype* src1, int srcstep1, const arrtype* src2, int srcstep2, \ 453 ( const arrtype* src1, in [all...] |
/external/webp/src/dsp/ |
H A D | enc_msa.c | 86 v16u8 srcl0, srcl1, src0 = { 0 }, src1 = { 0 }; local 97 INSERT_W4_UB(in0, in1, in2, in3, src1); 98 ILVRL_B2_UB(src0, src1, srcl0, srcl1); 717 v16u8 src0, src1, src2, src3, src4, src5, src6, src7; local 721 LD_UB8(a, BPS, src0, src1, src2, src3, src4, src5, src6, src7); 723 PACK_DOTP_UB4_SW(src0, ref0, src1, ref1, out0, out1, out2, out3); 729 LD_UB8(a, BPS, src0, src1, src2, src3, src4, src5, src6, src7); 731 PACK_DPADD_UB4_SW(src0, ref0, src1, ref1, out0, out1, out2, out3); 744 v16u8 src0, src1, src2, src3, src4, src5, src6, src7; local 748 LD_UB8(a, BPS, src0, src1, src 763 v16u8 src0, src1, src2, src3, src4, src5, src6, src7; local 783 uint32_t src0, src1, src2, src3, ref0, ref1, ref2, ref3; local [all...] |
/external/v8/src/arm/ |
H A D | macro-assembler-arm.cc | 296 void MacroAssembler::Mls(Register dst, Register src1, Register src2, argument 300 mls(dst, src1, src2, srcA, cond); 303 mul(ip, src1, src2, LeaveCC, cond); 309 void MacroAssembler::And(Register dst, Register src1, const Operand& src2, argument 320 ubfx(dst, src1, 0, 323 and_(dst, src1, src2, LeaveCC, cond); 328 void MacroAssembler::Ubfx(Register dst, Register src1, int lsb, int width, argument 333 and_(dst, src1, Operand(mask), LeaveCC, cond); 339 ubfx(dst, src1, lsb, width, cond); 344 void MacroAssembler::Sbfx(Register dst, Register src1, in 3399 MovToFloatParameters(DwVfpRegister src1, DwVfpRegister src2) argument [all...] |
/external/libvpx/libvpx/vpx_dsp/ |
H A D | fastssim.c | 103 const uint32_t *src1; local 119 src1 = _ctx->level[_l - 1].im1; 131 dst1[j * w + i] = src1[j0offs + i0] + src1[j0offs + i1] + 132 src1[j1offs + i0] + src1[j1offs + i1];
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/external/libvpx/libvpx/vpx_dsp/x86/ |
H A D | variance_sse2.c | 47 const __m128i src1 = _mm_unpacklo_epi8(READ64(src, src_stride, 2), zero); local 51 const __m128i diff1 = _mm_sub_epi16(src1, ref1); 82 const __m128i src1 = _mm_unpacklo_epi8( local 86 const __m128i diff1 = _mm_sub_epi16(src1, ref1); 122 const __m128i src1 = _mm_unpackhi_epi8(s, zero); local 124 const __m128i diff1 = _mm_sub_epi16(src1, ref1);
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/external/mesa3d/src/gallium/drivers/vc4/ |
H A D | vc4_qpu.c | 197 struct qpu_reg dst, struct qpu_reg src0, struct qpu_reg src1) 209 inst |= QPU_MUX(src1.mux, QPU_ADD_B); 210 inst = set_src_raddr(inst, src1); 218 struct qpu_reg dst, struct qpu_reg src0, struct qpu_reg src1) 230 inst |= QPU_MUX(src1.mux, QPU_MUL_B); 231 inst = set_src_raddr(inst, src1); 196 qpu_a_alu2(enum qpu_op_add op, struct qpu_reg dst, struct qpu_reg src0, struct qpu_reg src1) argument 217 qpu_m_alu2(enum qpu_op_mul op, struct qpu_reg dst, struct qpu_reg src0, struct qpu_reg src1) argument
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H A D | vc4_qpu_emit.c | 165 struct qpu_reg *src0, struct qpu_reg *src1, 169 uint32_t mux1 = src1->mux == QPU_MUX_SMALL_IMM ? QPU_MUX_B : src1->mux; 173 (src0->addr == src1->addr && 174 src0->mux == src1->mux)) { 178 if (swap_file(src0) || swap_file(src1)) 163 fixup_raddr_conflict(struct qblock *block, struct qpu_reg dst, struct qpu_reg *src0, struct qpu_reg *src1, struct qinst *inst, uint64_t *unpack) argument
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/external/mesa3d/src/mesa/drivers/dri/i915/ |
H A D | i915_program.c | 144 GLuint saturate, GLuint src0, GLuint src1, GLuint src2) 155 if (GET_UREG_TYPE(src1) == REG_TYPE_CONST) 169 s[1] = src1; 185 src1 = s[1]; 196 *(p->csr++) = (A1_SRC0(src0) | A1_SRC1(src1)); 197 *(p->csr++) = (A2_SRC1(src1) | A2_SRC2(src2)); 140 i915_emit_arith(struct i915_fragment_program * p, GLuint op, GLuint dest, GLuint mask, GLuint saturate, GLuint src0, GLuint src1, GLuint src2) argument
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H A D | i915_program.h | 125 GLuint src0, GLuint src1, GLuint src2);
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/external/v8/src/mips/ |
H A D | macro-assembler-mips.h | 351 Condition cond, Register src1, const Operand& src2); 358 Condition cond, Register src1, const Operand& src2); 701 void Push(Register src1, Register src2) { argument 703 sw(src1, MemOperand(sp, 1 * kPointerSize)); 708 void Push(Register src1, Register src2, Register src3) { argument 710 sw(src1, MemOperand(sp, 2 * kPointerSize)); 716 void Push(Register src1, Register src2, Register src3, Register src4) { argument 718 sw(src1, MemOperand(sp, 3 * kPointerSize)); 725 void Push(Register src1, Register src2, Register src3, Register src4, argument 728 sw(src1, MemOperan 757 Pop(Register src1, Register src2) argument 765 Pop(Register src1, Register src2, Register src3) argument [all...] |
/external/v8/src/mips64/ |
H A D | macro-assembler-mips64.h | 384 Condition cond, Register src1, const Operand& src2); 391 Condition cond, Register src1, const Operand& src2); 745 void Push(Register src1, Register src2) { argument 747 sd(src1, MemOperand(sp, 1 * kPointerSize)); 752 void Push(Register src1, Register src2, Register src3) { argument 754 sd(src1, MemOperand(sp, 2 * kPointerSize)); 760 void Push(Register src1, Register src2, Register src3, Register src4) { argument 762 sd(src1, MemOperand(sp, 3 * kPointerSize)); 769 void Push(Register src1, Register src2, Register src3, Register src4, argument 772 sd(src1, MemOperan 804 Pop(Register src1, Register src2) argument 812 Pop(Register src1, Register src2, Register src3) argument [all...] |
/external/curl/packages/vms/ |
H A D | pcsi_product_gnv_curl.com | 147 $ src1 = "new_gnu:[usr.bin]," 156 $ gnu_src = src1 + src2 + src3 + src4 + src5 + src6 + src7 + src8 + src9
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/external/eigen/unsupported/Eigen/CXX11/src/Tensor/ |
H A D | TensorConversion.h | 78 SrcPacket src1 = m_impl.template packet<LoadMode>(index); local 80 TgtPacket result = internal::pcast<SrcPacket, TgtPacket>(src1, src2); 98 SrcPacket src1 = m_impl.template packet<LoadMode>(index); local 102 TgtPacket result = internal::pcast<SrcPacket, TgtPacket>(src1, src2, src3, src4);
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/external/mesa3d/src/gallium/drivers/nouveau/codegen/ |
H A D | nv50_ir_build_util.h | 281 Value *src0, Value *src1) 283 mkOp2(op, ty, dst, src0, src1); 289 Value *src0, Value *src1, Value *src2) 291 mkOp3(op, ty, dst, src0, src1, src2); 280 mkOp2v(operation op, DataType ty, Value *dst, Value *src0, Value *src1) argument 288 mkOp3v(operation op, DataType ty, Value *dst, Value *src0, Value *src1, Value *src2) argument
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/external/swiftshader/src/OpenGL/compiler/ |
H A D | OutputASM.h | 269 Instruction *emit(sw::Shader::Opcode op, TIntermTyped *dst = 0, TIntermNode *src0 = 0, TIntermNode *src1 = 0, TIntermNode *src2 = 0, TIntermNode *src3 = 0, TIntermNode *src4 = 0); 270 Instruction *emit(sw::Shader::Opcode op, TIntermTyped *dst, int dstIndex, TIntermNode *src0 = 0, int index0 = 0, TIntermNode *src1 = 0, int index1 = 0, 274 void emitBinary(sw::Shader::Opcode op, TIntermTyped *dst = 0, TIntermNode *src0 = 0, TIntermNode *src1 = 0, TIntermNode *src2 = 0); 275 void emitAssign(sw::Shader::Opcode op, TIntermTyped *result, TIntermTyped *lhs, TIntermTyped *src0, TIntermTyped *src1 = 0);
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