1/*
2 *    Stack-less Just-In-Time compiler
3 *
4 *    Copyright 2009-2012 Zoltan Herczeg (hzmester@freemail.hu). All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without modification, are
7 * permitted provided that the following conditions are met:
8 *
9 *   1. Redistributions of source code must retain the above copyright notice, this list of
10 *      conditions and the following disclaimer.
11 *
12 *   2. Redistributions in binary form must reproduce the above copyright notice, this list
13 *      of conditions and the following disclaimer in the documentation and/or other materials
14 *      provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER(S) AND CONTRIBUTORS ``AS IS'' AND ANY
17 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
19 * SHALL THE COPYRIGHT HOLDER(S) OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
21 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
22 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
24 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 */
26
27SLJIT_API_FUNC_ATTRIBUTE const char* sljit_get_platform_name(void)
28{
29	return "ARM-Thumb2" SLJIT_CPUINFO;
30}
31
32/* Length of an instruction word. */
33typedef sljit_u32 sljit_ins;
34
35/* Last register + 1. */
36#define TMP_REG1	(SLJIT_NUMBER_OF_REGISTERS + 2)
37#define TMP_REG2	(SLJIT_NUMBER_OF_REGISTERS + 3)
38#define TMP_REG3	(SLJIT_NUMBER_OF_REGISTERS + 4)
39#define TMP_PC		(SLJIT_NUMBER_OF_REGISTERS + 5)
40
41#define TMP_FREG1	(0)
42#define TMP_FREG2	(SLJIT_NUMBER_OF_FLOAT_REGISTERS + 1)
43
44/* See sljit_emit_enter and sljit_emit_op0 if you want to change them. */
45static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 6] = {
46	0, 0, 1, 2, 12, 11, 10, 9, 8, 7, 6, 5, 13, 3, 4, 14, 15
47};
48
49#define COPY_BITS(src, from, to, bits) \
50	((from >= to ? (src >> (from - to)) : (src << (to - from))) & (((1 << bits) - 1) << to))
51
52/* Thumb16 encodings. */
53#define RD3(rd) (reg_map[rd])
54#define RN3(rn) (reg_map[rn] << 3)
55#define RM3(rm) (reg_map[rm] << 6)
56#define RDN3(rdn) (reg_map[rdn] << 8)
57#define IMM3(imm) (imm << 6)
58#define IMM8(imm) (imm)
59
60/* Thumb16 helpers. */
61#define SET_REGS44(rd, rn) \
62	((reg_map[rn] << 3) | (reg_map[rd] & 0x7) | ((reg_map[rd] & 0x8) << 4))
63#define IS_2_LO_REGS(reg1, reg2) \
64	(reg_map[reg1] <= 7 && reg_map[reg2] <= 7)
65#define IS_3_LO_REGS(reg1, reg2, reg3) \
66	(reg_map[reg1] <= 7 && reg_map[reg2] <= 7 && reg_map[reg3] <= 7)
67
68/* Thumb32 encodings. */
69#define RD4(rd) (reg_map[rd] << 8)
70#define RN4(rn) (reg_map[rn] << 16)
71#define RM4(rm) (reg_map[rm])
72#define RT4(rt) (reg_map[rt] << 12)
73#define DD4(dd) ((dd) << 12)
74#define DN4(dn) ((dn) << 16)
75#define DM4(dm) (dm)
76#define IMM5(imm) \
77	(COPY_BITS(imm, 2, 12, 3) | ((imm & 0x3) << 6))
78#define IMM12(imm) \
79	(COPY_BITS(imm, 11, 26, 1) | COPY_BITS(imm, 8, 12, 3) | (imm & 0xff))
80
81/* --------------------------------------------------------------------- */
82/*  Instrucion forms                                                     */
83/* --------------------------------------------------------------------- */
84
85/* dot '.' changed to _
86   I immediate form (possibly followed by number of immediate bits). */
87#define ADCI		0xf1400000
88#define ADCS		0x4140
89#define ADC_W		0xeb400000
90#define ADD		0x4400
91#define ADDS		0x1800
92#define ADDSI3		0x1c00
93#define ADDSI8		0x3000
94#define ADD_W		0xeb000000
95#define ADDWI		0xf2000000
96#define ADD_SP		0xb000
97#define ADD_W		0xeb000000
98#define ADD_WI		0xf1000000
99#define ANDI		0xf0000000
100#define ANDS		0x4000
101#define AND_W		0xea000000
102#define ASRS		0x4100
103#define ASRSI		0x1000
104#define ASR_W		0xfa40f000
105#define ASR_WI		0xea4f0020
106#define BICI		0xf0200000
107#define BKPT		0xbe00
108#define BLX		0x4780
109#define BX		0x4700
110#define CLZ		0xfab0f080
111#define CMPI		0x2800
112#define CMP_W		0xebb00f00
113#define EORI		0xf0800000
114#define EORS		0x4040
115#define EOR_W		0xea800000
116#define IT		0xbf00
117#define LSLS		0x4080
118#define LSLSI		0x0000
119#define LSL_W		0xfa00f000
120#define LSL_WI		0xea4f0000
121#define LSRS		0x40c0
122#define LSRSI		0x0800
123#define LSR_W		0xfa20f000
124#define LSR_WI		0xea4f0010
125#define MOV		0x4600
126#define MOVS		0x0000
127#define MOVSI		0x2000
128#define MOVT		0xf2c00000
129#define MOVW		0xf2400000
130#define MOV_W		0xea4f0000
131#define MOV_WI		0xf04f0000
132#define MUL		0xfb00f000
133#define MVNS		0x43c0
134#define MVN_W		0xea6f0000
135#define MVN_WI		0xf06f0000
136#define NOP		0xbf00
137#define ORNI		0xf0600000
138#define ORRI		0xf0400000
139#define ORRS		0x4300
140#define ORR_W		0xea400000
141#define POP		0xbc00
142#define POP_W		0xe8bd0000
143#define PUSH		0xb400
144#define PUSH_W		0xe92d0000
145#define RSB_WI		0xf1c00000
146#define RSBSI		0x4240
147#define SBCI		0xf1600000
148#define SBCS		0x4180
149#define SBC_W		0xeb600000
150#define SMULL		0xfb800000
151#define STR_SP		0x9000
152#define SUBS		0x1a00
153#define SUBSI3		0x1e00
154#define SUBSI8		0x3800
155#define SUB_W		0xeba00000
156#define SUBWI		0xf2a00000
157#define SUB_SP		0xb080
158#define SUB_WI		0xf1a00000
159#define SXTB		0xb240
160#define SXTB_W		0xfa4ff080
161#define SXTH		0xb200
162#define SXTH_W		0xfa0ff080
163#define TST		0x4200
164#define UMULL		0xfba00000
165#define UXTB		0xb2c0
166#define UXTB_W		0xfa5ff080
167#define UXTH		0xb280
168#define UXTH_W		0xfa1ff080
169#define VABS_F32	0xeeb00ac0
170#define VADD_F32	0xee300a00
171#define VCMP_F32	0xeeb40a40
172#define VCVT_F32_S32	0xeeb80ac0
173#define VCVT_F64_F32	0xeeb70ac0
174#define VCVT_S32_F32	0xeebd0ac0
175#define VDIV_F32	0xee800a00
176#define VMOV_F32	0xeeb00a40
177#define VMOV		0xee000a10
178#define VMRS		0xeef1fa10
179#define VMUL_F32	0xee200a00
180#define VNEG_F32	0xeeb10a40
181#define VSTR_F32	0xed000a00
182#define VSUB_F32	0xee300a40
183
184static sljit_s32 push_inst16(struct sljit_compiler *compiler, sljit_ins inst)
185{
186	sljit_u16 *ptr;
187	SLJIT_ASSERT(!(inst & 0xffff0000));
188
189	ptr = (sljit_u16*)ensure_buf(compiler, sizeof(sljit_u16));
190	FAIL_IF(!ptr);
191	*ptr = inst;
192	compiler->size++;
193	return SLJIT_SUCCESS;
194}
195
196static sljit_s32 push_inst32(struct sljit_compiler *compiler, sljit_ins inst)
197{
198	sljit_u16 *ptr = (sljit_u16*)ensure_buf(compiler, sizeof(sljit_ins));
199	FAIL_IF(!ptr);
200	*ptr++ = inst >> 16;
201	*ptr = inst;
202	compiler->size += 2;
203	return SLJIT_SUCCESS;
204}
205
206static SLJIT_INLINE sljit_s32 emit_imm32_const(struct sljit_compiler *compiler, sljit_s32 dst, sljit_uw imm)
207{
208	FAIL_IF(push_inst32(compiler, MOVW | RD4(dst) |
209		COPY_BITS(imm, 12, 16, 4) | COPY_BITS(imm, 11, 26, 1) | COPY_BITS(imm, 8, 12, 3) | (imm & 0xff)));
210	return push_inst32(compiler, MOVT | RD4(dst) |
211		COPY_BITS(imm, 12 + 16, 16, 4) | COPY_BITS(imm, 11 + 16, 26, 1) | COPY_BITS(imm, 8 + 16, 12, 3) | ((imm & 0xff0000) >> 16));
212}
213
214static SLJIT_INLINE void modify_imm32_const(sljit_u16 *inst, sljit_uw new_imm)
215{
216	sljit_s32 dst = inst[1] & 0x0f00;
217	SLJIT_ASSERT(((inst[0] & 0xfbf0) == (MOVW >> 16)) && ((inst[2] & 0xfbf0) == (MOVT >> 16)) && dst == (inst[3] & 0x0f00));
218	inst[0] = (MOVW >> 16) | COPY_BITS(new_imm, 12, 0, 4) | COPY_BITS(new_imm, 11, 10, 1);
219	inst[1] = dst | COPY_BITS(new_imm, 8, 12, 3) | (new_imm & 0xff);
220	inst[2] = (MOVT >> 16) | COPY_BITS(new_imm, 12 + 16, 0, 4) | COPY_BITS(new_imm, 11 + 16, 10, 1);
221	inst[3] = dst | COPY_BITS(new_imm, 8 + 16, 12, 3) | ((new_imm & 0xff0000) >> 16);
222}
223
224static SLJIT_INLINE sljit_s32 detect_jump_type(struct sljit_jump *jump, sljit_u16 *code_ptr, sljit_u16 *code)
225{
226	sljit_sw diff;
227
228	if (jump->flags & SLJIT_REWRITABLE_JUMP)
229		return 0;
230
231	if (jump->flags & JUMP_ADDR) {
232		/* Branch to ARM code is not optimized yet. */
233		if (!(jump->u.target & 0x1))
234			return 0;
235		diff = ((sljit_sw)jump->u.target - (sljit_sw)(code_ptr + 2)) >> 1;
236	}
237	else {
238		SLJIT_ASSERT(jump->flags & JUMP_LABEL);
239		diff = ((sljit_sw)(code + jump->u.label->size) - (sljit_sw)(code_ptr + 2)) >> 1;
240	}
241
242	if (jump->flags & IS_COND) {
243		SLJIT_ASSERT(!(jump->flags & IS_BL));
244		if (diff <= 127 && diff >= -128) {
245			jump->flags |= PATCH_TYPE1;
246			return 5;
247		}
248		if (diff <= 524287 && diff >= -524288) {
249			jump->flags |= PATCH_TYPE2;
250			return 4;
251		}
252		/* +1 comes from the prefix IT instruction. */
253		diff--;
254		if (diff <= 8388607 && diff >= -8388608) {
255			jump->flags |= PATCH_TYPE3;
256			return 3;
257		}
258	}
259	else if (jump->flags & IS_BL) {
260		if (diff <= 8388607 && diff >= -8388608) {
261			jump->flags |= PATCH_BL;
262			return 3;
263		}
264	}
265	else {
266		if (diff <= 1023 && diff >= -1024) {
267			jump->flags |= PATCH_TYPE4;
268			return 4;
269		}
270		if (diff <= 8388607 && diff >= -8388608) {
271			jump->flags |= PATCH_TYPE5;
272			return 3;
273		}
274	}
275
276	return 0;
277}
278
279static SLJIT_INLINE void set_jump_instruction(struct sljit_jump *jump)
280{
281	sljit_s32 type = (jump->flags >> 4) & 0xf;
282	sljit_sw diff;
283	sljit_u16 *jump_inst;
284	sljit_s32 s, j1, j2;
285
286	if (SLJIT_UNLIKELY(type == 0)) {
287		modify_imm32_const((sljit_u16*)jump->addr, (jump->flags & JUMP_LABEL) ? jump->u.label->addr : jump->u.target);
288		return;
289	}
290
291	if (jump->flags & JUMP_ADDR) {
292		SLJIT_ASSERT(jump->u.target & 0x1);
293		diff = ((sljit_sw)jump->u.target - (sljit_sw)(jump->addr + 4)) >> 1;
294	}
295	else
296		diff = ((sljit_sw)(jump->u.label->addr) - (sljit_sw)(jump->addr + 4)) >> 1;
297	jump_inst = (sljit_u16*)jump->addr;
298
299	switch (type) {
300	case 1:
301		/* Encoding T1 of 'B' instruction */
302		SLJIT_ASSERT(diff <= 127 && diff >= -128 && (jump->flags & IS_COND));
303		jump_inst[0] = 0xd000 | (jump->flags & 0xf00) | (diff & 0xff);
304		return;
305	case 2:
306		/* Encoding T3 of 'B' instruction */
307		SLJIT_ASSERT(diff <= 524287 && diff >= -524288 && (jump->flags & IS_COND));
308		jump_inst[0] = 0xf000 | COPY_BITS(jump->flags, 8, 6, 4) | COPY_BITS(diff, 11, 0, 6) | COPY_BITS(diff, 19, 10, 1);
309		jump_inst[1] = 0x8000 | COPY_BITS(diff, 17, 13, 1) | COPY_BITS(diff, 18, 11, 1) | (diff & 0x7ff);
310		return;
311	case 3:
312		SLJIT_ASSERT(jump->flags & IS_COND);
313		*jump_inst++ = IT | ((jump->flags >> 4) & 0xf0) | 0x8;
314		diff--;
315		type = 5;
316		break;
317	case 4:
318		/* Encoding T2 of 'B' instruction */
319		SLJIT_ASSERT(diff <= 1023 && diff >= -1024 && !(jump->flags & IS_COND));
320		jump_inst[0] = 0xe000 | (diff & 0x7ff);
321		return;
322	}
323
324	SLJIT_ASSERT(diff <= 8388607 && diff >= -8388608);
325
326	/* Really complex instruction form for branches. */
327	s = (diff >> 23) & 0x1;
328	j1 = (~(diff >> 21) ^ s) & 0x1;
329	j2 = (~(diff >> 22) ^ s) & 0x1;
330	jump_inst[0] = 0xf000 | (s << 10) | COPY_BITS(diff, 11, 0, 10);
331	jump_inst[1] = (j1 << 13) | (j2 << 11) | (diff & 0x7ff);
332
333	/* The others have a common form. */
334	if (type == 5) /* Encoding T4 of 'B' instruction */
335		jump_inst[1] |= 0x9000;
336	else if (type == 6) /* Encoding T1 of 'BL' instruction */
337		jump_inst[1] |= 0xd000;
338	else
339		SLJIT_ASSERT_STOP();
340}
341
342SLJIT_API_FUNC_ATTRIBUTE void* sljit_generate_code(struct sljit_compiler *compiler)
343{
344	struct sljit_memory_fragment *buf;
345	sljit_u16 *code;
346	sljit_u16 *code_ptr;
347	sljit_u16 *buf_ptr;
348	sljit_u16 *buf_end;
349	sljit_uw half_count;
350
351	struct sljit_label *label;
352	struct sljit_jump *jump;
353	struct sljit_const *const_;
354
355	CHECK_ERROR_PTR();
356	CHECK_PTR(check_sljit_generate_code(compiler));
357	reverse_buf(compiler);
358
359	code = (sljit_u16*)SLJIT_MALLOC_EXEC(compiler->size * sizeof(sljit_u16));
360	PTR_FAIL_WITH_EXEC_IF(code);
361	buf = compiler->buf;
362
363	code_ptr = code;
364	half_count = 0;
365	label = compiler->labels;
366	jump = compiler->jumps;
367	const_ = compiler->consts;
368
369	do {
370		buf_ptr = (sljit_u16*)buf->memory;
371		buf_end = buf_ptr + (buf->used_size >> 1);
372		do {
373			*code_ptr = *buf_ptr++;
374			/* These structures are ordered by their address. */
375			SLJIT_ASSERT(!label || label->size >= half_count);
376			SLJIT_ASSERT(!jump || jump->addr >= half_count);
377			SLJIT_ASSERT(!const_ || const_->addr >= half_count);
378			if (label && label->size == half_count) {
379				label->addr = ((sljit_uw)code_ptr) | 0x1;
380				label->size = code_ptr - code;
381				label = label->next;
382			}
383			if (jump && jump->addr == half_count) {
384					jump->addr = (sljit_uw)code_ptr - ((jump->flags & IS_COND) ? 10 : 8);
385					code_ptr -= detect_jump_type(jump, code_ptr, code);
386					jump = jump->next;
387			}
388			if (const_ && const_->addr == half_count) {
389				const_->addr = (sljit_uw)code_ptr;
390				const_ = const_->next;
391			}
392			code_ptr ++;
393			half_count ++;
394		} while (buf_ptr < buf_end);
395
396		buf = buf->next;
397	} while (buf);
398
399	if (label && label->size == half_count) {
400		label->addr = ((sljit_uw)code_ptr) | 0x1;
401		label->size = code_ptr - code;
402		label = label->next;
403	}
404
405	SLJIT_ASSERT(!label);
406	SLJIT_ASSERT(!jump);
407	SLJIT_ASSERT(!const_);
408	SLJIT_ASSERT(code_ptr - code <= (sljit_sw)compiler->size);
409
410	jump = compiler->jumps;
411	while (jump) {
412		set_jump_instruction(jump);
413		jump = jump->next;
414	}
415
416	compiler->error = SLJIT_ERR_COMPILED;
417	compiler->executable_size = (code_ptr - code) * sizeof(sljit_u16);
418	SLJIT_CACHE_FLUSH(code, code_ptr);
419	/* Set thumb mode flag. */
420	return (void*)((sljit_uw)code | 0x1);
421}
422
423/* --------------------------------------------------------------------- */
424/*  Core code generator functions.                                       */
425/* --------------------------------------------------------------------- */
426
427#define INVALID_IMM	0x80000000
428static sljit_uw get_imm(sljit_uw imm)
429{
430	/* Thumb immediate form. */
431	sljit_s32 counter;
432
433	if (imm <= 0xff)
434		return imm;
435
436	if ((imm & 0xffff) == (imm >> 16)) {
437		/* Some special cases. */
438		if (!(imm & 0xff00))
439			return (1 << 12) | (imm & 0xff);
440		if (!(imm & 0xff))
441			return (2 << 12) | ((imm >> 8) & 0xff);
442		if ((imm & 0xff00) == ((imm & 0xff) << 8))
443			return (3 << 12) | (imm & 0xff);
444	}
445
446	/* Assembly optimization: count leading zeroes? */
447	counter = 8;
448	if (!(imm & 0xffff0000)) {
449		counter += 16;
450		imm <<= 16;
451	}
452	if (!(imm & 0xff000000)) {
453		counter += 8;
454		imm <<= 8;
455	}
456	if (!(imm & 0xf0000000)) {
457		counter += 4;
458		imm <<= 4;
459	}
460	if (!(imm & 0xc0000000)) {
461		counter += 2;
462		imm <<= 2;
463	}
464	if (!(imm & 0x80000000)) {
465		counter += 1;
466		imm <<= 1;
467	}
468	/* Since imm >= 128, this must be true. */
469	SLJIT_ASSERT(counter <= 31);
470
471	if (imm & 0x00ffffff)
472		return INVALID_IMM; /* Cannot be encoded. */
473
474	return ((imm >> 24) & 0x7f) | COPY_BITS(counter, 4, 26, 1) | COPY_BITS(counter, 1, 12, 3) | COPY_BITS(counter, 0, 7, 1);
475}
476
477static sljit_s32 load_immediate(struct sljit_compiler *compiler, sljit_s32 dst, sljit_uw imm)
478{
479	sljit_uw tmp;
480
481	if (imm >= 0x10000) {
482		tmp = get_imm(imm);
483		if (tmp != INVALID_IMM)
484			return push_inst32(compiler, MOV_WI | RD4(dst) | tmp);
485		tmp = get_imm(~imm);
486		if (tmp != INVALID_IMM)
487			return push_inst32(compiler, MVN_WI | RD4(dst) | tmp);
488	}
489
490	/* set low 16 bits, set hi 16 bits to 0. */
491	FAIL_IF(push_inst32(compiler, MOVW | RD4(dst) |
492		COPY_BITS(imm, 12, 16, 4) | COPY_BITS(imm, 11, 26, 1) | COPY_BITS(imm, 8, 12, 3) | (imm & 0xff)));
493
494	/* set hi 16 bit if needed. */
495	if (imm >= 0x10000)
496		return push_inst32(compiler, MOVT | RD4(dst) |
497			COPY_BITS(imm, 12 + 16, 16, 4) | COPY_BITS(imm, 11 + 16, 26, 1) | COPY_BITS(imm, 8 + 16, 12, 3) | ((imm & 0xff0000) >> 16));
498	return SLJIT_SUCCESS;
499}
500
501#define ARG1_IMM	0x0010000
502#define ARG2_IMM	0x0020000
503#define KEEP_FLAGS	0x0040000
504/* SET_FLAGS must be 0x100000 as it is also the value of S bit (can be used for optimization). */
505#define SET_FLAGS	0x0100000
506#define UNUSED_RETURN	0x0200000
507#define SLOW_DEST	0x0400000
508#define SLOW_SRC1	0x0800000
509#define SLOW_SRC2	0x1000000
510
511static sljit_s32 emit_op_imm(struct sljit_compiler *compiler, sljit_s32 flags, sljit_s32 dst, sljit_uw arg1, sljit_uw arg2)
512{
513	/* dst must be register, TMP_REG1
514	   arg1 must be register, TMP_REG1, imm
515	   arg2 must be register, TMP_REG2, imm */
516	sljit_s32 reg;
517	sljit_uw imm, nimm;
518
519	if (SLJIT_UNLIKELY((flags & (ARG1_IMM | ARG2_IMM)) == (ARG1_IMM | ARG2_IMM))) {
520		/* Both are immediates. */
521		flags &= ~ARG1_IMM;
522		FAIL_IF(load_immediate(compiler, TMP_REG1, arg1));
523		arg1 = TMP_REG1;
524	}
525
526	if (flags & (ARG1_IMM | ARG2_IMM)) {
527		reg = (flags & ARG2_IMM) ? arg1 : arg2;
528		imm = (flags & ARG2_IMM) ? arg2 : arg1;
529
530		switch (flags & 0xffff) {
531		case SLJIT_CLZ:
532		case SLJIT_MUL:
533			/* No form with immediate operand. */
534			break;
535		case SLJIT_MOV:
536			SLJIT_ASSERT(!(flags & SET_FLAGS) && (flags & ARG2_IMM) && arg1 == TMP_REG1);
537			return load_immediate(compiler, dst, imm);
538		case SLJIT_NOT:
539			if (!(flags & SET_FLAGS))
540				return load_immediate(compiler, dst, ~imm);
541			/* Since the flags should be set, we just fallback to the register mode.
542			   Although some clever things could be done here, "NOT IMM" does not worth the efforts. */
543			break;
544		case SLJIT_ADD:
545			nimm = -imm;
546			if (!(flags & KEEP_FLAGS) && IS_2_LO_REGS(reg, dst)) {
547				if (imm <= 0x7)
548					return push_inst16(compiler, ADDSI3 | IMM3(imm) | RD3(dst) | RN3(reg));
549				if (nimm <= 0x7)
550					return push_inst16(compiler, SUBSI3 | IMM3(nimm) | RD3(dst) | RN3(reg));
551				if (reg == dst) {
552					if (imm <= 0xff)
553						return push_inst16(compiler, ADDSI8 | IMM8(imm) | RDN3(dst));
554					if (nimm <= 0xff)
555						return push_inst16(compiler, SUBSI8 | IMM8(nimm) | RDN3(dst));
556				}
557			}
558			if (!(flags & SET_FLAGS)) {
559				if (imm <= 0xfff)
560					return push_inst32(compiler, ADDWI | RD4(dst) | RN4(reg) | IMM12(imm));
561				if (nimm <= 0xfff)
562					return push_inst32(compiler, SUBWI | RD4(dst) | RN4(reg) | IMM12(nimm));
563			}
564			imm = get_imm(imm);
565			if (imm != INVALID_IMM)
566				return push_inst32(compiler, ADD_WI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | imm);
567			break;
568		case SLJIT_ADDC:
569			imm = get_imm(imm);
570			if (imm != INVALID_IMM)
571				return push_inst32(compiler, ADCI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | imm);
572			break;
573		case SLJIT_SUB:
574			if (flags & ARG1_IMM) {
575				if (!(flags & KEEP_FLAGS) && imm == 0 && IS_2_LO_REGS(reg, dst))
576					return push_inst16(compiler, RSBSI | RD3(dst) | RN3(reg));
577				imm = get_imm(imm);
578				if (imm != INVALID_IMM)
579					return push_inst32(compiler, RSB_WI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | imm);
580				break;
581			}
582			nimm = -imm;
583			if (!(flags & KEEP_FLAGS) && IS_2_LO_REGS(reg, dst)) {
584				if (imm <= 0x7)
585					return push_inst16(compiler, SUBSI3 | IMM3(imm) | RD3(dst) | RN3(reg));
586				if (nimm <= 0x7)
587					return push_inst16(compiler, ADDSI3 | IMM3(nimm) | RD3(dst) | RN3(reg));
588				if (reg == dst) {
589					if (imm <= 0xff)
590						return push_inst16(compiler, SUBSI8 | IMM8(imm) | RDN3(dst));
591					if (nimm <= 0xff)
592						return push_inst16(compiler, ADDSI8 | IMM8(nimm) | RDN3(dst));
593				}
594				if (imm <= 0xff && (flags & UNUSED_RETURN))
595					return push_inst16(compiler, CMPI | IMM8(imm) | RDN3(reg));
596			}
597			if (!(flags & SET_FLAGS)) {
598				if (imm <= 0xfff)
599					return push_inst32(compiler, SUBWI | RD4(dst) | RN4(reg) | IMM12(imm));
600				if (nimm <= 0xfff)
601					return push_inst32(compiler, ADDWI | RD4(dst) | RN4(reg) | IMM12(nimm));
602			}
603			imm = get_imm(imm);
604			if (imm != INVALID_IMM)
605				return push_inst32(compiler, SUB_WI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | imm);
606			break;
607		case SLJIT_SUBC:
608			if (flags & ARG1_IMM)
609				break;
610			imm = get_imm(imm);
611			if (imm != INVALID_IMM)
612				return push_inst32(compiler, SBCI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | imm);
613			break;
614		case SLJIT_AND:
615			nimm = get_imm(imm);
616			if (nimm != INVALID_IMM)
617				return push_inst32(compiler, ANDI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | nimm);
618			imm = get_imm(imm);
619			if (imm != INVALID_IMM)
620				return push_inst32(compiler, BICI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | imm);
621			break;
622		case SLJIT_OR:
623			nimm = get_imm(imm);
624			if (nimm != INVALID_IMM)
625				return push_inst32(compiler, ORRI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | nimm);
626			imm = get_imm(imm);
627			if (imm != INVALID_IMM)
628				return push_inst32(compiler, ORNI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | imm);
629			break;
630		case SLJIT_XOR:
631			imm = get_imm(imm);
632			if (imm != INVALID_IMM)
633				return push_inst32(compiler, EORI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | imm);
634			break;
635		case SLJIT_SHL:
636		case SLJIT_LSHR:
637		case SLJIT_ASHR:
638			if (flags & ARG1_IMM)
639				break;
640			imm &= 0x1f;
641			if (imm == 0) {
642				if (!(flags & SET_FLAGS))
643					return push_inst16(compiler, MOV | SET_REGS44(dst, reg));
644				if (IS_2_LO_REGS(dst, reg))
645					return push_inst16(compiler, MOVS | RD3(dst) | RN3(reg));
646				return push_inst32(compiler, MOV_W | SET_FLAGS | RD4(dst) | RM4(reg));
647			}
648			switch (flags & 0xffff) {
649			case SLJIT_SHL:
650				if (!(flags & KEEP_FLAGS) && IS_2_LO_REGS(dst, reg))
651					return push_inst16(compiler, LSLSI | RD3(dst) | RN3(reg) | (imm << 6));
652				return push_inst32(compiler, LSL_WI | (flags & SET_FLAGS) | RD4(dst) | RM4(reg) | IMM5(imm));
653			case SLJIT_LSHR:
654				if (!(flags & KEEP_FLAGS) && IS_2_LO_REGS(dst, reg))
655					return push_inst16(compiler, LSRSI | RD3(dst) | RN3(reg) | (imm << 6));
656				return push_inst32(compiler, LSR_WI | (flags & SET_FLAGS) | RD4(dst) | RM4(reg) | IMM5(imm));
657			default: /* SLJIT_ASHR */
658				if (!(flags & KEEP_FLAGS) && IS_2_LO_REGS(dst, reg))
659					return push_inst16(compiler, ASRSI | RD3(dst) | RN3(reg) | (imm << 6));
660				return push_inst32(compiler, ASR_WI | (flags & SET_FLAGS) | RD4(dst) | RM4(reg) | IMM5(imm));
661			}
662		default:
663			SLJIT_ASSERT_STOP();
664			break;
665		}
666
667		if (flags & ARG2_IMM) {
668			FAIL_IF(load_immediate(compiler, TMP_REG2, arg2));
669			arg2 = TMP_REG2;
670		}
671		else {
672			FAIL_IF(load_immediate(compiler, TMP_REG1, arg1));
673			arg1 = TMP_REG1;
674		}
675	}
676
677	/* Both arguments are registers. */
678	switch (flags & 0xffff) {
679	case SLJIT_MOV:
680	case SLJIT_MOV_U32:
681	case SLJIT_MOV_S32:
682	case SLJIT_MOV_P:
683	case SLJIT_MOVU:
684	case SLJIT_MOVU_U32:
685	case SLJIT_MOVU_S32:
686	case SLJIT_MOVU_P:
687		SLJIT_ASSERT(!(flags & SET_FLAGS) && arg1 == TMP_REG1);
688		if (dst == arg2)
689			return SLJIT_SUCCESS;
690		return push_inst16(compiler, MOV | SET_REGS44(dst, arg2));
691	case SLJIT_MOV_U8:
692	case SLJIT_MOVU_U8:
693		SLJIT_ASSERT(!(flags & SET_FLAGS) && arg1 == TMP_REG1);
694		if (IS_2_LO_REGS(dst, arg2))
695			return push_inst16(compiler, UXTB | RD3(dst) | RN3(arg2));
696		return push_inst32(compiler, UXTB_W | RD4(dst) | RM4(arg2));
697	case SLJIT_MOV_S8:
698	case SLJIT_MOVU_S8:
699		SLJIT_ASSERT(!(flags & SET_FLAGS) && arg1 == TMP_REG1);
700		if (IS_2_LO_REGS(dst, arg2))
701			return push_inst16(compiler, SXTB | RD3(dst) | RN3(arg2));
702		return push_inst32(compiler, SXTB_W | RD4(dst) | RM4(arg2));
703	case SLJIT_MOV_U16:
704	case SLJIT_MOVU_U16:
705		SLJIT_ASSERT(!(flags & SET_FLAGS) && arg1 == TMP_REG1);
706		if (IS_2_LO_REGS(dst, arg2))
707			return push_inst16(compiler, UXTH | RD3(dst) | RN3(arg2));
708		return push_inst32(compiler, UXTH_W | RD4(dst) | RM4(arg2));
709	case SLJIT_MOV_S16:
710	case SLJIT_MOVU_S16:
711		SLJIT_ASSERT(!(flags & SET_FLAGS) && arg1 == TMP_REG1);
712		if (IS_2_LO_REGS(dst, arg2))
713			return push_inst16(compiler, SXTH | RD3(dst) | RN3(arg2));
714		return push_inst32(compiler, SXTH_W | RD4(dst) | RM4(arg2));
715	case SLJIT_NOT:
716		SLJIT_ASSERT(arg1 == TMP_REG1);
717		if (!(flags & KEEP_FLAGS) && IS_2_LO_REGS(dst, arg2))
718			return push_inst16(compiler, MVNS | RD3(dst) | RN3(arg2));
719		return push_inst32(compiler, MVN_W | (flags & SET_FLAGS) | RD4(dst) | RM4(arg2));
720	case SLJIT_CLZ:
721		SLJIT_ASSERT(arg1 == TMP_REG1);
722		FAIL_IF(push_inst32(compiler, CLZ | RN4(arg2) | RD4(dst) | RM4(arg2)));
723		if (flags & SET_FLAGS) {
724			if (reg_map[dst] <= 7)
725				return push_inst16(compiler, CMPI | RDN3(dst));
726			return push_inst32(compiler, ADD_WI | SET_FLAGS | RN4(dst) | RD4(dst));
727		}
728		return SLJIT_SUCCESS;
729	case SLJIT_ADD:
730		if (!(flags & KEEP_FLAGS) && IS_3_LO_REGS(dst, arg1, arg2))
731			return push_inst16(compiler, ADDS | RD3(dst) | RN3(arg1) | RM3(arg2));
732		if (dst == arg1 && !(flags & SET_FLAGS))
733			return push_inst16(compiler, ADD | SET_REGS44(dst, arg2));
734		return push_inst32(compiler, ADD_W | (flags & SET_FLAGS) | RD4(dst) | RN4(arg1) | RM4(arg2));
735	case SLJIT_ADDC:
736		if (dst == arg1 && !(flags & KEEP_FLAGS) && IS_2_LO_REGS(dst, arg2))
737			return push_inst16(compiler, ADCS | RD3(dst) | RN3(arg2));
738		return push_inst32(compiler, ADC_W | (flags & SET_FLAGS) | RD4(dst) | RN4(arg1) | RM4(arg2));
739	case SLJIT_SUB:
740		if (!(flags & KEEP_FLAGS) && IS_3_LO_REGS(dst, arg1, arg2))
741			return push_inst16(compiler, SUBS | RD3(dst) | RN3(arg1) | RM3(arg2));
742		return push_inst32(compiler, SUB_W | (flags & SET_FLAGS) | RD4(dst) | RN4(arg1) | RM4(arg2));
743	case SLJIT_SUBC:
744		if (dst == arg1 && !(flags & KEEP_FLAGS) && IS_2_LO_REGS(dst, arg2))
745			return push_inst16(compiler, SBCS | RD3(dst) | RN3(arg2));
746		return push_inst32(compiler, SBC_W | (flags & SET_FLAGS) | RD4(dst) | RN4(arg1) | RM4(arg2));
747	case SLJIT_MUL:
748		if (!(flags & SET_FLAGS))
749			return push_inst32(compiler, MUL | RD4(dst) | RN4(arg1) | RM4(arg2));
750		SLJIT_ASSERT(reg_map[TMP_REG2] <= 7 && dst != TMP_REG2);
751		FAIL_IF(push_inst32(compiler, SMULL | RT4(dst) | RD4(TMP_REG2) | RN4(arg1) | RM4(arg2)));
752		/* cmp TMP_REG2, dst asr #31. */
753		return push_inst32(compiler, CMP_W | RN4(TMP_REG2) | 0x70e0 | RM4(dst));
754	case SLJIT_AND:
755		if (!(flags & KEEP_FLAGS)) {
756			if (dst == arg1 && IS_2_LO_REGS(dst, arg2))
757				return push_inst16(compiler, ANDS | RD3(dst) | RN3(arg2));
758			if ((flags & UNUSED_RETURN) && IS_2_LO_REGS(arg1, arg2))
759				return push_inst16(compiler, TST | RD3(arg1) | RN3(arg2));
760		}
761		return push_inst32(compiler, AND_W | (flags & SET_FLAGS) | RD4(dst) | RN4(arg1) | RM4(arg2));
762	case SLJIT_OR:
763		if (dst == arg1 && !(flags & KEEP_FLAGS) && IS_2_LO_REGS(dst, arg2))
764			return push_inst16(compiler, ORRS | RD3(dst) | RN3(arg2));
765		return push_inst32(compiler, ORR_W | (flags & SET_FLAGS) | RD4(dst) | RN4(arg1) | RM4(arg2));
766	case SLJIT_XOR:
767		if (dst == arg1 && !(flags & KEEP_FLAGS) && IS_2_LO_REGS(dst, arg2))
768			return push_inst16(compiler, EORS | RD3(dst) | RN3(arg2));
769		return push_inst32(compiler, EOR_W | (flags & SET_FLAGS) | RD4(dst) | RN4(arg1) | RM4(arg2));
770	case SLJIT_SHL:
771		if (dst == arg1 && !(flags & KEEP_FLAGS) && IS_2_LO_REGS(dst, arg2))
772			return push_inst16(compiler, LSLS | RD3(dst) | RN3(arg2));
773		return push_inst32(compiler, LSL_W | (flags & SET_FLAGS) | RD4(dst) | RN4(arg1) | RM4(arg2));
774	case SLJIT_LSHR:
775		if (dst == arg1 && !(flags & KEEP_FLAGS) && IS_2_LO_REGS(dst, arg2))
776			return push_inst16(compiler, LSRS | RD3(dst) | RN3(arg2));
777		return push_inst32(compiler, LSR_W | (flags & SET_FLAGS) | RD4(dst) | RN4(arg1) | RM4(arg2));
778	case SLJIT_ASHR:
779		if (dst == arg1 && !(flags & KEEP_FLAGS) && IS_2_LO_REGS(dst, arg2))
780			return push_inst16(compiler, ASRS | RD3(dst) | RN3(arg2));
781		return push_inst32(compiler, ASR_W | (flags & SET_FLAGS) | RD4(dst) | RN4(arg1) | RM4(arg2));
782	}
783
784	SLJIT_ASSERT_STOP();
785	return SLJIT_SUCCESS;
786}
787
788#define STORE		0x01
789#define SIGNED		0x02
790
791#define WORD_SIZE	0x00
792#define BYTE_SIZE	0x04
793#define HALF_SIZE	0x08
794
795#define UPDATE		0x10
796#define ARG_TEST	0x20
797
798#define IS_WORD_SIZE(flags)		(!(flags & (BYTE_SIZE | HALF_SIZE)))
799#define OFFSET_CHECK(imm, shift)	(!(argw & ~(imm << shift)))
800
801/*
802  1st letter:
803  w = word
804  b = byte
805  h = half
806
807  2nd letter:
808  s = signed
809  u = unsigned
810
811  3rd letter:
812  l = load
813  s = store
814*/
815
816static const sljit_ins sljit_mem16[12] = {
817/* w u l */ 0x5800 /* ldr */,
818/* w u s */ 0x5000 /* str */,
819/* w s l */ 0x5800 /* ldr */,
820/* w s s */ 0x5000 /* str */,
821
822/* b u l */ 0x5c00 /* ldrb */,
823/* b u s */ 0x5400 /* strb */,
824/* b s l */ 0x5600 /* ldrsb */,
825/* b s s */ 0x5400 /* strb */,
826
827/* h u l */ 0x5a00 /* ldrh */,
828/* h u s */ 0x5200 /* strh */,
829/* h s l */ 0x5e00 /* ldrsh */,
830/* h s s */ 0x5200 /* strh */,
831};
832
833static const sljit_ins sljit_mem16_imm5[12] = {
834/* w u l */ 0x6800 /* ldr imm5 */,
835/* w u s */ 0x6000 /* str imm5 */,
836/* w s l */ 0x6800 /* ldr imm5 */,
837/* w s s */ 0x6000 /* str imm5 */,
838
839/* b u l */ 0x7800 /* ldrb imm5 */,
840/* b u s */ 0x7000 /* strb imm5 */,
841/* b s l */ 0x0000 /* not allowed */,
842/* b s s */ 0x7000 /* strb imm5 */,
843
844/* h u l */ 0x8800 /* ldrh imm5 */,
845/* h u s */ 0x8000 /* strh imm5 */,
846/* h s l */ 0x0000 /* not allowed */,
847/* h s s */ 0x8000 /* strh imm5 */,
848};
849
850#define MEM_IMM8	0xc00
851#define MEM_IMM12	0x800000
852static const sljit_ins sljit_mem32[12] = {
853/* w u l */ 0xf8500000 /* ldr.w */,
854/* w u s */ 0xf8400000 /* str.w */,
855/* w s l */ 0xf8500000 /* ldr.w */,
856/* w s s */ 0xf8400000 /* str.w */,
857
858/* b u l */ 0xf8100000 /* ldrb.w */,
859/* b u s */ 0xf8000000 /* strb.w */,
860/* b s l */ 0xf9100000 /* ldrsb.w */,
861/* b s s */ 0xf8000000 /* strb.w */,
862
863/* h u l */ 0xf8300000 /* ldrh.w */,
864/* h u s */ 0xf8200000 /* strsh.w */,
865/* h s l */ 0xf9300000 /* ldrsh.w */,
866/* h s s */ 0xf8200000 /* strsh.w */,
867};
868
869/* Helper function. Dst should be reg + value, using at most 1 instruction, flags does not set. */
870static sljit_s32 emit_set_delta(struct sljit_compiler *compiler, sljit_s32 dst, sljit_s32 reg, sljit_sw value)
871{
872	if (value >= 0) {
873		if (value <= 0xfff)
874			return push_inst32(compiler, ADDWI | RD4(dst) | RN4(reg) | IMM12(value));
875		value = get_imm(value);
876		if (value != INVALID_IMM)
877			return push_inst32(compiler, ADD_WI | RD4(dst) | RN4(reg) | value);
878	}
879	else {
880		value = -value;
881		if (value <= 0xfff)
882			return push_inst32(compiler, SUBWI | RD4(dst) | RN4(reg) | IMM12(value));
883		value = get_imm(value);
884		if (value != INVALID_IMM)
885			return push_inst32(compiler, SUB_WI | RD4(dst) | RN4(reg) | value);
886	}
887	return SLJIT_ERR_UNSUPPORTED;
888}
889
890/* Can perform an operation using at most 1 instruction. */
891static sljit_s32 getput_arg_fast(struct sljit_compiler *compiler, sljit_s32 flags, sljit_s32 reg, sljit_s32 arg, sljit_sw argw)
892{
893	sljit_s32 other_r, shift;
894
895	SLJIT_ASSERT(arg & SLJIT_MEM);
896
897	if (SLJIT_UNLIKELY(flags & UPDATE)) {
898		if ((arg & REG_MASK) && !(arg & OFFS_REG_MASK) && argw <= 0xff && argw >= -0xff) {
899			if (SLJIT_UNLIKELY(flags & ARG_TEST))
900				return 1;
901
902			flags &= ~UPDATE;
903			arg &= 0xf;
904			if (argw >= 0)
905				argw |= 0x200;
906			else {
907				argw = -argw;
908			}
909
910			SLJIT_ASSERT(argw >= 0 && (argw & 0xff) <= 0xff);
911			FAIL_IF(push_inst32(compiler, sljit_mem32[flags] | MEM_IMM8 | RT4(reg) | RN4(arg) | 0x100 | argw));
912			return -1;
913		}
914		return 0;
915	}
916
917	if (SLJIT_UNLIKELY(arg & OFFS_REG_MASK)) {
918		if (SLJIT_UNLIKELY(flags & ARG_TEST))
919			return 1;
920
921		argw &= 0x3;
922		other_r = OFFS_REG(arg);
923		arg &= 0xf;
924
925		if (!argw && IS_3_LO_REGS(reg, arg, other_r))
926			FAIL_IF(push_inst16(compiler, sljit_mem16[flags] | RD3(reg) | RN3(arg) | RM3(other_r)));
927		else
928			FAIL_IF(push_inst32(compiler, sljit_mem32[flags] | RT4(reg) | RN4(arg) | RM4(other_r) | (argw << 4)));
929		return -1;
930	}
931
932	if (!(arg & REG_MASK) || argw > 0xfff || argw < -0xff)
933		return 0;
934
935	if (SLJIT_UNLIKELY(flags & ARG_TEST))
936		return 1;
937
938	arg &= 0xf;
939	if (IS_2_LO_REGS(reg, arg) && sljit_mem16_imm5[flags]) {
940		shift = 3;
941		if (IS_WORD_SIZE(flags)) {
942			if (OFFSET_CHECK(0x1f, 2))
943				shift = 2;
944		}
945		else if (flags & BYTE_SIZE)
946		{
947			if (OFFSET_CHECK(0x1f, 0))
948				shift = 0;
949		}
950		else {
951			SLJIT_ASSERT(flags & HALF_SIZE);
952			if (OFFSET_CHECK(0x1f, 1))
953				shift = 1;
954		}
955
956		if (shift != 3) {
957			FAIL_IF(push_inst16(compiler, sljit_mem16_imm5[flags] | RD3(reg) | RN3(arg) | (argw << (6 - shift))));
958			return -1;
959		}
960	}
961
962	/* SP based immediate. */
963	if (SLJIT_UNLIKELY(arg == SLJIT_SP) && OFFSET_CHECK(0xff, 2) && IS_WORD_SIZE(flags) && reg_map[reg] <= 7) {
964		FAIL_IF(push_inst16(compiler, STR_SP | ((flags & STORE) ? 0 : 0x800) | RDN3(reg) | (argw >> 2)));
965		return -1;
966	}
967
968	if (argw >= 0)
969		FAIL_IF(push_inst32(compiler, sljit_mem32[flags] | MEM_IMM12 | RT4(reg) | RN4(arg) | argw));
970	else
971		FAIL_IF(push_inst32(compiler, sljit_mem32[flags] | MEM_IMM8 | RT4(reg) | RN4(arg) | -argw));
972	return -1;
973}
974
975/* see getput_arg below.
976   Note: can_cache is called only for binary operators. Those
977   operators always uses word arguments without write back. */
978static sljit_s32 can_cache(sljit_s32 arg, sljit_sw argw, sljit_s32 next_arg, sljit_sw next_argw)
979{
980	sljit_sw diff;
981	if ((arg & OFFS_REG_MASK) || !(next_arg & SLJIT_MEM))
982		return 0;
983
984	if (!(arg & REG_MASK)) {
985		diff = argw - next_argw;
986		if (diff <= 0xfff && diff >= -0xfff)
987			return 1;
988		return 0;
989	}
990
991	if (argw == next_argw)
992		return 1;
993
994	diff = argw - next_argw;
995	if (arg == next_arg && diff <= 0xfff && diff >= -0xfff)
996		return 1;
997
998	return 0;
999}
1000
1001/* Emit the necessary instructions. See can_cache above. */
1002static sljit_s32 getput_arg(struct sljit_compiler *compiler, sljit_s32 flags, sljit_s32 reg,
1003	sljit_s32 arg, sljit_sw argw, sljit_s32 next_arg, sljit_sw next_argw)
1004{
1005	sljit_s32 tmp_r, other_r;
1006	sljit_sw diff;
1007
1008	SLJIT_ASSERT(arg & SLJIT_MEM);
1009	if (!(next_arg & SLJIT_MEM)) {
1010		next_arg = 0;
1011		next_argw = 0;
1012	}
1013
1014	tmp_r = (flags & STORE) ? TMP_REG3 : reg;
1015
1016	if (SLJIT_UNLIKELY((flags & UPDATE) && (arg & REG_MASK))) {
1017		/* Update only applies if a base register exists. */
1018		/* There is no caching here. */
1019		other_r = OFFS_REG(arg);
1020		arg &= 0xf;
1021		flags &= ~UPDATE;
1022
1023		if (!other_r) {
1024			if (!(argw & ~0xfff)) {
1025				FAIL_IF(push_inst32(compiler, sljit_mem32[flags] | MEM_IMM12 | RT4(reg) | RN4(arg) | argw));
1026				return push_inst32(compiler, ADDWI | RD4(arg) | RN4(arg) | IMM12(argw));
1027			}
1028
1029			if (compiler->cache_arg == SLJIT_MEM) {
1030				if (argw == compiler->cache_argw) {
1031					other_r = TMP_REG3;
1032					argw = 0;
1033				}
1034				else if (emit_set_delta(compiler, TMP_REG3, TMP_REG3, argw - compiler->cache_argw) != SLJIT_ERR_UNSUPPORTED) {
1035					FAIL_IF(compiler->error);
1036					compiler->cache_argw = argw;
1037					other_r = TMP_REG3;
1038					argw = 0;
1039				}
1040			}
1041
1042			if (argw) {
1043				FAIL_IF(load_immediate(compiler, TMP_REG3, argw));
1044				compiler->cache_arg = SLJIT_MEM;
1045				compiler->cache_argw = argw;
1046				other_r = TMP_REG3;
1047				argw = 0;
1048			}
1049		}
1050
1051		argw &= 0x3;
1052		if (!argw && IS_3_LO_REGS(reg, arg, other_r)) {
1053			FAIL_IF(push_inst16(compiler, sljit_mem16[flags] | RD3(reg) | RN3(arg) | RM3(other_r)));
1054			return push_inst16(compiler, ADD | SET_REGS44(arg, other_r));
1055		}
1056		FAIL_IF(push_inst32(compiler, sljit_mem32[flags] | RT4(reg) | RN4(arg) | RM4(other_r) | (argw << 4)));
1057		return push_inst32(compiler, ADD_W | RD4(arg) | RN4(arg) | RM4(other_r) | (argw << 6));
1058	}
1059	flags &= ~UPDATE;
1060
1061	SLJIT_ASSERT(!(arg & OFFS_REG_MASK));
1062
1063	if (compiler->cache_arg == arg) {
1064		diff = argw - compiler->cache_argw;
1065		if (!(diff & ~0xfff))
1066			return push_inst32(compiler, sljit_mem32[flags] | MEM_IMM12 | RT4(reg) | RN4(TMP_REG3) | diff);
1067		if (!((compiler->cache_argw - argw) & ~0xff))
1068			return push_inst32(compiler, sljit_mem32[flags] | MEM_IMM8 | RT4(reg) | RN4(TMP_REG3) | (compiler->cache_argw - argw));
1069		if (emit_set_delta(compiler, TMP_REG3, TMP_REG3, diff) != SLJIT_ERR_UNSUPPORTED) {
1070			FAIL_IF(compiler->error);
1071			return push_inst32(compiler, sljit_mem32[flags] | MEM_IMM12 | RT4(reg) | RN4(TMP_REG3) | 0);
1072		}
1073	}
1074
1075	next_arg = (arg & REG_MASK) && (arg == next_arg) && (argw != next_argw);
1076	arg &= 0xf;
1077	if (arg && compiler->cache_arg == SLJIT_MEM) {
1078		if (compiler->cache_argw == argw)
1079			return push_inst32(compiler, sljit_mem32[flags] | RT4(reg) | RN4(arg) | RM4(TMP_REG3));
1080		if (emit_set_delta(compiler, TMP_REG3, TMP_REG3, argw - compiler->cache_argw) != SLJIT_ERR_UNSUPPORTED) {
1081			FAIL_IF(compiler->error);
1082			compiler->cache_argw = argw;
1083			return push_inst32(compiler, sljit_mem32[flags] | RT4(reg) | RN4(arg) | RM4(TMP_REG3));
1084		}
1085	}
1086
1087	compiler->cache_argw = argw;
1088	if (next_arg && emit_set_delta(compiler, TMP_REG3, arg, argw) != SLJIT_ERR_UNSUPPORTED) {
1089		FAIL_IF(compiler->error);
1090		compiler->cache_arg = SLJIT_MEM | arg;
1091		arg = 0;
1092	}
1093	else {
1094		FAIL_IF(load_immediate(compiler, TMP_REG3, argw));
1095		compiler->cache_arg = SLJIT_MEM;
1096
1097		diff = argw - next_argw;
1098		if (next_arg && diff <= 0xfff && diff >= -0xfff) {
1099			FAIL_IF(push_inst16(compiler, ADD | SET_REGS44(TMP_REG3, arg)));
1100			compiler->cache_arg = SLJIT_MEM | arg;
1101			arg = 0;
1102		}
1103	}
1104
1105	if (arg)
1106		return push_inst32(compiler, sljit_mem32[flags] | RT4(reg) | RN4(arg) | RM4(TMP_REG3));
1107	return push_inst32(compiler, sljit_mem32[flags] | MEM_IMM12 | RT4(reg) | RN4(TMP_REG3) | 0);
1108}
1109
1110static SLJIT_INLINE sljit_s32 emit_op_mem(struct sljit_compiler *compiler, sljit_s32 flags, sljit_s32 reg, sljit_s32 arg, sljit_sw argw)
1111{
1112	if (getput_arg_fast(compiler, flags, reg, arg, argw))
1113		return compiler->error;
1114	compiler->cache_arg = 0;
1115	compiler->cache_argw = 0;
1116	return getput_arg(compiler, flags, reg, arg, argw, 0, 0);
1117}
1118
1119static SLJIT_INLINE sljit_s32 emit_op_mem2(struct sljit_compiler *compiler, sljit_s32 flags, sljit_s32 reg, sljit_s32 arg1, sljit_sw arg1w, sljit_s32 arg2, sljit_sw arg2w)
1120{
1121	if (getput_arg_fast(compiler, flags, reg, arg1, arg1w))
1122		return compiler->error;
1123	return getput_arg(compiler, flags, reg, arg1, arg1w, arg2, arg2w);
1124}
1125
1126/* --------------------------------------------------------------------- */
1127/*  Entry, exit                                                          */
1128/* --------------------------------------------------------------------- */
1129
1130SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_enter(struct sljit_compiler *compiler,
1131	sljit_s32 options, sljit_s32 args, sljit_s32 scratches, sljit_s32 saveds,
1132	sljit_s32 fscratches, sljit_s32 fsaveds, sljit_s32 local_size)
1133{
1134	sljit_s32 size, i, tmp;
1135	sljit_ins push;
1136
1137	CHECK_ERROR();
1138	CHECK(check_sljit_emit_enter(compiler, options, args, scratches, saveds, fscratches, fsaveds, local_size));
1139	set_emit_enter(compiler, options, args, scratches, saveds, fscratches, fsaveds, local_size);
1140
1141	push = (1 << 4);
1142
1143	tmp = saveds < SLJIT_NUMBER_OF_SAVED_REGISTERS ? (SLJIT_S0 + 1 - saveds) : SLJIT_FIRST_SAVED_REG;
1144	for (i = SLJIT_S0; i >= tmp; i--)
1145		push |= 1 << reg_map[i];
1146
1147	for (i = scratches; i >= SLJIT_FIRST_SAVED_REG; i--)
1148		push |= 1 << reg_map[i];
1149
1150	FAIL_IF((push & 0xff00)
1151		? push_inst32(compiler, PUSH_W | (1 << 14) | push)
1152		: push_inst16(compiler, PUSH | (1 << 8) | push));
1153
1154	/* Stack must be aligned to 8 bytes: (LR, R4) */
1155	size = GET_SAVED_REGISTERS_SIZE(scratches, saveds, 2);
1156	local_size = ((size + local_size + 7) & ~7) - size;
1157	compiler->local_size = local_size;
1158	if (local_size > 0) {
1159		if (local_size <= (127 << 2))
1160			FAIL_IF(push_inst16(compiler, SUB_SP | (local_size >> 2)));
1161		else
1162			FAIL_IF(emit_op_imm(compiler, SLJIT_SUB | ARG2_IMM, SLJIT_SP, SLJIT_SP, local_size));
1163	}
1164
1165	if (args >= 1)
1166		FAIL_IF(push_inst16(compiler, MOV | SET_REGS44(SLJIT_S0, SLJIT_R0)));
1167	if (args >= 2)
1168		FAIL_IF(push_inst16(compiler, MOV | SET_REGS44(SLJIT_S1, SLJIT_R1)));
1169	if (args >= 3)
1170		FAIL_IF(push_inst16(compiler, MOV | SET_REGS44(SLJIT_S2, SLJIT_R2)));
1171
1172	return SLJIT_SUCCESS;
1173}
1174
1175SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_set_context(struct sljit_compiler *compiler,
1176	sljit_s32 options, sljit_s32 args, sljit_s32 scratches, sljit_s32 saveds,
1177	sljit_s32 fscratches, sljit_s32 fsaveds, sljit_s32 local_size)
1178{
1179	sljit_s32 size;
1180
1181	CHECK_ERROR();
1182	CHECK(check_sljit_set_context(compiler, options, args, scratches, saveds, fscratches, fsaveds, local_size));
1183	set_set_context(compiler, options, args, scratches, saveds, fscratches, fsaveds, local_size);
1184
1185	size = GET_SAVED_REGISTERS_SIZE(scratches, saveds, 2);
1186	compiler->local_size = ((size + local_size + 7) & ~7) - size;
1187	return SLJIT_SUCCESS;
1188}
1189
1190SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_return(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 src, sljit_sw srcw)
1191{
1192	sljit_s32 i, tmp;
1193	sljit_ins pop;
1194
1195	CHECK_ERROR();
1196	CHECK(check_sljit_emit_return(compiler, op, src, srcw));
1197
1198	FAIL_IF(emit_mov_before_return(compiler, op, src, srcw));
1199
1200	if (compiler->local_size > 0) {
1201		if (compiler->local_size <= (127 << 2))
1202			FAIL_IF(push_inst16(compiler, ADD_SP | (compiler->local_size >> 2)));
1203		else
1204			FAIL_IF(emit_op_imm(compiler, SLJIT_ADD | ARG2_IMM, SLJIT_SP, SLJIT_SP, compiler->local_size));
1205	}
1206
1207	pop = (1 << 4);
1208
1209	tmp = compiler->saveds < SLJIT_NUMBER_OF_SAVED_REGISTERS ? (SLJIT_S0 + 1 - compiler->saveds) : SLJIT_FIRST_SAVED_REG;
1210	for (i = SLJIT_S0; i >= tmp; i--)
1211		pop |= 1 << reg_map[i];
1212
1213	for (i = compiler->scratches; i >= SLJIT_FIRST_SAVED_REG; i--)
1214		pop |= 1 << reg_map[i];
1215
1216	return (pop & 0xff00)
1217		? push_inst32(compiler, POP_W | (1 << 15) | pop)
1218		: push_inst16(compiler, POP | (1 << 8) | pop);
1219}
1220
1221/* --------------------------------------------------------------------- */
1222/*  Operators                                                            */
1223/* --------------------------------------------------------------------- */
1224
1225#ifdef __cplusplus
1226extern "C" {
1227#endif
1228
1229#if defined(__GNUC__)
1230extern unsigned int __aeabi_uidivmod(unsigned int numerator, int unsigned denominator);
1231extern int __aeabi_idivmod(int numerator, int denominator);
1232#else
1233#error "Software divmod functions are needed"
1234#endif
1235
1236#ifdef __cplusplus
1237}
1238#endif
1239
1240SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_op0(struct sljit_compiler *compiler, sljit_s32 op)
1241{
1242	sljit_sw saved_reg_list[3];
1243	sljit_sw saved_reg_count;
1244
1245	CHECK_ERROR();
1246	CHECK(check_sljit_emit_op0(compiler, op));
1247
1248	op = GET_OPCODE(op);
1249	switch (op) {
1250	case SLJIT_BREAKPOINT:
1251		return push_inst16(compiler, BKPT);
1252	case SLJIT_NOP:
1253		return push_inst16(compiler, NOP);
1254	case SLJIT_LMUL_UW:
1255	case SLJIT_LMUL_SW:
1256		return push_inst32(compiler, (op == SLJIT_LMUL_UW ? UMULL : SMULL)
1257			| (reg_map[SLJIT_R1] << 8)
1258			| (reg_map[SLJIT_R0] << 12)
1259			| (reg_map[SLJIT_R0] << 16)
1260			| reg_map[SLJIT_R1]);
1261	case SLJIT_DIVMOD_UW:
1262	case SLJIT_DIVMOD_SW:
1263	case SLJIT_DIV_UW:
1264	case SLJIT_DIV_SW:
1265		SLJIT_COMPILE_ASSERT((SLJIT_DIVMOD_UW & 0x2) == 0 && SLJIT_DIV_UW - 0x2 == SLJIT_DIVMOD_UW, bad_div_opcode_assignments);
1266		SLJIT_COMPILE_ASSERT(reg_map[2] == 1 && reg_map[3] == 2 && reg_map[4] == 12, bad_register_mapping);
1267
1268		saved_reg_count = 0;
1269		if (compiler->scratches >= 4)
1270			saved_reg_list[saved_reg_count++] = 12;
1271		if (compiler->scratches >= 3)
1272			saved_reg_list[saved_reg_count++] = 2;
1273		if (op >= SLJIT_DIV_UW)
1274			saved_reg_list[saved_reg_count++] = 1;
1275
1276		if (saved_reg_count > 0) {
1277			FAIL_IF(push_inst32(compiler, 0xf84d0d00 | (saved_reg_count >= 3 ? 16 : 8)
1278						| (saved_reg_list[0] << 12) /* str rX, [sp, #-8/-16]! */));
1279			if (saved_reg_count >= 2) {
1280				SLJIT_ASSERT(saved_reg_list[1] < 8);
1281				FAIL_IF(push_inst16(compiler, 0x9001 | (saved_reg_list[1] << 8) /* str rX, [sp, #4] */));
1282			}
1283			if (saved_reg_count >= 3) {
1284				SLJIT_ASSERT(saved_reg_list[2] < 8);
1285				FAIL_IF(push_inst16(compiler, 0x9002 | (saved_reg_list[2] << 8) /* str rX, [sp, #8] */));
1286			}
1287		}
1288
1289#if defined(__GNUC__)
1290		FAIL_IF(sljit_emit_ijump(compiler, SLJIT_FAST_CALL, SLJIT_IMM,
1291			((op | 0x2) == SLJIT_DIV_UW ? SLJIT_FUNC_OFFSET(__aeabi_uidivmod) : SLJIT_FUNC_OFFSET(__aeabi_idivmod))));
1292#else
1293#error "Software divmod functions are needed"
1294#endif
1295
1296		if (saved_reg_count > 0) {
1297			if (saved_reg_count >= 3) {
1298				SLJIT_ASSERT(saved_reg_list[2] < 8);
1299				FAIL_IF(push_inst16(compiler, 0x9802 | (saved_reg_list[2] << 8) /* ldr rX, [sp, #8] */));
1300			}
1301			if (saved_reg_count >= 2) {
1302				SLJIT_ASSERT(saved_reg_list[1] < 8);
1303				FAIL_IF(push_inst16(compiler, 0x9801 | (saved_reg_list[1] << 8) /* ldr rX, [sp, #4] */));
1304			}
1305			return push_inst32(compiler, 0xf85d0b00 | (saved_reg_count >= 3 ? 16 : 8)
1306						| (saved_reg_list[0] << 12) /* ldr rX, [sp], #8/16 */);
1307		}
1308		return SLJIT_SUCCESS;
1309	}
1310
1311	return SLJIT_SUCCESS;
1312}
1313
1314SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_op1(struct sljit_compiler *compiler, sljit_s32 op,
1315	sljit_s32 dst, sljit_sw dstw,
1316	sljit_s32 src, sljit_sw srcw)
1317{
1318	sljit_s32 dst_r, flags;
1319	sljit_s32 op_flags = GET_ALL_FLAGS(op);
1320
1321	CHECK_ERROR();
1322	CHECK(check_sljit_emit_op1(compiler, op, dst, dstw, src, srcw));
1323	ADJUST_LOCAL_OFFSET(dst, dstw);
1324	ADJUST_LOCAL_OFFSET(src, srcw);
1325
1326	compiler->cache_arg = 0;
1327	compiler->cache_argw = 0;
1328
1329	dst_r = SLOW_IS_REG(dst) ? dst : TMP_REG1;
1330
1331	op = GET_OPCODE(op);
1332	if (op >= SLJIT_MOV && op <= SLJIT_MOVU_P) {
1333		switch (op) {
1334		case SLJIT_MOV:
1335		case SLJIT_MOV_U32:
1336		case SLJIT_MOV_S32:
1337		case SLJIT_MOV_P:
1338			flags = WORD_SIZE;
1339			break;
1340		case SLJIT_MOV_U8:
1341			flags = BYTE_SIZE;
1342			if (src & SLJIT_IMM)
1343				srcw = (sljit_u8)srcw;
1344			break;
1345		case SLJIT_MOV_S8:
1346			flags = BYTE_SIZE | SIGNED;
1347			if (src & SLJIT_IMM)
1348				srcw = (sljit_s8)srcw;
1349			break;
1350		case SLJIT_MOV_U16:
1351			flags = HALF_SIZE;
1352			if (src & SLJIT_IMM)
1353				srcw = (sljit_u16)srcw;
1354			break;
1355		case SLJIT_MOV_S16:
1356			flags = HALF_SIZE | SIGNED;
1357			if (src & SLJIT_IMM)
1358				srcw = (sljit_s16)srcw;
1359			break;
1360		case SLJIT_MOVU:
1361		case SLJIT_MOVU_U32:
1362		case SLJIT_MOVU_S32:
1363		case SLJIT_MOVU_P:
1364			flags = WORD_SIZE | UPDATE;
1365			break;
1366		case SLJIT_MOVU_U8:
1367			flags = BYTE_SIZE | UPDATE;
1368			if (src & SLJIT_IMM)
1369				srcw = (sljit_u8)srcw;
1370			break;
1371		case SLJIT_MOVU_S8:
1372			flags = BYTE_SIZE | SIGNED | UPDATE;
1373			if (src & SLJIT_IMM)
1374				srcw = (sljit_s8)srcw;
1375			break;
1376		case SLJIT_MOVU_U16:
1377			flags = HALF_SIZE | UPDATE;
1378			if (src & SLJIT_IMM)
1379				srcw = (sljit_u16)srcw;
1380			break;
1381		case SLJIT_MOVU_S16:
1382			flags = HALF_SIZE | SIGNED | UPDATE;
1383			if (src & SLJIT_IMM)
1384				srcw = (sljit_s16)srcw;
1385			break;
1386		default:
1387			SLJIT_ASSERT_STOP();
1388			flags = 0;
1389			break;
1390		}
1391
1392		if (src & SLJIT_IMM)
1393			FAIL_IF(emit_op_imm(compiler, SLJIT_MOV | ARG2_IMM, dst_r, TMP_REG1, srcw));
1394		else if (src & SLJIT_MEM) {
1395			if (getput_arg_fast(compiler, flags, dst_r, src, srcw))
1396				FAIL_IF(compiler->error);
1397			else
1398				FAIL_IF(getput_arg(compiler, flags, dst_r, src, srcw, dst, dstw));
1399		} else {
1400			if (dst_r != TMP_REG1)
1401				return emit_op_imm(compiler, op, dst_r, TMP_REG1, src);
1402			dst_r = src;
1403		}
1404
1405		if (dst & SLJIT_MEM) {
1406			if (getput_arg_fast(compiler, flags | STORE, dst_r, dst, dstw))
1407				return compiler->error;
1408			else
1409				return getput_arg(compiler, flags | STORE, dst_r, dst, dstw, 0, 0);
1410		}
1411		return SLJIT_SUCCESS;
1412	}
1413
1414	if (op == SLJIT_NEG) {
1415#if (defined SLJIT_VERBOSE && SLJIT_VERBOSE) \
1416			|| (defined SLJIT_ARGUMENT_CHECKS && SLJIT_ARGUMENT_CHECKS)
1417		compiler->skip_checks = 1;
1418#endif
1419		return sljit_emit_op2(compiler, SLJIT_SUB | op_flags, dst, dstw, SLJIT_IMM, 0, src, srcw);
1420	}
1421
1422	flags = (GET_FLAGS(op_flags) ? SET_FLAGS : 0) | ((op_flags & SLJIT_KEEP_FLAGS) ? KEEP_FLAGS : 0);
1423	if (src & SLJIT_MEM) {
1424		if (getput_arg_fast(compiler, WORD_SIZE, TMP_REG2, src, srcw))
1425			FAIL_IF(compiler->error);
1426		else
1427			FAIL_IF(getput_arg(compiler, WORD_SIZE, TMP_REG2, src, srcw, dst, dstw));
1428		src = TMP_REG2;
1429	}
1430
1431	if (src & SLJIT_IMM)
1432		flags |= ARG2_IMM;
1433	else
1434		srcw = src;
1435
1436	emit_op_imm(compiler, flags | op, dst_r, TMP_REG1, srcw);
1437
1438	if (dst & SLJIT_MEM) {
1439		if (getput_arg_fast(compiler, flags | STORE, dst_r, dst, dstw))
1440			return compiler->error;
1441		else
1442			return getput_arg(compiler, flags | STORE, dst_r, dst, dstw, 0, 0);
1443	}
1444	return SLJIT_SUCCESS;
1445}
1446
1447SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_op2(struct sljit_compiler *compiler, sljit_s32 op,
1448	sljit_s32 dst, sljit_sw dstw,
1449	sljit_s32 src1, sljit_sw src1w,
1450	sljit_s32 src2, sljit_sw src2w)
1451{
1452	sljit_s32 dst_r, flags;
1453
1454	CHECK_ERROR();
1455	CHECK(check_sljit_emit_op2(compiler, op, dst, dstw, src1, src1w, src2, src2w));
1456	ADJUST_LOCAL_OFFSET(dst, dstw);
1457	ADJUST_LOCAL_OFFSET(src1, src1w);
1458	ADJUST_LOCAL_OFFSET(src2, src2w);
1459
1460	compiler->cache_arg = 0;
1461	compiler->cache_argw = 0;
1462
1463	dst_r = SLOW_IS_REG(dst) ? dst : TMP_REG1;
1464	flags = (GET_FLAGS(op) ? SET_FLAGS : 0) | ((op & SLJIT_KEEP_FLAGS) ? KEEP_FLAGS : 0);
1465
1466	if ((dst & SLJIT_MEM) && !getput_arg_fast(compiler, WORD_SIZE | STORE | ARG_TEST, TMP_REG1, dst, dstw))
1467		flags |= SLOW_DEST;
1468
1469	if (src1 & SLJIT_MEM) {
1470		if (getput_arg_fast(compiler, WORD_SIZE, TMP_REG1, src1, src1w))
1471			FAIL_IF(compiler->error);
1472		else
1473			flags |= SLOW_SRC1;
1474	}
1475	if (src2 & SLJIT_MEM) {
1476		if (getput_arg_fast(compiler, WORD_SIZE, TMP_REG2, src2, src2w))
1477			FAIL_IF(compiler->error);
1478		else
1479			flags |= SLOW_SRC2;
1480	}
1481
1482	if ((flags & (SLOW_SRC1 | SLOW_SRC2)) == (SLOW_SRC1 | SLOW_SRC2)) {
1483		if (!can_cache(src1, src1w, src2, src2w) && can_cache(src1, src1w, dst, dstw)) {
1484			FAIL_IF(getput_arg(compiler, WORD_SIZE, TMP_REG2, src2, src2w, src1, src1w));
1485			FAIL_IF(getput_arg(compiler, WORD_SIZE, TMP_REG1, src1, src1w, dst, dstw));
1486		}
1487		else {
1488			FAIL_IF(getput_arg(compiler, WORD_SIZE, TMP_REG1, src1, src1w, src2, src2w));
1489			FAIL_IF(getput_arg(compiler, WORD_SIZE, TMP_REG2, src2, src2w, dst, dstw));
1490		}
1491	}
1492	else if (flags & SLOW_SRC1)
1493		FAIL_IF(getput_arg(compiler, WORD_SIZE, TMP_REG1, src1, src1w, dst, dstw));
1494	else if (flags & SLOW_SRC2)
1495		FAIL_IF(getput_arg(compiler, WORD_SIZE, TMP_REG2, src2, src2w, dst, dstw));
1496
1497	if (src1 & SLJIT_MEM)
1498		src1 = TMP_REG1;
1499	if (src2 & SLJIT_MEM)
1500		src2 = TMP_REG2;
1501
1502	if (src1 & SLJIT_IMM)
1503		flags |= ARG1_IMM;
1504	else
1505		src1w = src1;
1506	if (src2 & SLJIT_IMM)
1507		flags |= ARG2_IMM;
1508	else
1509		src2w = src2;
1510
1511	if (dst == SLJIT_UNUSED)
1512		flags |= UNUSED_RETURN;
1513
1514	emit_op_imm(compiler, flags | GET_OPCODE(op), dst_r, src1w, src2w);
1515
1516	if (dst & SLJIT_MEM) {
1517		if (!(flags & SLOW_DEST)) {
1518			getput_arg_fast(compiler, WORD_SIZE | STORE, dst_r, dst, dstw);
1519			return compiler->error;
1520		}
1521		return getput_arg(compiler, WORD_SIZE | STORE, TMP_REG1, dst, dstw, 0, 0);
1522	}
1523	return SLJIT_SUCCESS;
1524}
1525
1526SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_get_register_index(sljit_s32 reg)
1527{
1528	CHECK_REG_INDEX(check_sljit_get_register_index(reg));
1529	return reg_map[reg];
1530}
1531
1532SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_get_float_register_index(sljit_s32 reg)
1533{
1534	CHECK_REG_INDEX(check_sljit_get_float_register_index(reg));
1535	return reg << 1;
1536}
1537
1538SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_op_custom(struct sljit_compiler *compiler,
1539	void *instruction, sljit_s32 size)
1540{
1541	CHECK_ERROR();
1542	CHECK(check_sljit_emit_op_custom(compiler, instruction, size));
1543
1544	if (size == 2)
1545		return push_inst16(compiler, *(sljit_u16*)instruction);
1546	return push_inst32(compiler, *(sljit_ins*)instruction);
1547}
1548
1549/* --------------------------------------------------------------------- */
1550/*  Floating point operators                                             */
1551/* --------------------------------------------------------------------- */
1552
1553SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_is_fpu_available(void)
1554{
1555#ifdef SLJIT_IS_FPU_AVAILABLE
1556	return SLJIT_IS_FPU_AVAILABLE;
1557#else
1558	/* Available by default. */
1559	return 1;
1560#endif
1561}
1562
1563#define FPU_LOAD (1 << 20)
1564
1565static sljit_s32 emit_fop_mem(struct sljit_compiler *compiler, sljit_s32 flags, sljit_s32 reg, sljit_s32 arg, sljit_sw argw)
1566{
1567	sljit_sw tmp;
1568	sljit_uw imm;
1569	sljit_sw inst = VSTR_F32 | (flags & (SLJIT_F32_OP | FPU_LOAD));
1570
1571	SLJIT_ASSERT(arg & SLJIT_MEM);
1572
1573	/* Fast loads and stores. */
1574	if (SLJIT_UNLIKELY(arg & OFFS_REG_MASK)) {
1575		FAIL_IF(push_inst32(compiler, ADD_W | RD4(TMP_REG2) | RN4(arg & REG_MASK) | RM4(OFFS_REG(arg)) | ((argw & 0x3) << 6)));
1576		arg = SLJIT_MEM | TMP_REG2;
1577		argw = 0;
1578	}
1579
1580	if ((arg & REG_MASK) && (argw & 0x3) == 0) {
1581		if (!(argw & ~0x3fc))
1582			return push_inst32(compiler, inst | 0x800000 | RN4(arg & REG_MASK) | DD4(reg) | (argw >> 2));
1583		if (!(-argw & ~0x3fc))
1584			return push_inst32(compiler, inst | RN4(arg & REG_MASK) | DD4(reg) | (-argw >> 2));
1585	}
1586
1587	/* Slow cases */
1588	SLJIT_ASSERT(!(arg & OFFS_REG_MASK));
1589	if (compiler->cache_arg == arg) {
1590		tmp = argw - compiler->cache_argw;
1591		if (!(tmp & ~0x3fc))
1592			return push_inst32(compiler, inst | 0x800000 | RN4(TMP_REG3) | DD4(reg) | (tmp >> 2));
1593		if (!(-tmp & ~0x3fc))
1594			return push_inst32(compiler, inst | RN4(TMP_REG3) | DD4(reg) | (-tmp >> 2));
1595		if (emit_set_delta(compiler, TMP_REG3, TMP_REG3, tmp) != SLJIT_ERR_UNSUPPORTED) {
1596			FAIL_IF(compiler->error);
1597			compiler->cache_argw = argw;
1598			return push_inst32(compiler, inst | 0x800000 | RN4(TMP_REG3) | DD4(reg));
1599		}
1600	}
1601
1602	if (arg & REG_MASK) {
1603		if (emit_set_delta(compiler, TMP_REG1, arg & REG_MASK, argw) != SLJIT_ERR_UNSUPPORTED) {
1604			FAIL_IF(compiler->error);
1605			return push_inst32(compiler, inst | 0x800000 | RN4(TMP_REG1) | DD4(reg));
1606		}
1607		imm = get_imm(argw & ~0x3fc);
1608		if (imm != INVALID_IMM) {
1609			FAIL_IF(push_inst32(compiler, ADD_WI | RD4(TMP_REG1) | RN4(arg & REG_MASK) | imm));
1610			return push_inst32(compiler, inst | 0x800000 | RN4(TMP_REG1) | DD4(reg) | ((argw & 0x3fc) >> 2));
1611		}
1612		imm = get_imm(-argw & ~0x3fc);
1613		if (imm != INVALID_IMM) {
1614			argw = -argw;
1615			FAIL_IF(push_inst32(compiler, SUB_WI | RD4(TMP_REG1) | RN4(arg & REG_MASK) | imm));
1616			return push_inst32(compiler, inst | RN4(TMP_REG1) | DD4(reg) | ((argw & 0x3fc) >> 2));
1617		}
1618	}
1619
1620	compiler->cache_arg = arg;
1621	compiler->cache_argw = argw;
1622
1623	FAIL_IF(load_immediate(compiler, TMP_REG3, argw));
1624	if (arg & REG_MASK)
1625		FAIL_IF(push_inst16(compiler, ADD | SET_REGS44(TMP_REG3, (arg & REG_MASK))));
1626	return push_inst32(compiler, inst | 0x800000 | RN4(TMP_REG3) | DD4(reg));
1627}
1628
1629static SLJIT_INLINE sljit_s32 sljit_emit_fop1_conv_sw_from_f64(struct sljit_compiler *compiler, sljit_s32 op,
1630	sljit_s32 dst, sljit_sw dstw,
1631	sljit_s32 src, sljit_sw srcw)
1632{
1633	if (src & SLJIT_MEM) {
1634		FAIL_IF(emit_fop_mem(compiler, (op & SLJIT_F32_OP) | FPU_LOAD, TMP_FREG1, src, srcw));
1635		src = TMP_FREG1;
1636	}
1637
1638	FAIL_IF(push_inst32(compiler, VCVT_S32_F32 | (op & SLJIT_F32_OP) | DD4(TMP_FREG1) | DM4(src)));
1639
1640	if (dst == SLJIT_UNUSED)
1641		return SLJIT_SUCCESS;
1642
1643	if (FAST_IS_REG(dst))
1644		return push_inst32(compiler, VMOV | (1 << 20) | RT4(dst) | DN4(TMP_FREG1));
1645
1646	/* Store the integer value from a VFP register. */
1647	return emit_fop_mem(compiler, 0, TMP_FREG1, dst, dstw);
1648}
1649
1650static SLJIT_INLINE sljit_s32 sljit_emit_fop1_conv_f64_from_sw(struct sljit_compiler *compiler, sljit_s32 op,
1651	sljit_s32 dst, sljit_sw dstw,
1652	sljit_s32 src, sljit_sw srcw)
1653{
1654	sljit_s32 dst_r = FAST_IS_REG(dst) ? dst : TMP_FREG1;
1655
1656	if (FAST_IS_REG(src))
1657		FAIL_IF(push_inst32(compiler, VMOV | RT4(src) | DN4(TMP_FREG1)));
1658	else if (src & SLJIT_MEM) {
1659		/* Load the integer value into a VFP register. */
1660		FAIL_IF(emit_fop_mem(compiler, FPU_LOAD, TMP_FREG1, src, srcw));
1661	}
1662	else {
1663		FAIL_IF(load_immediate(compiler, TMP_REG1, srcw));
1664		FAIL_IF(push_inst32(compiler, VMOV | RT4(TMP_REG1) | DN4(TMP_FREG1)));
1665	}
1666
1667	FAIL_IF(push_inst32(compiler, VCVT_F32_S32 | (op & SLJIT_F32_OP) | DD4(dst_r) | DM4(TMP_FREG1)));
1668
1669	if (dst & SLJIT_MEM)
1670		return emit_fop_mem(compiler, (op & SLJIT_F32_OP), TMP_FREG1, dst, dstw);
1671	return SLJIT_SUCCESS;
1672}
1673
1674static SLJIT_INLINE sljit_s32 sljit_emit_fop1_cmp(struct sljit_compiler *compiler, sljit_s32 op,
1675	sljit_s32 src1, sljit_sw src1w,
1676	sljit_s32 src2, sljit_sw src2w)
1677{
1678	if (src1 & SLJIT_MEM) {
1679		emit_fop_mem(compiler, (op & SLJIT_F32_OP) | FPU_LOAD, TMP_FREG1, src1, src1w);
1680		src1 = TMP_FREG1;
1681	}
1682
1683	if (src2 & SLJIT_MEM) {
1684		emit_fop_mem(compiler, (op & SLJIT_F32_OP) | FPU_LOAD, TMP_FREG2, src2, src2w);
1685		src2 = TMP_FREG2;
1686	}
1687
1688	FAIL_IF(push_inst32(compiler, VCMP_F32 | (op & SLJIT_F32_OP) | DD4(src1) | DM4(src2)));
1689	return push_inst32(compiler, VMRS);
1690}
1691
1692SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_fop1(struct sljit_compiler *compiler, sljit_s32 op,
1693	sljit_s32 dst, sljit_sw dstw,
1694	sljit_s32 src, sljit_sw srcw)
1695{
1696	sljit_s32 dst_r;
1697
1698	CHECK_ERROR();
1699	compiler->cache_arg = 0;
1700	compiler->cache_argw = 0;
1701	if (GET_OPCODE(op) != SLJIT_CONV_F64_FROM_F32)
1702		op ^= SLJIT_F32_OP;
1703
1704	SLJIT_COMPILE_ASSERT((SLJIT_F32_OP == 0x100), float_transfer_bit_error);
1705	SELECT_FOP1_OPERATION_WITH_CHECKS(compiler, op, dst, dstw, src, srcw);
1706
1707	dst_r = FAST_IS_REG(dst) ? dst : TMP_FREG1;
1708
1709	if (src & SLJIT_MEM) {
1710		emit_fop_mem(compiler, (op & SLJIT_F32_OP) | FPU_LOAD, dst_r, src, srcw);
1711		src = dst_r;
1712	}
1713
1714	switch (GET_OPCODE(op)) {
1715	case SLJIT_MOV_F64:
1716		if (src != dst_r) {
1717			if (dst_r != TMP_FREG1)
1718				FAIL_IF(push_inst32(compiler, VMOV_F32 | (op & SLJIT_F32_OP) | DD4(dst_r) | DM4(src)));
1719			else
1720				dst_r = src;
1721		}
1722		break;
1723	case SLJIT_NEG_F64:
1724		FAIL_IF(push_inst32(compiler, VNEG_F32 | (op & SLJIT_F32_OP) | DD4(dst_r) | DM4(src)));
1725		break;
1726	case SLJIT_ABS_F64:
1727		FAIL_IF(push_inst32(compiler, VABS_F32 | (op & SLJIT_F32_OP) | DD4(dst_r) | DM4(src)));
1728		break;
1729	case SLJIT_CONV_F64_FROM_F32:
1730		FAIL_IF(push_inst32(compiler, VCVT_F64_F32 | (op & SLJIT_F32_OP) | DD4(dst_r) | DM4(src)));
1731		op ^= SLJIT_F32_OP;
1732		break;
1733	}
1734
1735	if (dst & SLJIT_MEM)
1736		return emit_fop_mem(compiler, (op & SLJIT_F32_OP), dst_r, dst, dstw);
1737	return SLJIT_SUCCESS;
1738}
1739
1740SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_fop2(struct sljit_compiler *compiler, sljit_s32 op,
1741	sljit_s32 dst, sljit_sw dstw,
1742	sljit_s32 src1, sljit_sw src1w,
1743	sljit_s32 src2, sljit_sw src2w)
1744{
1745	sljit_s32 dst_r;
1746
1747	CHECK_ERROR();
1748	CHECK(check_sljit_emit_fop2(compiler, op, dst, dstw, src1, src1w, src2, src2w));
1749	ADJUST_LOCAL_OFFSET(dst, dstw);
1750	ADJUST_LOCAL_OFFSET(src1, src1w);
1751	ADJUST_LOCAL_OFFSET(src2, src2w);
1752
1753	compiler->cache_arg = 0;
1754	compiler->cache_argw = 0;
1755	op ^= SLJIT_F32_OP;
1756
1757	dst_r = FAST_IS_REG(dst) ? dst : TMP_FREG1;
1758	if (src1 & SLJIT_MEM) {
1759		emit_fop_mem(compiler, (op & SLJIT_F32_OP) | FPU_LOAD, TMP_FREG1, src1, src1w);
1760		src1 = TMP_FREG1;
1761	}
1762	if (src2 & SLJIT_MEM) {
1763		emit_fop_mem(compiler, (op & SLJIT_F32_OP) | FPU_LOAD, TMP_FREG2, src2, src2w);
1764		src2 = TMP_FREG2;
1765	}
1766
1767	switch (GET_OPCODE(op)) {
1768	case SLJIT_ADD_F64:
1769		FAIL_IF(push_inst32(compiler, VADD_F32 | (op & SLJIT_F32_OP) | DD4(dst_r) | DN4(src1) | DM4(src2)));
1770		break;
1771	case SLJIT_SUB_F64:
1772		FAIL_IF(push_inst32(compiler, VSUB_F32 | (op & SLJIT_F32_OP) | DD4(dst_r) | DN4(src1) | DM4(src2)));
1773		break;
1774	case SLJIT_MUL_F64:
1775		FAIL_IF(push_inst32(compiler, VMUL_F32 | (op & SLJIT_F32_OP) | DD4(dst_r) | DN4(src1) | DM4(src2)));
1776		break;
1777	case SLJIT_DIV_F64:
1778		FAIL_IF(push_inst32(compiler, VDIV_F32 | (op & SLJIT_F32_OP) | DD4(dst_r) | DN4(src1) | DM4(src2)));
1779		break;
1780	}
1781
1782	if (!(dst & SLJIT_MEM))
1783		return SLJIT_SUCCESS;
1784	return emit_fop_mem(compiler, (op & SLJIT_F32_OP), TMP_FREG1, dst, dstw);
1785}
1786
1787#undef FPU_LOAD
1788
1789/* --------------------------------------------------------------------- */
1790/*  Other instructions                                                   */
1791/* --------------------------------------------------------------------- */
1792
1793SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_fast_enter(struct sljit_compiler *compiler, sljit_s32 dst, sljit_sw dstw)
1794{
1795	CHECK_ERROR();
1796	CHECK(check_sljit_emit_fast_enter(compiler, dst, dstw));
1797	ADJUST_LOCAL_OFFSET(dst, dstw);
1798
1799	/* For UNUSED dst. Uncommon, but possible. */
1800	if (dst == SLJIT_UNUSED)
1801		return SLJIT_SUCCESS;
1802
1803	if (FAST_IS_REG(dst))
1804		return push_inst16(compiler, MOV | SET_REGS44(dst, TMP_REG3));
1805
1806	/* Memory. */
1807	if (getput_arg_fast(compiler, WORD_SIZE | STORE, TMP_REG3, dst, dstw))
1808		return compiler->error;
1809	/* TMP_REG3 is used for caching. */
1810	FAIL_IF(push_inst16(compiler, MOV | SET_REGS44(TMP_REG2, TMP_REG3)));
1811	compiler->cache_arg = 0;
1812	compiler->cache_argw = 0;
1813	return getput_arg(compiler, WORD_SIZE | STORE, TMP_REG2, dst, dstw, 0, 0);
1814}
1815
1816SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_fast_return(struct sljit_compiler *compiler, sljit_s32 src, sljit_sw srcw)
1817{
1818	CHECK_ERROR();
1819	CHECK(check_sljit_emit_fast_return(compiler, src, srcw));
1820	ADJUST_LOCAL_OFFSET(src, srcw);
1821
1822	if (FAST_IS_REG(src))
1823		FAIL_IF(push_inst16(compiler, MOV | SET_REGS44(TMP_REG3, src)));
1824	else if (src & SLJIT_MEM) {
1825		if (getput_arg_fast(compiler, WORD_SIZE, TMP_REG3, src, srcw))
1826			FAIL_IF(compiler->error);
1827		else {
1828			compiler->cache_arg = 0;
1829			compiler->cache_argw = 0;
1830			FAIL_IF(getput_arg(compiler, WORD_SIZE, TMP_REG2, src, srcw, 0, 0));
1831			FAIL_IF(push_inst16(compiler, MOV | SET_REGS44(TMP_REG3, TMP_REG2)));
1832		}
1833	}
1834	else if (src & SLJIT_IMM)
1835		FAIL_IF(load_immediate(compiler, TMP_REG3, srcw));
1836	return push_inst16(compiler, BLX | RN3(TMP_REG3));
1837}
1838
1839/* --------------------------------------------------------------------- */
1840/*  Conditional instructions                                             */
1841/* --------------------------------------------------------------------- */
1842
1843static sljit_uw get_cc(sljit_s32 type)
1844{
1845	switch (type) {
1846	case SLJIT_EQUAL:
1847	case SLJIT_MUL_NOT_OVERFLOW:
1848	case SLJIT_EQUAL_F64:
1849		return 0x0;
1850
1851	case SLJIT_NOT_EQUAL:
1852	case SLJIT_MUL_OVERFLOW:
1853	case SLJIT_NOT_EQUAL_F64:
1854		return 0x1;
1855
1856	case SLJIT_LESS:
1857	case SLJIT_LESS_F64:
1858		return 0x3;
1859
1860	case SLJIT_GREATER_EQUAL:
1861	case SLJIT_GREATER_EQUAL_F64:
1862		return 0x2;
1863
1864	case SLJIT_GREATER:
1865	case SLJIT_GREATER_F64:
1866		return 0x8;
1867
1868	case SLJIT_LESS_EQUAL:
1869	case SLJIT_LESS_EQUAL_F64:
1870		return 0x9;
1871
1872	case SLJIT_SIG_LESS:
1873		return 0xb;
1874
1875	case SLJIT_SIG_GREATER_EQUAL:
1876		return 0xa;
1877
1878	case SLJIT_SIG_GREATER:
1879		return 0xc;
1880
1881	case SLJIT_SIG_LESS_EQUAL:
1882		return 0xd;
1883
1884	case SLJIT_OVERFLOW:
1885	case SLJIT_UNORDERED_F64:
1886		return 0x6;
1887
1888	case SLJIT_NOT_OVERFLOW:
1889	case SLJIT_ORDERED_F64:
1890		return 0x7;
1891
1892	default: /* SLJIT_JUMP */
1893		SLJIT_ASSERT_STOP();
1894		return 0xe;
1895	}
1896}
1897
1898SLJIT_API_FUNC_ATTRIBUTE struct sljit_label* sljit_emit_label(struct sljit_compiler *compiler)
1899{
1900	struct sljit_label *label;
1901
1902	CHECK_ERROR_PTR();
1903	CHECK_PTR(check_sljit_emit_label(compiler));
1904
1905	if (compiler->last_label && compiler->last_label->size == compiler->size)
1906		return compiler->last_label;
1907
1908	label = (struct sljit_label*)ensure_abuf(compiler, sizeof(struct sljit_label));
1909	PTR_FAIL_IF(!label);
1910	set_label(label, compiler);
1911	return label;
1912}
1913
1914SLJIT_API_FUNC_ATTRIBUTE struct sljit_jump* sljit_emit_jump(struct sljit_compiler *compiler, sljit_s32 type)
1915{
1916	struct sljit_jump *jump;
1917	sljit_ins cc;
1918
1919	CHECK_ERROR_PTR();
1920	CHECK_PTR(check_sljit_emit_jump(compiler, type));
1921
1922	jump = (struct sljit_jump*)ensure_abuf(compiler, sizeof(struct sljit_jump));
1923	PTR_FAIL_IF(!jump);
1924	set_jump(jump, compiler, type & SLJIT_REWRITABLE_JUMP);
1925	type &= 0xff;
1926
1927	/* In ARM, we don't need to touch the arguments. */
1928	PTR_FAIL_IF(emit_imm32_const(compiler, TMP_REG1, 0));
1929	if (type < SLJIT_JUMP) {
1930		jump->flags |= IS_COND;
1931		cc = get_cc(type);
1932		jump->flags |= cc << 8;
1933		PTR_FAIL_IF(push_inst16(compiler, IT | (cc << 4) | 0x8));
1934	}
1935
1936	jump->addr = compiler->size;
1937	if (type <= SLJIT_JUMP)
1938		PTR_FAIL_IF(push_inst16(compiler, BX | RN3(TMP_REG1)));
1939	else {
1940		jump->flags |= IS_BL;
1941		PTR_FAIL_IF(push_inst16(compiler, BLX | RN3(TMP_REG1)));
1942	}
1943
1944	return jump;
1945}
1946
1947SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_ijump(struct sljit_compiler *compiler, sljit_s32 type, sljit_s32 src, sljit_sw srcw)
1948{
1949	struct sljit_jump *jump;
1950
1951	CHECK_ERROR();
1952	CHECK(check_sljit_emit_ijump(compiler, type, src, srcw));
1953	ADJUST_LOCAL_OFFSET(src, srcw);
1954
1955	/* In ARM, we don't need to touch the arguments. */
1956	if (!(src & SLJIT_IMM)) {
1957		if (FAST_IS_REG(src))
1958			return push_inst16(compiler, (type <= SLJIT_JUMP ? BX : BLX) | RN3(src));
1959
1960		FAIL_IF(emit_op_mem(compiler, WORD_SIZE, type <= SLJIT_JUMP ? TMP_PC : TMP_REG1, src, srcw));
1961		if (type >= SLJIT_FAST_CALL)
1962			return push_inst16(compiler, BLX | RN3(TMP_REG1));
1963	}
1964
1965	jump = (struct sljit_jump*)ensure_abuf(compiler, sizeof(struct sljit_jump));
1966	FAIL_IF(!jump);
1967	set_jump(jump, compiler, JUMP_ADDR | ((type >= SLJIT_FAST_CALL) ? IS_BL : 0));
1968	jump->u.target = srcw;
1969
1970	FAIL_IF(emit_imm32_const(compiler, TMP_REG1, 0));
1971	jump->addr = compiler->size;
1972	return push_inst16(compiler, (type <= SLJIT_JUMP ? BX : BLX) | RN3(TMP_REG1));
1973}
1974
1975SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_op_flags(struct sljit_compiler *compiler, sljit_s32 op,
1976	sljit_s32 dst, sljit_sw dstw,
1977	sljit_s32 src, sljit_sw srcw,
1978	sljit_s32 type)
1979{
1980	sljit_s32 dst_r, flags = GET_ALL_FLAGS(op);
1981	sljit_ins cc, ins;
1982
1983	CHECK_ERROR();
1984	CHECK(check_sljit_emit_op_flags(compiler, op, dst, dstw, src, srcw, type));
1985	ADJUST_LOCAL_OFFSET(dst, dstw);
1986	ADJUST_LOCAL_OFFSET(src, srcw);
1987
1988	if (dst == SLJIT_UNUSED)
1989		return SLJIT_SUCCESS;
1990
1991	op = GET_OPCODE(op);
1992	cc = get_cc(type & 0xff);
1993	dst_r = FAST_IS_REG(dst) ? dst : TMP_REG2;
1994
1995	if (op < SLJIT_ADD) {
1996		FAIL_IF(push_inst16(compiler, IT | (cc << 4) | (((cc & 0x1) ^ 0x1) << 3) | 0x4));
1997		if (reg_map[dst_r] > 7) {
1998			FAIL_IF(push_inst32(compiler, MOV_WI | RD4(dst_r) | 1));
1999			FAIL_IF(push_inst32(compiler, MOV_WI | RD4(dst_r) | 0));
2000		} else {
2001			FAIL_IF(push_inst16(compiler, MOVSI | RDN3(dst_r) | 1));
2002			FAIL_IF(push_inst16(compiler, MOVSI | RDN3(dst_r) | 0));
2003		}
2004		if (dst_r != TMP_REG2)
2005			return SLJIT_SUCCESS;
2006		return emit_op_mem(compiler, WORD_SIZE | STORE, TMP_REG2, dst, dstw);
2007	}
2008
2009	ins = (op == SLJIT_AND ? ANDI : (op == SLJIT_OR ? ORRI : EORI));
2010	if ((op == SLJIT_OR || op == SLJIT_XOR) && FAST_IS_REG(dst) && dst == src) {
2011		/* Does not change the other bits. */
2012		FAIL_IF(push_inst16(compiler, IT | (cc << 4) | 0x8));
2013		FAIL_IF(push_inst32(compiler, ins | RN4(src) | RD4(dst) | 1));
2014		if (flags & SLJIT_SET_E) {
2015			/* The condition must always be set, even if the ORRI/EORI is not executed above. */
2016			if (reg_map[dst] <= 7)
2017				return push_inst16(compiler, MOVS | RD3(TMP_REG1) | RN3(dst));
2018			return push_inst32(compiler, MOV_W | SET_FLAGS | RD4(TMP_REG1) | RM4(dst));
2019		}
2020		return SLJIT_SUCCESS;
2021	}
2022
2023	compiler->cache_arg = 0;
2024	compiler->cache_argw = 0;
2025	if (src & SLJIT_MEM) {
2026		FAIL_IF(emit_op_mem2(compiler, WORD_SIZE, TMP_REG2, src, srcw, dst, dstw));
2027		src = TMP_REG2;
2028		srcw = 0;
2029	} else if (src & SLJIT_IMM) {
2030		FAIL_IF(load_immediate(compiler, TMP_REG2, srcw));
2031		src = TMP_REG2;
2032		srcw = 0;
2033	}
2034
2035	if (op == SLJIT_AND || src != dst_r) {
2036		FAIL_IF(push_inst16(compiler, IT | (cc << 4) | (((cc & 0x1) ^ 0x1) << 3) | 0x4));
2037		FAIL_IF(push_inst32(compiler, ins | RN4(src) | RD4(dst_r) | 1));
2038		FAIL_IF(push_inst32(compiler, ins | RN4(src) | RD4(dst_r) | 0));
2039	}
2040	else {
2041		FAIL_IF(push_inst16(compiler, IT | (cc << 4) | 0x8));
2042		FAIL_IF(push_inst32(compiler, ins | RN4(src) | RD4(dst_r) | 1));
2043	}
2044
2045	if (dst_r == TMP_REG2)
2046		FAIL_IF(emit_op_mem2(compiler, WORD_SIZE | STORE, TMP_REG2, dst, dstw, 0, 0));
2047
2048	if (flags & SLJIT_SET_E) {
2049		/* The condition must always be set, even if the ORR/EORI is not executed above. */
2050		if (reg_map[dst_r] <= 7)
2051			return push_inst16(compiler, MOVS | RD3(TMP_REG1) | RN3(dst_r));
2052		return push_inst32(compiler, MOV_W | SET_FLAGS | RD4(TMP_REG1) | RM4(dst_r));
2053	}
2054	return SLJIT_SUCCESS;
2055}
2056
2057SLJIT_API_FUNC_ATTRIBUTE struct sljit_const* sljit_emit_const(struct sljit_compiler *compiler, sljit_s32 dst, sljit_sw dstw, sljit_sw init_value)
2058{
2059	struct sljit_const *const_;
2060	sljit_s32 dst_r;
2061
2062	CHECK_ERROR_PTR();
2063	CHECK_PTR(check_sljit_emit_const(compiler, dst, dstw, init_value));
2064	ADJUST_LOCAL_OFFSET(dst, dstw);
2065
2066	const_ = (struct sljit_const*)ensure_abuf(compiler, sizeof(struct sljit_const));
2067	PTR_FAIL_IF(!const_);
2068	set_const(const_, compiler);
2069
2070	dst_r = SLOW_IS_REG(dst) ? dst : TMP_REG1;
2071	PTR_FAIL_IF(emit_imm32_const(compiler, dst_r, init_value));
2072
2073	if (dst & SLJIT_MEM)
2074		PTR_FAIL_IF(emit_op_mem(compiler, WORD_SIZE | STORE, dst_r, dst, dstw));
2075	return const_;
2076}
2077
2078SLJIT_API_FUNC_ATTRIBUTE void sljit_set_jump_addr(sljit_uw addr, sljit_uw new_addr)
2079{
2080	sljit_u16 *inst = (sljit_u16*)addr;
2081	modify_imm32_const(inst, new_addr);
2082	SLJIT_CACHE_FLUSH(inst, inst + 4);
2083}
2084
2085SLJIT_API_FUNC_ATTRIBUTE void sljit_set_const(sljit_uw addr, sljit_sw new_constant)
2086{
2087	sljit_u16 *inst = (sljit_u16*)addr;
2088	modify_imm32_const(inst, new_constant);
2089	SLJIT_CACHE_FLUSH(inst, inst + 4);
2090}
2091