Searched refs:src1 (Results 76 - 100 of 339) sorted by relevance

1234567891011>>

/external/mesa3d/src/mesa/drivers/dri/i965/
H A Dtest_fs_cmod_propagation.cpp106 fs_reg src1 = v->vgrf(glsl_type::float_type); local
108 bld.ADD(dest, src0, src1);
113 * 0: add(8) dest src0 src1
117 * 0: add.ge.f0(8) dest src0 src1
138 fs_reg src1 = v->vgrf(glsl_type::float_type); local
140 bld.ADD(dest, src0, src1);
145 * 0: add(8) dest src0 src1
203 fs_reg src1 = v->vgrf(glsl_type::float_type); local
206 bld.ADD(dest, src0, src1);
212 * 0: add(8) dest src0 src1
242 fs_reg src1 = v->vgrf(glsl_type::float_type); local
280 fs_reg src1 = v->vgrf(glsl_type::float_type); local
283 bld.ADD(offset(dest, bld, 2), src0, src1); local
321 fs_reg src1 = v->vgrf(glsl_type::float_type); local
359 fs_reg src1 = v->vgrf(glsl_type::float_type); local
392 fs_reg src1 = v->vgrf(glsl_type::float_type); local
424 fs_reg src1 = v->vgrf(glsl_type::int_type); local
[all...]
H A Dtest_fs_saturate_propagation.cpp107 fs_reg src1 = v->vgrf(glsl_type::float_type); local
108 bld.ADD(dst0, src0, src1);
113 * 0: add(8) dst0 src0 src1
117 * 0: add.sat(8) dst0 src0 src1
143 fs_reg src1 = v->vgrf(glsl_type::float_type); local
144 bld.ADD(dst0, src0, src1);
150 * 0: add(8) dst0 src0 src1
180 fs_reg src1 = v->vgrf(glsl_type::float_type); local
181 bld.ADD(dst0, src0, src1)
187 * 0: (+f0) add(8) dst0 src0 src1
249 fs_reg src1 = v->vgrf(glsl_type::float_type); local
287 fs_reg src1 = v->vgrf(glsl_type::float_type); local
326 fs_reg src1 = v->vgrf(glsl_type::float_type); local
368 fs_reg src1 = v->vgrf(glsl_type::float_type); local
410 fs_reg src1 = v->vgrf(glsl_type::float_type); local
446 fs_reg src1 = v->vgrf(glsl_type::float_type); local
485 fs_reg src1 = v->vgrf(glsl_type::float_type); local
525 fs_reg src1 = v->vgrf(glsl_type::float_type); local
527 bld.ADD(offset(dst0, bld, 2), src0, src1); local
566 fs_reg src1 = v->vgrf(glsl_type::float_type); local
[all...]
/external/swiftshader/src/Shader/
H A DVertexProgram.cpp130 Src src1 = instruction->src[1]; local
148 if(src1.type != Shader::PARAMETER_VOID) s1 = fetchRegister(src1);
222 case Shader::OPCODE_M3X2: M3X2(d, s0, src1); break;
223 case Shader::OPCODE_M3X3: M3X3(d, s0, src1); break;
224 case Shader::OPCODE_M3X4: M3X4(d, s0, src1); break;
225 case Shader::OPCODE_M4X3: M4X3(d, s0, src1); break;
226 case Shader::OPCODE_M4X4: M4X4(d, s0, src1); break;
310 case Shader::OPCODE_LOOP: LOOP(src1); break;
330 case Shader::OPCODE_TEXLDL: TEXLOD(d, s0, src1, s
954 M3X2(Vector4f &dst, Vector4f &src0, Src &src1) argument
963 M3X3(Vector4f &dst, Vector4f &src0, Src &src1) argument
974 M3X4(Vector4f &dst, Vector4f &src0, Src &src1) argument
987 M4X3(Vector4f &dst, Vector4f &src0, Src &src1) argument
998 M4X4(Vector4f &dst, Vector4f &src0, Src &src1) argument
1016 BREAKC(Vector4f &src0, Vector4f &src1, Control control) argument
1515 TEX(Vector4f &dst, Vector4f &src0, const Src &src1) argument
1520 TEXOFFSET(Vector4f &dst, Vector4f &src0, const Src& src1, Vector4f &offset) argument
1525 TEXLOD(Vector4f &dst, Vector4f &src0, const Src& src1, Float4 &lod) argument
1530 TEXLODOFFSET(Vector4f &dst, Vector4f &src0, const Src& src1, Vector4f &offset, Float4 &lod) argument
1535 TEXELFETCH(Vector4f &dst, Vector4f &src0, const Src& src1, Float4 &lod) argument
1540 TEXELFETCHOFFSET(Vector4f &dst, Vector4f &src0, const Src& src1, Vector4f &offset, Float4 &lod) argument
1545 TEXGRAD(Vector4f &dst, Vector4f &src0, const Src& src1, Vector4f &dsx, Vector4f &dsy) argument
1550 TEXGRADOFFSET(Vector4f &dst, Vector4f &src0, const Src& src1, Vector4f &dsx, Vector4f &dsy, Vector4f &offset) argument
1555 TEXSIZE(Vector4f &dst, Float4 &lod, const Src &src1) argument
[all...]
H A DVertexProgram.hpp77 void M3X2(Vector4f &dst, Vector4f &src0, Src &src1);
78 void M3X3(Vector4f &dst, Vector4f &src0, Src &src1);
79 void M3X4(Vector4f &dst, Vector4f &src0, Src &src1);
80 void M4X3(Vector4f &dst, Vector4f &src0, Src &src1);
81 void M4X4(Vector4f &dst, Vector4f &src0, Src &src1);
83 void BREAKC(Vector4f &src0, Vector4f &src1, Control);
101 void IFC(Vector4f &src0, Vector4f &src1, Control);
H A DVertexPipeline.hpp41 Float4 power(Float4 &src0, Float4 &src1);
/external/vboot_reference/tests/
H A Dstateful_util_tests.c150 char* src1 = "Doogie"; local
159 TEST_PTR_EQ(src1, StatefulMemcpy_r(&s, src1, 6),
183 TEST_PTR_EQ(src1, StatefulMemcpy_r(&s, src1, 0),
191 TEST_PTR_EQ(NULL, StatefulMemcpy_r(&s, src1, 1),
223 char* src1 = "ThisIsATest"; local
230 StatefulInit(&s, src1, 12);
233 TEST_PTR_EQ(src1 + 6, s.remaining_buf, "StatefulMemcpy(6) buf");
/external/mesa3d/src/gallium/drivers/svga/svgadump/
H A Dsvga_shader.h194 struct sh_srcreg src1; member in struct:sh_src2op
209 struct sh_srcreg src1; member in struct:sh_binaryop
217 struct sh_srcreg src1; member in struct:sh_trinaryop
/external/opencv/cvaux/src/
H A Dcvdpstereo.cpp84 void icvFindStereoCorrespondenceByBirchfieldDP( uchar* src1, uchar* src2, argument
117 uchar* srcdata1 = src1 + widthStep * y;
324 if( ( CV_IMAX3( src1[(y-1)*widthStep+x], src1[y*widthStep+x],
325 src1[(y+1)*widthStep+x] ) -
326 CV_IMIN3( src1[(y-1)*widthStep+x], src1[y*widthStep+x],
327 src1[(y+1)*widthStep+x] ) ) >= ICV_BIRCH_DIFF_LUM )
508 CvMat *src1, *src2;
513 CV_CALL( src1
[all...]
/external/vixl/src/aarch64/
H A Dsimulator-aarch64.h1999 const LogicVRegister& src1,
2004 const LogicVRegister& src1,
2009 const LogicVRegister& src1,
2013 const LogicVRegister& src1,
2017 const LogicVRegister& src1,
2021 const LogicVRegister& src1,
2025 const LogicVRegister& src1,
2029 const LogicVRegister& src1,
2033 const LogicVRegister& src1,
2038 const LogicVRegister& src1,
[all...]
/external/mesa3d/src/mesa/drivers/dri/r200/
H A Dr200_vertprog.c369 #define ZERO_SRC_1 (((o_inst->src1 & ~(0xfff << R200_VPI_IN_X_SHIFT)) \
383 #define UNUSED_SRC_1 ((o_inst->src1 & ~15) | 9)
650 o_inst->src1 = ZERO_SRC_0;
672 o_inst->src1 = ZERO_SRC_0;
710 o_inst->src1 = UNUSED_SRC_0;
722 o_inst->src1 = MAKE_VSF_SOURCE(t_src_index(vp, &src[1]),
739 o_inst->src1 = UNUSED_SRC_0;
750 o_inst->src1 = ZERO_SRC_0;
772 o_inst->src1 = MAKE_VSF_SOURCE(t_src_index(vp, &src[1]),
782 o_inst->src1
[all...]
/external/opencv/cxcore/src/
H A Dcxnorm.cpp92 worktype t0 = (src1)[x] - (src2)[x];\
93 worktype t1 = (src1)[x+1]-(src2)[x+1];\
101 t0 = (src1)[x+2] - (src2)[x+2]; \
102 t1 = (src1)[x+3] - (src2)[x+3]; \
113 worktype t0 = (src1)[x] - (src2)[x];\
122 worktype t0 = (src1)[x*(cn)] - (src2)[x*(cn)]; \
278 IPCVAPI_IMPL( CvStatus, name,( const arrtype* src1, int step1, \
280 (src1, step1, src2, step2, size, _norm)) \
285 step1 /= sizeof(src1[0]); \
288 for( ; size.height--; src1
[all...]
/external/mesa3d/src/gallium/drivers/freedreno/ir3/
H A Ddisasm-a3xx.c264 print_reg_src((reg_t)(cat2->c1.src1), cat2->full, cat2->src1_r,
268 print_reg_src((reg_t)(cat2->rel1.src1), cat2->full, cat2->src1_r,
272 print_reg_src((reg_t)(cat2->src1), cat2->full, cat2->src1_r,
322 print_reg_src((reg_t)(cat3->c1.src1), full,
326 print_reg_src((reg_t)(cat3->rel1.src1), full,
330 print_reg_src((reg_t)(cat3->src1), full,
383 bool src1, src2, samp, tex; member in struct:__anon16168
443 if (info[cat5->opc].src1) {
445 print_reg_src((reg_t)(cat5->src1), cat5->full, false, false, false,
484 struct reginfo dst, src1, src local
[all...]
/external/avb/libavb/
H A Davb_sysdeps.h61 /* Compare |n| bytes in |src1| and |src2|.
64 * first |n| bytes of |src1| is found, respectively, to be less than,
66 int avb_memcmp(const void* src1,
/external/mesa3d/src/gallium/auxiliary/gallivm/
H A Dlp_bld_quad.c162 * src0 src1
166 * # 2 | 3 # # 6 | 7 # # 2 | 3 | 6 | 7 # src1
195 LLVMValueRef src0, src1; local
198 src1 = LLVMBuildBitCast(builder, src[i + 1], type2_ref, "");
200 dst[i + 0] = lp_build_interleave2(gallivm, type2, src0, src1, 0);
201 dst[i + 1] = lp_build_interleave2(gallivm, type2, src0, src1, 1);
/external/skia/samplecode/
H A DSamplePolyToPoly.cpp41 const SkScalar src1[] = { local
49 (void) m2.setPolyToPoly((const SkPoint*)src1, (SkPoint*)dst1, 4);
125 const int src1[] = { 0, 0 }; local
127 doDraw(canvas, &paint, src1, dst1, 1);
/external/skqp/samplecode/
H A DSamplePolyToPoly.cpp41 const SkScalar src1[] = { local
49 (void) m2.setPolyToPoly((const SkPoint*)src1, (SkPoint*)dst1, 4);
125 const int src1[] = { 0, 0 }; local
127 doDraw(canvas, &paint, src1, dst1, 1);
/external/avb/examples/uefi/
H A Duefi_avb_sysdeps.c33 int avb_memcmp(const void* src1, const void* src2, size_t n) { argument
34 return (int)CompareMem((VOID*)src1, (VOID*)src2, (UINTN)n);
/external/pcre/dist2/src/sljit/
H A DsljitNativeSPARC_common.c638 sljit_s32 src1, sljit_sw src1w,
675 if (!(flags & SRC2_IMM) && (flags & CUMULATIVE_OP) && (src1 & SLJIT_IMM) && src1w) {
681 src1 = src2;
690 if (FAST_IS_REG(src1))
691 src1_r = src1;
692 else if (src1 & SLJIT_IMM) {
701 if (getput_arg_fast(compiler, flags | LOAD_DATA, TMP_REG1, src1, src1w))
738 if (!can_cache(src1, src1w, src2, src2w) && can_cache(src1, src1w, dst, dstw)) {
739 FAIL_IF(getput_arg(compiler, flags | LOAD_DATA, TMP_REG2, src2, src2w, src1, src1
636 emit_op(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 flags, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument
879 sljit_emit_op2(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument
1015 sljit_emit_fop1_cmp(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument
1094 sljit_emit_fop2(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument
[all...]
/external/libvpx/libvpx/vp8/common/mips/msa/
H A Dmfqe_msa.c22 v16i8 src1 = { 0 }; local
40 INSERT_D2_SB(src0_d, src1_d, src1);
54 UNPCK_UB_SH(src1, src_r, src_l);
72 v16i8 src0, src1, src2, src3; local
82 LD_SB4(src_ptr, src_stride, src0, src1, src2, src3);
96 UNPCK_UB_SH(src1, src_r, src_l);
/external/libvpx/libvpx/vp9/common/mips/msa/
H A Dvp9_mfqe_msa.c22 v16i8 src1 = { 0 }; local
40 INSERT_D2_SB(src0_d, src1_d, src1);
54 UNPCK_UB_SH(src1, src_r, src_l);
72 v16i8 src0, src1, src2, src3, dst0, dst1, dst2, dst3; local
79 LD_SB4(src_ptr, src_stride, src0, src1, src2, src3);
93 UNPCK_UB_SH(src1, src_r, src_l);
/external/mesa3d/src/gallium/drivers/vc4/
H A Dvc4_qpu.h141 struct qpu_reg src0, struct qpu_reg src1) ATTRIBUTE_CONST;
143 struct qpu_reg src0, struct qpu_reg src1) ATTRIBUTE_CONST;
174 qpu_a_##op(struct qpu_reg dst, struct qpu_reg src0, struct qpu_reg src1) \
176 return qpu_a_alu2(QPU_A_##op, dst, src0, src1); \
181 qpu_m_##op(struct qpu_reg dst, struct qpu_reg src0, struct qpu_reg src1) \
183 return qpu_m_alu2(QPU_M_##op, dst, src0, src1); \
/external/webp/src/dsp/
H A Drescaler_mips32.c37 const uint8_t* src1 = src + channel; local
54 "lbu %[base], 0(%[src1]) \n\t"
56 "addu %[src1], %[src1], %[x_stride] \n\t"
71 : [accum]"=&r"(accum), [src1]"+r"(src1), [temp3]"=&r"(temp3),
97 const uint8_t* src1 = src + channel; local
106 "lbu %[temp2], 0(%[src1]) \n\t"
107 "addu %[src1], %[src1],
[all...]
/external/v8/src/s390/
H A Dmacro-assembler-s390.cc2775 void MacroAssembler::MovToFloatParameters(DoubleRegister src1, argument
2778 DCHECK(!src1.is(d2));
2780 Move(d0, src1);
2782 Move(d0, src1);
3224 void MacroAssembler::Mul32(Register dst, const MemOperand& src1) { argument
3225 if (is_uint12(src1.offset())) {
3226 ms(dst, src1);
3227 } else if (is_int20(src1.offset())) {
3228 msy(dst, src1);
3234 void MacroAssembler::Mul32(Register dst, Register src1) { ms argument
3236 Mul32(Register dst, const Operand& src1) argument
3247 MulHigh32(Register dst, Register src1, const MemOperand& src2) argument
3252 MulHigh32(Register dst, Register src1, Register src2) argument
3259 MulHigh32(Register dst, Register src1, const Operand& src2) argument
3273 MulHighU32(Register dst, Register src1, const MemOperand& src2) argument
3278 MulHighU32(Register dst, Register src1, Register src2) argument
3282 MulHighU32(Register dst, Register src1, const Operand& src2) argument
3299 Mul32WithOverflowIfCCUnequal(Register dst, Register src1, const MemOperand& src2) argument
3307 Mul32WithOverflowIfCCUnequal(Register dst, Register src1, Register src2) argument
3315 Mul32WithOverflowIfCCUnequal(Register dst, Register src1, const Operand& src2) argument
3322 Mul64(Register dst, const MemOperand& src1) argument
3330 Mul64(Register dst, Register src1) argument
3332 Mul64(Register dst, const Operand& src1) argument
3336 Mul(Register dst, Register src1, Register src2) argument
3368 Div32(Register dst, Register src1, const MemOperand& src2) argument
3373 Div32(Register dst, Register src1, Register src2) argument
3377 Div32(Register dst, Register src1, const Operand& src2) argument
3394 DivU32(Register dst, Register src1, const MemOperand& src2) argument
3399 DivU32(Register dst, Register src1, Register src2) argument
3403 DivU32(Register dst, Register src1, const Operand& src2) argument
3419 Mod32(Register dst, Register src1, const MemOperand& src2) argument
3424 Mod32(Register dst, Register src1, Register src2) argument
3428 Mod32(Register dst, Register src1, const Operand& src2) argument
3445 ModU32(Register dst, Register src1, const MemOperand& src2) argument
3450 ModU32(Register dst, Register src1, Register src2) argument
3454 ModU32(Register dst, Register src1, const Operand& src2) argument
3479 MulPWithCondition(Register dst, Register src1, Register src2) argument
3598 Add32(Register dst, Register src1, Register src2) argument
3615 AddP(Register dst, Register src1, Register src2) argument
3636 AddP_ExtendSrc(Register dst, Register src1, Register src2) argument
3709 AddLogicalWithCarry32(Register dst, Register src1, Register src2) argument
3726 AddLogical32(Register dst, Register src1, Register src2) argument
3780 SubLogicalWithBorrow32(Register dst, Register src1, Register src2) argument
3798 SubLogical32(Register dst, Register src1, Register src2) argument
3853 Sub32(Register dst, Register src1, Register src2) argument
3873 SubP(Register dst, Register src1, Register src2) argument
3896 SubP_ExtendSrc(Register dst, Register src1, Register src2) argument
3999 And(Register dst, Register src1, Register src2) argument
4016 AndP(Register dst, Register src1, Register src2) argument
4121 Or(Register dst, Register src1, Register src2) argument
4138 OrP(Register dst, Register src1, Register src2) argument
4209 Xor(Register dst, Register src1, Register src2) argument
4226 XorP(Register dst, Register src1, Register src2) argument
4367 Cmp32(Register src1, Register src2) argument
4370 CmpP(Register src1, Register src2) argument
4560 CmpSmiLiteral(Register src1, Smi* smi, Register scratch) argument
4574 CmpLogicalSmiLiteral(Register src1, Smi* smi, Register scratch) argument
4714 StoreMultipleP(Register src1, Register src2, const MemOperand& mem) argument
4739 StoreMultipleW(Register src1, Register src2, const MemOperand& mem) argument
[all...]
/external/opencv/cv/src/
H A Dcvaccum.cpp83 ( const srctype *src1, int step1, const srctype *src2, int step2, \
85 (src1, step1, src2, step2, dst, dststep, size) ) \
87 step1 /= sizeof(src1[0]); \
91 for( ; size.height--; src1 += step1, src2 += step2, dst += dststep ) \
96 dsttype t0 = dst[x] + cvtmacro(src1[x])*cvtmacro(src2[x]); \
97 dsttype t1 = dst[x+1] + cvtmacro(src1[x+1])*cvtmacro(src2[x+1]);\
100 t0 = dst[x + 2] + cvtmacro(src1[x + 2])*cvtmacro(src2[x + 2]); \
101 t1 = dst[x + 3] + cvtmacro(src1[x + 3])*cvtmacro(src2[x + 3]); \
106 dst[x] += cvtmacro(src1[x])*cvtmacro(src2[x]); \
190 ( const srctype *src1, in
[all...]
/external/libvpx/libvpx/vpx_dsp/mips/
H A Dvpx_convolve8_avg_msa.c20 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; local
38 LD_SB7(src, src_stride, src0, src1, src2, src3, src4, src5, src6);
39 XORI_B7_128_SB(src0, src1, src2, src3, src4, src5, src6);
42 hz_out0 = HORIZ_8TAP_FILT(src0, src1, mask0, mask1, mask2, mask3, filt_hz0,
98 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; local
117 LD_SB7(src, src_stride, src0, src1, src2, src3, src4, src5, src6);
120 XORI_B7_128_SB(src0, src1, src2, src3, src4, src5, src6);
123 hz_out1 = HORIZ_8TAP_FILT(src1, src1, mask0, mask1, mask2, mask3, filt_hz0,
232 v16i8 src0, src1, src local
268 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, mask; local
327 v16i8 src0, src1, src2, src3, src4, mask; local
373 v16i8 src0, src1, src2, src3, src4, mask; local
439 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, mask; local
[all...]

Completed in 620 milliseconds

1234567891011>>