/external/v8/src/x64/ |
H A D | macro-assembler-x64.cc | 1390 void MacroAssembler::SmiOrIfSmis(Register dst, Register src1, Register src2, 1393 if (dst.is(src1) || dst.is(src2)) { 1394 DCHECK(!src1.is(kScratchRegister)); 1396 movp(kScratchRegister, src1); 1401 movp(dst, src1); 1599 void MacroAssembler::JumpIfNotBothSmi(Register src1, 1603 Condition both_smi = CheckBothSmi(src1, src2); 1608 void MacroAssembler::JumpUnlessBothNonNegativeSmi(Register src1, 1612 Condition both_smi = CheckBothNonNegativeSmi(src1, src2); 1785 Register src1, 1783 SmiAddHelper(MacroAssembler* masm, Register dst, Register src1, T src2, Label* on_not_smi_result, Label::Distance near_jump) argument 1805 SmiAdd(Register dst, Register src1, Register src2, Label* on_not_smi_result, Label::Distance near_jump) argument 1816 SmiAdd(Register dst, Register src1, const Operand& src2, Label* on_not_smi_result, Label::Distance near_jump) argument 1827 SmiAdd(Register dst, Register src1, Register src2) argument 1847 SmiSubHelper(MacroAssembler* masm, Register dst, Register src1, T src2, Label* on_not_smi_result, Label::Distance near_jump) argument 1869 SmiSub(Register dst, Register src1, Register src2, Label* on_not_smi_result, Label::Distance near_jump) argument 1880 SmiSub(Register dst, Register src1, const Operand& src2, Label* on_not_smi_result, Label::Distance near_jump) argument 1892 SmiSubNoOverflowHelper(MacroAssembler* masm, Register dst, Register src1, T src2) argument 1906 SmiSub(Register dst, Register src1, Register src2) argument 1912 SmiSub(Register dst, Register src1, const Operand& src2) argument 1919 SmiMul(Register dst, Register src1, Register src2, Label* on_not_smi_result, Label::Distance near_jump) argument 1974 SmiDiv(Register dst, Register src1, Register src2, Label* on_not_smi_result, Label::Distance near_jump) argument 2037 SmiMod(Register dst, Register src1, Register src2, Label* on_not_smi_result, Label::Distance near_jump) argument 2113 SmiAnd(Register dst, Register src1, Register src2) argument 2136 SmiOr(Register dst, Register src1, Register src2) argument 2157 SmiXor(Register dst, Register src1, Register src2) argument 2246 SmiShiftLeft(Register dst, Register src1, Register src2, Label* on_not_smi_result, Label::Distance near_jump) argument 2297 SmiShiftLogicalRight(Register dst, Register src1, Register src2, Label* on_not_smi_result, Label::Distance near_jump) argument 2334 SmiShiftArithmeticRight(Register dst, Register src1, Register src2) argument 2352 SelectNonSmi(Register dst, Register src1, Register src2, Label* on_not_smis, Label::Distance near_jump) argument 2950 Ucomiss(XMMRegister src1, XMMRegister src2) argument 2960 Ucomiss(XMMRegister src1, const Operand& src2) argument 2970 Ucomisd(XMMRegister src1, XMMRegister src2) argument 2980 Ucomisd(XMMRegister src1, const Operand& src2) argument [all...] |
/external/libvpx/libvpx/vpx_dsp/mips/ |
H A D | vpx_convolve8_msa.c | 29 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; local 47 LD_SB7(src, src_stride, src0, src1, src2, src3, src4, src5, src6); 48 XORI_B7_128_SB(src0, src1, src2, src3, src4, src5, src6); 51 hz_out0 = HORIZ_8TAP_FILT(src0, src1, mask0, mask1, mask2, mask3, filt_hz0, 103 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; local 122 LD_SB7(src, src_stride, src0, src1, src2, src3, src4, src5, src6); 125 XORI_B7_128_SB(src0, src1, src2, src3, src4, src5, src6); 128 hz_out1 = HORIZ_8TAP_FILT(src1, src1, mask0, mask1, mask2, mask3, filt_hz0, 237 v16i8 src0, src1, src local 268 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, mask; local 325 v16i8 src0, src1, src2, src3, src4, mask, out0, out1; local 369 v16i8 src0, src1, src2, src3, src4, mask, out0, out1; local 458 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, mask; local 637 v16u8 src0 = { 0 }, src1 = { 0 }, dst0; local 677 v16u8 src0 = { 0 }, src1 = { 0 }, src2 = { 0 }, src3 = { 0 }; local 727 v16u8 src0 = { 0 }, src1 = { 0 }, src2 = { 0 }, src3 = { 0 }; local 964 v16u8 src0 = { 0 }, src1 = { 0 }, dst0; local 1007 v16i8 src0 = { 0 }, src1 = { 0 }, src2 = { 0 }, src3 = { 0 }; local 1049 v16i8 src0, src1, src2, src3, src4, src5, src6, src7; local [all...] |
H A D | intrapred_msa.c | 60 v16u8 src1, src2; local 62 src1 = LD_UB(src); 66 ST_UB2(src1, src2, dst, 16); 105 v16u8 src0, src1, src2, src3; local 115 src1 = (v16u8)__msa_fill_b(inp1); 119 ST_UB4(src0, src1, src2, src3, dst, dst_stride); 128 v16u8 src0, src1, src2, src3; local 138 src1 = (v16u8)__msa_fill_b(inp1); 144 ST_UB2(src1, src1, ds 390 v16u8 src0, src1, src2, src3; local 420 v16u8 src0, src1, src2, src3; local [all...] |
/external/mesa3d/src/compiler/nir/ |
H A D | nir_builder.h | 176 nir_ssa_def *src1, nir_ssa_def *src2, nir_ssa_def *src3) 186 if (src1) 187 instr->src[1].src = nir_src_for_ssa(src1); 312 nir_fdot(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 314 assert(src0->num_components == src1->num_components); 316 case 1: return nir_fmul(build, src0, src1); 317 case 2: return nir_fdot2(build, src0, src1); 318 case 3: return nir_fdot3(build, src0, src1); 319 case 4: return nir_fdot4(build, src0, src1); 328 nir_bany_inequal(nir_builder *b, nir_ssa_def *src0, nir_ssa_def *src1) argument 175 nir_build_alu(nir_builder *build, nir_op op, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2, nir_ssa_def *src3) argument [all...] |
/external/libvpx/libvpx/vp8/common/arm/neon/ |
H A D | loopfiltersimpleverticaledge_neon.c | 176 unsigned char *src1; local 189 src1 = s - 2; 190 d0u8x4 = read_4x8(src1, p); 191 src1 += p * 8; 192 d1u8x4 = read_4x8(src1, p); 253 src1 = s - 1; 254 write_2x8(src1, p, d2u8x2, d3u8x2);
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/external/mesa3d/src/gallium/drivers/llvmpipe/ |
H A D | lp_bld_blend_aos.c | 72 LLVMValueRef src1; member in struct:lp_build_blend_aos_context 99 LLVMValueRef src1_alpha = bld->src1_alpha ? bld->src1_alpha : bld->src1; 139 return bld->src1; 164 return lp_build_comp(&bld->base, bld->src1); 285 * @param src1 second blend src (for dual source blend) 286 * @param src1_alpha second blend src alpha (if not included in src1) 303 LLVMValueRef src1, 326 bld.src1 = src1; 296 lp_build_blend_aos(struct gallivm_state *gallivm, const struct pipe_blend_state *blend, enum pipe_format cbuf_format, struct lp_type type, unsigned rt, LLVMValueRef src, LLVMValueRef src_alpha, LLVMValueRef src1, LLVMValueRef src1_alpha, LLVMValueRef dst, LLVMValueRef mask, LLVMValueRef const_, LLVMValueRef const_alpha, const unsigned char swizzle[4], int nr_channels) argument
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/external/v8/src/ppc/ |
H A D | assembler-ppc.h | 805 void sub(Register dst, Register src1, Register src2, OEBit s = LeaveOE, 808 void subc(Register dst, Register src1, Register src2, OEBit s = LeaveOE, 810 void sube(Register dst, Register src1, Register src2, OEBit s = LeaveOE, 815 void add(Register dst, Register src1, Register src2, OEBit s = LeaveOE, 818 void addc(Register dst, Register src1, Register src2, OEBit o = LeaveOE, 820 void adde(Register dst, Register src1, Register src2, OEBit o = LeaveOE, 822 void addze(Register dst, Register src1, OEBit o = LeaveOE, RCBit r = LeaveRC); 824 void mullw(Register dst, Register src1, Register src2, OEBit o = LeaveOE, 827 void mulhw(Register dst, Register src1, Register src2, RCBit r = LeaveRC); 828 void mulhwu(Register dst, Register src1, Registe [all...] |
/external/mesa3d/src/compiler/spirv/ |
H A D | vtn_alu.c | 66 struct vtn_ssa_value *src1 = wrap_matrix(b, _src1); local 72 unsigned src1_columns = glsl_get_matrix_columns(src1->type); 88 src1 = src0_transpose; 97 /* We already have the rows of src0 and the columns of src1 available, 106 src1->elems[i]->def); 111 /* We don't handle the case where src1 is transposed but not src0, since 112 * the general case only uses individual components of src1 so the 113 * optimizer should chew through the transpose we emitted for src1. 117 /* dest[i] = sum(src0[j] * src1[i][j] for all j) */ 120 nir_channel(&b->nb, src1 155 vtn_handle_matrix_alu(struct vtn_builder *b, SpvOp opcode, struct vtn_value *dest, struct vtn_ssa_value *src0, struct vtn_ssa_value *src1) argument [all...] |
/external/mesa3d/src/gallium/drivers/swr/rasterizer/jitter/ |
H A D | blend_jit.cpp | 51 void GenerateBlendFactor(SWR_BLEND_FACTOR factor, Value* constColor[4], Value* src[4], Value* src1[4], Value* dst[4], Value* result[4]) argument 92 out[0] = src1[0]; 93 out[1] = src1[1]; 94 out[2] = src1[2]; 95 out[3] = src1[3]; 98 out[0] = out[1] = out[2] = out[3] = src1[3]; 131 out[0] = FSUB(VIMMED1(1.0f), src1[0]); 132 out[1] = FSUB(VIMMED1(1.0f), src1[1]); 133 out[2] = FSUB(VIMMED1(1.0f), src1[2]); 134 out[3] = FSUB(VIMMED1(1.0f), src1[ 569 Value* src1[4]; local [all...] |
/external/mesa3d/src/gallium/drivers/swr/rasterizer/core/ |
H A D | utils.h | 199 void vTranspose4x16(simd16scalar(&dst)[4], const simd16scalar &src0, const simd16scalar &src1, const simd16scalar &src2, const simd16scalar &src3) variable 204 simd16scalar pre1 = _simd16_permute_ps(src1, perm); // g 323 __m128i src1 = _mm_load_si128(reinterpret_cast<const __m128i *>(pSrc) + 1); // gggggggggggggggg local 328 simd16scalari cvt1 = _simd16_cvtepu8_epi32(src1); 386 __m128i src1 = _mm_load_si128(reinterpret_cast<const __m128i *>(pSrc) + 1); // gggggggggggggggg local 389 simdscalari cvt1 = _simd_cvtepu8_epi16(src1); 413 simdscalar src1 = _simd_load_ps((const float*)pSrc + 8); local 418 vTranspose4x8(vDst, src0, src1, src2, src3); 436 simd16scalar src1 = _simd16_load_ps(reinterpret_cast<const float *>(pSrc) + 16); local 442 vTranspose4x16(dst, src0, src1, src 465 simdscalar src1 = _simd_load_ps((const float*)pSrc + 8); local 487 simd16scalar src1 = _simd16_load_ps(reinterpret_cast<const float *>(pSrc) + 16); local 540 simd16scalar src1 = _simd16_load_ps(reinterpret_cast<const float *>(pSrc) + 16); // gggggggggggggggg local 600 simdscalari src1 = _simd_load_si(reinterpret_cast<const simdscalari *>(pSrc) + 1); // gggggggggggggggg local 669 simdscalari src1 = _simd_load_si(reinterpret_cast<const simdscalari *>(pSrc) + 1); // gggggggggggggggg local 730 simdscalari src1 = _simd_load_si(reinterpret_cast<const simdscalari *>(pSrc) + 1); // gggggggggggggggg local [all...] |
/external/pcre/dist2/src/sljit/ |
H A D | sljitNativePPC_common.c | 1123 sljit_s32 src1, sljit_sw src1w, 1166 if (FAST_IS_REG(src1)) { 1167 src1_r = src1; 1170 else if (src1 & SLJIT_IMM) { 1174 else if (getput_arg_fast(compiler, input_flags | LOAD_DATA, TMP_REG1, src1, src1w)) { 1202 if (!can_cache(src1, src1w, src2, src2w) && can_cache(src1, src1w, dst, dstw)) { 1203 FAIL_IF(getput_arg(compiler, input_flags | LOAD_DATA, TMP_REG2, src2, src2w, src1, src1w)); 1204 FAIL_IF(getput_arg(compiler, input_flags | LOAD_DATA, TMP_REG1, src1, src1w, dst, dstw)); 1207 FAIL_IF(getput_arg(compiler, input_flags | LOAD_DATA, TMP_REG1, src1, src1 1121 emit_op(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 input_flags, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument 1455 sljit_emit_op2(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument 1862 sljit_emit_fop1_cmp(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument 1931 sljit_emit_fop2(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument [all...] |
H A D | sljitNativeTILEGX_64.c | 1585 static SLJIT_INLINE sljit_s32 emit_single_op(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 flags, sljit_s32 dst, sljit_s32 src1, sljit_sw src2) argument 1592 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & SRC2_IMM)); 1599 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & SRC2_IMM)); 1614 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & SRC2_IMM)); 1629 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & SRC2_IMM)); 1643 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & SRC2_IMM)); 1652 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & SRC2_IMM)); 1663 FAIL_IF(SHRUI(TMP_EREG1, reg_map[src1], 63)); 1669 FAIL_IF(ADDLI(EQUAL_FLAG, reg_map[src1], src2)); 1673 FAIL_IF(ORI(ULESS_FLAG ,reg_map[src1], src 1959 emit_op(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 flags, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument 2260 sljit_emit_op2(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument 2500 sljit_emit_fop2(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument [all...] |
H A D | sljitNativeMIPS_common.c | 899 sljit_s32 src1, sljit_sw src1w, 939 if (!(flags & SRC2_IMM) && (flags & CUMULATIVE_OP) && (src1 & SLJIT_IMM) && src1w) { 946 src1 = src2; 955 if (FAST_IS_REG(src1)) { 956 src1_r = src1; 959 else if (src1 & SLJIT_IMM) { 968 if (getput_arg_fast(compiler, flags | LOAD_DATA, DR(TMP_REG1), src1, src1w)) 1005 if (!can_cache(src1, src1w, src2, src2w) && can_cache(src1, src1w, dst, dstw)) { 1006 FAIL_IF(getput_arg(compiler, flags | LOAD_DATA, DR(TMP_REG2), src2, src2w, src1, src1 897 emit_op(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 flags, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument 1183 sljit_emit_op2(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument 1363 sljit_emit_fop1_cmp(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument 1453 sljit_emit_fop2(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument 1736 sljit_emit_cmp(struct sljit_compiler *compiler, sljit_s32 type, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument 1857 sljit_emit_fcmp(struct sljit_compiler *compiler, sljit_s32 type, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) argument [all...] |
/external/opencv/cxcore/src/ |
H A D | cxcopy.cpp | 304 CvSparseMat* src1 = (CvSparseMat*)src; local 309 dst1->dims = src1->dims; 310 memcpy( dst1->size, src1->size, src1->dims*sizeof(src1->size[0])); 311 dst1->valoffset = src1->valoffset; 312 dst1->idxoffset = src1->idxoffset; 315 if( src1->heap->active_count >= dst1->hashsize*CV_SPARSE_HASH_RATIO ) 318 dst1->hashsize = src1->hashsize; 325 for( node = cvInitSparseMatIterator( src1, 841 const uchar* src1 = src + (size.height - 1)*srcstep; local [all...] |
/external/mesa3d/src/gallium/drivers/i915/ |
H A D | i915_fpc_emit.c | 116 uint saturate, uint src0, uint src1, uint src2) 127 if (GET_UREG_TYPE(src1) == REG_TYPE_CONST) 141 s[1] = src1; 157 src1 = s[1]; 164 *(p->csr++) = (A1_SRC0(src0) | A1_SRC1(src1)); 165 *(p->csr++) = (A2_SRC1(src1) | A2_SRC2(src2)); 227 coord, 0, 0 ); /* src0, src1, src2 */ 112 i915_emit_arith(struct i915_fp_compile * p, uint op, uint dest, uint mask, uint saturate, uint src0, uint src1, uint src2) argument
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H A D | i915_fpc_translate.c | 499 uint src0, src1, src2, flags; local 525 src1 = src_vector(p, &inst->Src[1], fs); 530 0, src0, src2, src1); /* NOTE: order of src2, src1 */ 590 src1 = src_vector(p, &inst->Src[1], fs); 596 swizzle(src0, X, Y, ZERO, ZERO), src1, 0); 609 src1 = src_vector(p, &inst->Src[1], fs); 615 swizzle(src0, X, Y, Z, ONE), src1, 0); 620 src1 = src_vector(p, &inst->Src[1], fs); 632 swizzle(src1, ON [all...] |
/external/mesa3d/src/mesa/drivers/dri/i965/ |
H A D | brw_vec4_surface_builder.cpp | 202 const src_reg &src0, const src_reg &src1, 212 const unsigned size = (src0.file != BAD_FILE) + (src1.file != BAD_FILE); 218 bld.MOV(writemask(srcs, WRITEMASK_Y), src1); local 305 const src_reg &src0, const src_reg &src1, 315 const unsigned size = (src0.file != BAD_FILE) + (src1.file != BAD_FILE); 321 bld.MOV(writemask(srcs, WRITEMASK_Y), src1); local 200 emit_untyped_atomic(const vec4_builder &bld, const src_reg &surface, const src_reg &addr, const src_reg &src0, const src_reg &src1, unsigned dims, unsigned rsize, unsigned op, brw_predicate pred) argument 303 emit_typed_atomic(const vec4_builder &bld, const src_reg &surface, const src_reg &addr, const src_reg &src0, const src_reg &src1, unsigned dims, unsigned rsize, unsigned op, brw_predicate pred) argument
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H A D | brw_eu_emit.c | 360 * is an immediate that src1's type must be the same as that of src0. 375 * immediate in src0 use a:ud for src1. 381 * Don't do any of this for 64-bit immediates, since the src1 fields 402 * Strangely, we do have a mapping for imm:f in src1, so we don't need 500 /* Only src1 can be immediate in two-argument instructions. 845 struct brw_reg dest, struct brw_reg src0, struct brw_reg src1) 849 assert(src1.file != BRW_IMMEDIATE_VALUE || type_sz(src1.type) <= 4); 854 brw_set_src1(p, insn, src1); 870 struct brw_reg src0, struct brw_reg src1, struc 844 brw_alu2(struct brw_codegen *p, unsigned opcode, struct brw_reg dest, struct brw_reg src0, struct brw_reg src1) argument 869 brw_alu3(struct brw_codegen *p, unsigned opcode, struct brw_reg dest, struct brw_reg src0, struct brw_reg src1, struct brw_reg src2) argument 1097 brw_AVG(struct brw_codegen *p, struct brw_reg dest, struct brw_reg src0, struct brw_reg src1) argument 1118 brw_MUL(struct brw_codegen *p, struct brw_reg dest, struct brw_reg src0, struct brw_reg src1) argument 1152 brw_LINE(struct brw_codegen *p, struct brw_reg dest, struct brw_reg src0, struct brw_reg src1) argument 1162 brw_PLN(struct brw_codegen *p, struct brw_reg dest, struct brw_reg src0, struct brw_reg src1) argument 1387 gen6_IF(struct brw_codegen *p, enum brw_conditional_mod conditional, struct brw_reg src0, struct brw_reg src1) argument 1895 brw_CMP(struct brw_codegen *p, struct brw_reg dest, unsigned conditional, struct brw_reg src0, struct brw_reg src1) argument 1964 gen6_math(struct brw_codegen *p, struct brw_reg dest, unsigned function, struct brw_reg src0, struct brw_reg src1) argument [all...] |
/external/avb/test/ |
H A D | avb_sysdeps_posix_testing.cc | 37 int avb_memcmp(const void* src1, const void* src2, size_t n) { argument 38 return memcmp(src1, src2, n);
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/external/jacoco/org.jacoco.report.test/src/org/jacoco/report/internal/html/page/ |
H A D | PackagePageTest.java | 65 ISourceFileCoverage src1 = new SourceFileCoverageImpl("Src1.java", 68 class1, class2), Arrays.asList(src1));
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H A D | PackageSourcePageTest.java | 51 ISourceFileCoverage src1 = new SourceFileCoverageImpl("Src1.java", 56 Collections.<IClassCoverage> emptyList(), Arrays.asList(src1,
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/external/mesa3d/src/gallium/drivers/etnaviv/ |
H A D | etnaviv_disasm.c | 115 struct src_operand *src1; member in struct:opc_operands 417 print_src(operands->src1, true); 430 print_src(operands->src1, true); 440 print_src(operands->src1, true); 449 print_src(operands->src1, true); 555 struct src_operand src1 = { local 582 .src1 = &src1,
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/external/libvpx/libvpx/vpx_dsp/ppc/ |
H A D | inv_txfm_vsx.c | 273 int16x8_t src1 = load_tran_low(8 * sizeof(*input), input); local 302 TRANSPOSE8x8(src0, src1, src2, src3, src4, src5, src6, src7, tmp0, tmp1, tmp2, 306 TRANSPOSE8x8(tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7, src0, src1, src2, 308 IDCT8(src0, src1, src2, src3, src4, src5, src6, src7); 310 PIXEL_ADD(src1, d_u1, add, shift5); 995 int16x8_t src0[4][8], src1[4][8], src2[4][8], src3[4][8], tmp[4][8]; local 1020 LOAD_8x32(load_tran_low, src1[0][0], src1[1][0], src1[2][0], src1[ [all...] |
/external/mesa3d/src/gallium/drivers/freedreno/ir3/ |
H A D | instr-a3xx.h | 365 uint32_t src1 : 11; member in struct:PACKED::PACKED::PACKED 372 uint32_t src1 : 10; member in struct:PACKED::PACKED::PACKED 379 uint32_t src1 : 12; member in struct:PACKED::PACKED::PACKED 428 uint32_t src1 : 11; member in struct:PACKED::PACKED::PACKED 435 uint32_t src1 : 10; member in struct:PACKED::PACKED::PACKED 442 uint32_t src1 : 12; member in struct:PACKED::PACKED::PACKED 547 uint32_t src1 : 8; member in struct:PACKED::PACKED::PACKED 556 uint32_t src1 : 8; member in struct:PACKED::PACKED::PACKED 566 uint32_t src1 : 8; member in struct:PACKED::PACKED::PACKED 590 /* dword0 encoding for src_off: [src1 595 uint32_t src1 : 8; member in struct:PACKED 608 uint32_t src1 : 13; member in struct:PACKED [all...] |
/external/mesa3d/src/gallium/drivers/svga/ |
H A D | svga_tgsi_insn.c | 368 struct src_register src1) 373 emit_src(emit, src1)); 383 struct src_register src1, 389 emit_src(emit, src1) && 400 struct src_register src1, 407 emit_src(emit, src1) && 528 struct src_register src1) 536 type1 = SVGA3dShaderGetRegType( src1.base.value ); 540 src0.base.num != src1.base.num) 545 src0.base.num != src1 364 emit_op2(struct svga_shader_emitter *emit, SVGA3dShaderInstToken inst, SVGA3dShaderDestToken dest, struct src_register src0, struct src_register src1) argument 379 emit_op3(struct svga_shader_emitter *emit, SVGA3dShaderInstToken inst, SVGA3dShaderDestToken dest, struct src_register src0, struct src_register src1, struct src_register src2) argument 396 emit_op4(struct svga_shader_emitter *emit, SVGA3dShaderInstToken inst, SVGA3dShaderDestToken dest, struct src_register src0, struct src_register src1, struct src_register src2, struct src_register src3) argument 524 submit_op2(struct svga_shader_emitter *emit, SVGA3dShaderInstToken inst, SVGA3dShaderDestToken dest, struct src_register src0, struct src_register src1) argument 573 submit_op3(struct svga_shader_emitter *emit, SVGA3dShaderInstToken inst, SVGA3dShaderDestToken dest, struct src_register src0, struct src_register src1, struct src_register src2) argument 645 submit_op4(struct svga_shader_emitter *emit, SVGA3dShaderInstToken inst, SVGA3dShaderDestToken dest, struct src_register src0, struct src_register src1, struct src_register src2, struct src_register src3) argument 1034 struct src_register src1 = get_fake_arl_const( emit ); local 1175 const struct src_register src1 = local 1219 const struct src_register src1 = local 1254 struct src_register src1 = local 1494 emit_conditional(struct svga_shader_emitter *emit, unsigned compare_func, SVGA3dShaderDestToken dst, struct src_register src0, struct src_register src1, struct src_register pass, struct src_register fail) argument 1623 struct src_register src1 = translate_src_register( local 1641 const struct src_register src1 = local 1865 struct src_register src1 = local 2200 struct src_register src1 = translate_src_register( local 2242 const struct src_register src1 = translate_src_register( local 2293 submit_lrp(struct svga_shader_emitter *emit, SVGA3dShaderDestToken dst, struct src_register src0, struct src_register src1, struct src_register src2) argument 2338 const struct src_register src1 = translate_src_register( local 2368 const struct src_register src1 = translate_src_register( local [all...] |