/art/runtime/interpreter/mterp/mips/ |
H A D | op_nop.S | 2 GET_INST_OPCODE(t0) # extract opcode from rINST 3 GOTO_OPCODE(t0) # jump to next instruction
|
H A D | binopWide2addr.S | 18 EAS2(t0, rFP, rOBJ) # t0 <- &fp[A] 20 LOAD64($arg0, $arg1, t0) # a0/a1 <- vA/vA+1 22 or t0, $arg2, $arg3 # second arg (a2-a3) is zero? 23 beqz t0, common_errDivideByZero 29 GET_INST_OPCODE(t0) # extract opcode from rINST 30 SET_VREG64_GOTO($result0, $result1, rOBJ, t0) # vA/vA+1 <- $result0/$result1
|
H A D | fbinopWide2addr.S | 14 EAS2(t0, rFP, rOBJ) # t0 <- &fp[A] 15 LOAD64_F(fa0, fa0f, t0) 20 GET_INST_OPCODE(t0) # extract opcode from rINST 21 SET_VREG64_F_GOTO(fv0, fv0f, rOBJ, t0) # vA/vA+1 <- fv0
|
H A D | op_move_16.S | 8 GET_INST_OPCODE(t0) # extract opcode from rINST 10 SET_VREG_OBJECT_GOTO(a2, a0, t0) # fp[AAAA] <- a2 12 SET_VREG_GOTO(a2, a0, t0) # fp[AAAA] <- a2
|
H A D | op_move_from16.S | 8 GET_INST_OPCODE(t0) # extract opcode from rINST 10 SET_VREG_OBJECT_GOTO(a2, a0, t0) # fp[AA] <- a2 12 SET_VREG_GOTO(a2, a0, t0) # fp[AA] <- a2
|
H A D | unop.S | 12 GET_OPA4(t0) # t0 <- A+ 18 SET_VREG_GOTO($result0, t0, t1) # vA <- result0
|
H A D | op_const_16.S | 5 GET_INST_OPCODE(t0) # extract opcode from rINST 6 SET_VREG_GOTO(a0, a3, t0) # vAA <- a0
|
H A D | op_mul_long.S | 14 and t0, a0, 255 # a2 <- BB 16 EAS2(t0, rFP, t0) # t0 <- &fp[BB] 17 LOAD64(a0, a1, t0) # a0/a1 <- vBB/vBB+1 19 EAS2(t1, rFP, t1) # t0 <- &fp[CC] 31 mul t0, a2, a1 # t0= a2a1 33 addu v1, v1, t0 # v1= a3a0 + a2a1; 41 GET_INST_OPCODE(t0) # extrac [all...] |
H A D | bincmp.S | 14 li t0, JIT_CHECK_OSR 15 beq rPROFILE, t0, .L_check_not_taken_osr 17 GET_INST_OPCODE(t0) # extract opcode from rINST 18 GOTO_OPCODE(t0) # jump to next instruction
|
H A D | op_move.S | 8 GET_INST_OPCODE(t0) # t0 <- opcode from rINST 10 SET_VREG_OBJECT_GOTO(a2, a0, t0) # fp[A] <- a2 12 SET_VREG_GOTO(a2, a0, t0) # fp[A] <- a2
|
H A D | zcmp.S | 12 li t0, JIT_CHECK_OSR # possible OSR re-entry? 13 beq rPROFILE, t0, .L_check_not_taken_osr 15 GET_INST_OPCODE(t0) # extract opcode from rINST 16 GOTO_OPCODE(t0) # jump to next instruction
|
H A D | op_aput_wide.S | 6 GET_OPA(t0) # t0 <- AA 15 EAS2(rOBJ, rFP, t0) # rOBJ <- &fp[AA] 21 GET_INST_OPCODE(t0) # extract opcode from rINST 22 GET_OPCODE_TARGET(t0) 24 JR(t0) # jump to next instruction
|
H A D | op_cmp_long.S | 8 * slt t0, x.hi, y.hi; # (x.hi < y.hi) ? 1:0 10 * subu v0, t0, t1 # v0= -1:1:0 for [ < > = ] 23 slt t0, a1, a3 # compare hi 25 subu v0, t1, t0 # v0 <- (-1, 1, 0) 28 sltu t0, a0, a2 # compare lo 30 subu v0, t1, t0 # v0 <- (-1, 1, 0) for [< > =] 33 GET_INST_OPCODE(t0) # extract opcode from rINST 34 SET_VREG_GOTO(v0, rOBJ, t0) # vAA <- v0
|
H A D | op_shr_long_2addr.S | 9 EAS2(t0, rFP, t2) # t0 <- &fp[A] 10 LOAD64(a0, a1, t0) # a0/a1 <- vA/vA+1 12 GET_INST_OPCODE(t0) # extract opcode from rINST 22 SET_VREG64_GOTO(v0, v1, t2, t0) # vA/vA+1 <- v0/v1 27 SET_VREG64_GOTO(v1, a3, t2, t0) # vA/vA+1 <- rlo/rhi
|
H A D | op_ushr_long_2addr.S | 9 EAS2(t0, rFP, t3) # t0 <- &fp[A] 10 LOAD64(a0, a1, t0) # a0/a1 <- vA/vA+1 13 GET_INST_OPCODE(t0) # extract opcode from rINST 23 SET_VREG64_GOTO(v0, v1, t3, t0) # vA/vA+1 <- v0/v1 27 SET_VREG64_GOTO(v1, zero, t3, t0) # vA/vA+1 <- rlo/rhi
|
H A D | fbinop2addr.S | 17 GET_INST_OPCODE(t0) # extract opcode from rINST 18 SET_VREG_F_GOTO(fv0, rOBJ, t0) # vA <- result
|
H A D | funopWider.S | 13 GET_INST_OPCODE(t0) # extract opcode from rINST 14 SET_VREG64_F_GOTO(fv0, fv0f, rOBJ, t0) # vA/vA+1 <- fv0
|
H A D | invoke.S | 18 GET_INST_OPCODE(t0) 19 GOTO_OPCODE(t0)
|
H A D | invoke_polymorphic.S | 18 GET_INST_OPCODE(t0) 19 GOTO_OPCODE(t0)
|
H A D | op_aput_object.S | 13 GET_INST_OPCODE(t0) # extract opcode from rINST 14 GOTO_OPCODE(t0) # jump to next instruction
|
H A D | op_const.S | 7 GET_INST_OPCODE(t0) # extract opcode from rINST 8 SET_VREG_GOTO(a0, a3, t0) # vAA <- a0
|
H A D | op_const_4.S | 7 GET_INST_OPCODE(t0) # extract opcode from rINST 8 SET_VREG_GOTO(a1, a0, t0) # fp[A] <- a1
|
H A D | op_const_high16.S | 6 GET_INST_OPCODE(t0) # extract opcode from rINST 7 SET_VREG_GOTO(a0, a3, t0) # vAA <- a0
|
/art/runtime/arch/mips/ |
H A D | memcmp16_mips.S | 24 li $t0,0 30 1: lhu $t0,0($a0) 33 bne $t0,$t1,done 39 subu $v0,$t0,$t1
|
/art/runtime/arch/mips64/ |
H A D | memcmp16_mips64.S | 26 move $t0, $zero 34 lhu $t0, 0($a0) 36 bne $t0, $t1, done 45 dsubu $v0, $t0, $t1
|