Searched refs:arg0 (Results 1 - 25 of 29) sorted by relevance

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/device/linaro/bootloader/edk2/EmulatorPkg/Unix/
H A DGdbRun44 # @param $arg0 - Symbol file changes number
49 if $SymbolFileChangesCount < $arg0
51 set $SymbolFileChangesCount = $arg0
58 # @param $arg0 - Symbol file changes number
62 if $SymbolFileChangesCount < $arg0
66 set $SymbolFileChangesCount = $arg0
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/
H A Dplat_sip_calls.c29 uint32_t ddr_smc_handler(uint64_t arg0, uint64_t arg1, argument
34 return ddr_set_rate((uint32_t)arg0);
36 return ddr_round_rate((uint32_t)arg0);
40 dram_set_odt_pd(arg0, arg1, arg2);
/device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/soc/t186/drivers/mce/
H A Dmce.c153 int32_t mce_command_handler(uint64_t cmd, uint64_t arg0, uint64_t arg1, argument
172 ret = ops->enter_cstate(cpu_ari_base, arg0, arg1);
188 ret = ops->update_cstate_info(cpu_ari_base, (uint32_t)arg0,
203 ret = ops->update_crossover_time(cpu_ari_base, arg0, arg1);
212 ret64 = ops->read_cstate_stats(cpu_ari_base, arg0);
221 ret = ops->write_cstate_stats(cpu_ari_base, arg0, arg1);
230 ret = ops->is_ccx_allowed(cpu_ari_base, arg0, arg1);
243 ret = ops->is_sc7_allowed(cpu_ari_base, arg0, arg1);
258 ret = ops->online_core(cpu_ari_base, arg0);
266 ret = ops->cc3_ctrl(cpu_ari_base, arg0, arg
[all...]
/device/linaro/bootloader/arm-trusted-firmware/bl32/tsp/
H A Dtsp_private.h65 tsp_args_t *tsp_cpu_resume_main(uint64_t arg0,
73 tsp_args_t *tsp_cpu_suspend_main(uint64_t arg0,
82 tsp_args_t *tsp_cpu_off_main(uint64_t arg0,
H A Dtsp_main.c42 static tsp_args_t *set_smc_args(uint64_t arg0, argument
60 write_sp_arg(pcpu_smc_args, TSP_ARG0, arg0);
144 tsp_args_t *tsp_cpu_off_main(uint64_t arg0, argument
187 tsp_args_t *tsp_cpu_suspend_main(uint64_t arg0, argument
267 tsp_args_t *tsp_system_off_main(uint64_t arg0, argument
299 tsp_args_t *tsp_system_reset_main(uint64_t arg0, argument
/device/linaro/bootloader/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/
H A Dpm_api_sys.c22 #define PM_PACK_PAYLOAD1(pl, arg0) { \
23 pl[0] = (uint32_t)(arg0); \
26 #define PM_PACK_PAYLOAD2(pl, arg0, arg1) { \
28 PM_PACK_PAYLOAD1(pl, arg0); \
31 #define PM_PACK_PAYLOAD3(pl, arg0, arg1, arg2) { \
33 PM_PACK_PAYLOAD2(pl, arg0, arg1); \
36 #define PM_PACK_PAYLOAD4(pl, arg0, arg1, arg2, arg3) { \
38 PM_PACK_PAYLOAD3(pl, arg0, arg1, arg2); \
41 #define PM_PACK_PAYLOAD5(pl, arg0, arg1, arg2, arg3, arg4) { \
43 PM_PACK_PAYLOAD4(pl, arg0, arg
[all...]
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/drivers/dram/
H A Ddfs.h43 uint32_t dram_set_odt_pd(uint32_t arg0, uint32_t arg1, uint32_t arg2);
H A Ddfs.c1907 * arg0: bit0-7: sr_idle; bit8-15:sr_mc_gate_idle; bit16-31: standby idle
1911 uint32_t dram_set_odt_pd(uint32_t arg0, uint32_t arg1, uint32_t arg2) argument
1920 lp_cfg->sr_idle = arg0 & 0xff;
1921 lp_cfg->sr_mc_gate_idle = (arg0 >> 8) & 0xff;
1922 lp_cfg->standby_idle = (arg0 >> 16) & 0xffff;
1952 sr_tmp = arg0 & 0xffff;
1957 mmio_write_32(CIC_BASE + CIC_IDLE_TH, (arg0 >> 16) & 0xffff);
/device/linaro/bootloader/arm-trusted-firmware/lib/optee/
H A Doptee_utils.c163 header_ep->args.arg0 = MODE_RW_64;
212 header_ep->args.arg0 = MODE_RW_32;
214 header_ep->args.arg0 = MODE_RW_64;
/device/linaro/bootloader/arm-trusted-firmware/bl2/
H A Dbl2_image_load.c89 bl31_ep_info->args.arg0 = (unsigned long)bl2_to_bl31_params;
220 bl31_ep_info->args.arg0 = (unsigned long) bl2_to_bl31_params;
H A Dbl2_image_load_v2.c90 /* Populate arg0 for the next BL image */
91 bl2_to_next_bl_params->head->ep_info->args.arg0 = (u_register_t)bl2_to_next_bl_params;
/device/linaro/bootloader/arm-trusted-firmware/include/common/
H A Dep_info.h65 u_register_t arg0; member in struct:aapcs64_params
76 u_register_t arg0; member in struct:aapcs32_params
/device/google/accessory/demokit/app/src/com/google/android/DemoKit/
H A DRelayController.java44 public void onCheckedChanged(CompoundButton arg0, boolean isChecked) { argument
/device/linaro/bootloader/arm-trusted-firmware/plat/mediatek/mt6795/
H A Dbl31_plat_setup.c359 next_image_info->args.arg0 = get_kernel_info_r0();
364 next_image_info->args.arg0,
403 next_image_info->args.arg0 = get_kernel_info_r0();
409 next_image_info->args.arg0,
/device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/include/drivers/
H A Dmce.h66 int mce_command_handler(uint64_t cmd, uint64_t arg0, uint64_t arg1,
/device/linaro/bootloader/arm-trusted-firmware/services/spd/opteed/
H A Dopteed_common.c55 optee_entry_point->args.arg0 = pageable_part;
H A Dopteed_main.c124 opteed_rw = optee_ep_info->args.arg0;
/device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/poplar/
H A Dbl2_plat_setup.c70 bl2_to_bl31_params->bl33_ep_info->args.arg0 = 0xffff & read_mpidr();
/device/linaro/bootloader/arm-trusted-firmware/plat/arm/common/
H A Darm_bl2_setup.c135 bl2_to_bl31_params->bl33_ep_info->args.arg0 = 0xffff & read_mpidr();
271 bl_mem_params->ep_info.args.arg0 = 0xffff & read_mpidr();
/device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey960/
H A Dhikey960_bl2_setup.c109 bl2_to_bl31_params->bl33_ep_info->args.arg0 = 0xffff & read_mpidr();
275 bl_mem_params->ep_info.args.arg0 = 0xffff & read_mpidr();
/device/linaro/bootloader/arm-trusted-firmware/plat/qemu/
H A Dqemu_bl2_setup.c100 bl2_to_bl31_params->bl33_ep_info->args.arg0 = 0xffff & read_mpidr();
266 bl_mem_params->ep_info.args.arg0 = 0xffff & read_mpidr();
/device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey/
H A Dhikey_bl2_setup.c198 bl_mem_params->ep_info.args.arg0 = 0xffff & read_mpidr();
262 bl2_to_bl31_params->bl33_ep_info->args.arg0 = 0xffff & read_mpidr();
H A Dhikey_bl1_setup.c588 ep_info->args.arg0 = 0xffff & read_mpidr();
/device/linaro/bootloader/arm-trusted-firmware/lib/psci/
H A Dpsci_common.c634 ep->args.arg0 = context_id;
671 ep->args.arg0 = context_id;
/device/linaro/bootloader/edk2/ArmPlatformPkg/Library/ArmShellCmdRunAxf/
H A DRunAxf.c35 typedef VOID (*ELF_ENTRYPOINT)(UINTN arg0, UINTN arg1,

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