/external/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyISelDAGToDAG.cpp | 59 bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, 98 const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) { 99 switch (ConstraintID) { 97 SelectInlineAsmMemoryOperand( const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) argument
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/external/llvm/lib/Target/Mips/ |
H A D | MipsISelDAGToDAG.cpp | 238 SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, argument 241 switch(ConstraintID) {
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H A D | MipsISelDAGToDAG.h | 130 unsigned ConstraintID,
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H A D | MipsSEISelDAGToDAG.h | 131 unsigned ConstraintID,
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H A D | MipsSEISelDAGToDAG.cpp | 970 SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, argument 974 switch(ConstraintID) {
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/external/llvm/lib/Target/XCore/ |
H A D | XCoreISelDAGToDAG.cpp | 67 bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, 111 SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, argument 114 switch (ConstraintID) {
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/external/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelDAGToDAG.h | 50 unsigned ConstraintID,
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H A D | NVPTXISelDAGToDAG.cpp | 5177 const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) { 5179 switch (ConstraintID) { 5176 SelectInlineAsmMemoryOperand( const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) argument
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/external/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelDAGToDAG.cpp | 106 bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, 283 SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, argument 286 switch (ConstraintID) {
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/external/llvm/lib/Target/Sparc/ |
H A D | SparcISelDAGToDAG.cpp | 53 unsigned ConstraintID, 389 unsigned ConstraintID, 392 switch (ConstraintID) { 388 SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) argument
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/external/llvm/include/llvm/CodeGen/ |
H A D | SelectionDAGISel.h | 88 unsigned ConstraintID, 87 SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) argument
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/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelDAGToDAG.cpp | 348 bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, 1343 unsigned ConstraintID, 1349 switch(ConstraintID) { 1342 SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) argument
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/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelDAGToDAG.cpp | 91 unsigned ConstraintID, 1253 SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, argument 1257 switch (ConstraintID) {
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/external/llvm/lib/Target/X86/ |
H A D | X86ISelDAGToDAG.cpp | 239 unsigned ConstraintID, 2696 SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, argument 2699 switch (ConstraintID) {
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 65 unsigned ConstraintID, 234 const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) { 235 switch(ConstraintID) { 233 SelectInlineAsmMemoryOperand( const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) argument
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/external/llvm/lib/Target/ARM/ |
H A D | ARMISelDAGToDAG.cpp | 253 bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, 4338 SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, argument 4340 switch(ConstraintID) {
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCISelDAGToDAG.cpp | 185 unsigned ConstraintID, 188 switch(ConstraintID) { 190 errs() << "ConstraintID: " << ConstraintID << "\n";
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/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAGBuilder.cpp | 6820 unsigned ConstraintID = 6822 assert(ConstraintID != InlineAsm::Constraint_Unknown && 6827 OpFlags = InlineAsm::getFlagWordForMem(OpFlags, ConstraintID); 6970 unsigned ConstraintID = 6972 assert(ConstraintID != InlineAsm::Constraint_Unknown && 6977 ResOpType = InlineAsm::getFlagWordForMem(ResOpType, ConstraintID);
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