/external/llvm/unittests/MI/ |
H A D | LiveIntervalTest.cpp | 91 LiveIntervals &LIS = getAnalysis<LiveIntervals>(); variable 92 T(MF, LIS); 111 static void testHandleMove(MachineFunction &MF, LiveIntervals &LIS, argument 128 LIS.handleMove(*FromInstr, true); 171 [](MachineFunction &MF, LiveIntervals &LIS) { 172 testHandleMove(MF, LIS, 2, 1); 182 [](MachineFunction &MF, LiveIntervals &LIS) { 183 testHandleMove(MF, LIS, 2, 1); 193 [](MachineFunction &MF, LiveIntervals &LIS) { 194 testHandleMove(MF, LIS, [all...] |
/external/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyOptimizeLiveIntervals.cpp | 71 LiveIntervals &LIS = getAnalysis<LiveIntervals>(); local 86 LIS.splitSeparateComponents(LIS.getInterval(Reg), SplitLIs); 97 LiveInterval &LI = LIS.getInterval(MI->getOperand(0).getReg()); 98 LIS.removeVRegDefAt(LI, LIS.getInstructionIndex(*MI).getRegSlot()); 99 LIS.RemoveMachineInstrFromMaps(*MI);
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H A D | WebAssemblyStoreResults.cpp | 82 LiveIntervals &LIS) { 85 LiveInterval *FromLI = &LIS.getInterval(FromReg); 86 LiveInterval *ToLI = &LIS.getInterval(ToReg); 88 SlotIndex FromIdx = LIS.getInstructionIndex(MI).getRegSlot(); 102 SlotIndex WhereIdx = LIS.getInstructionIndex(*Where); 127 LIS.extendToIndices(*ToLI, Indices); 130 LIS.shrinkToUses(FromLI); 145 LiveIntervals &LIS) { 148 return ReplaceDominatedUses(MBB, MI, FromReg, ToReg, MRI, MDT, LIS); 154 LiveIntervals &LIS, 78 ReplaceDominatedUses(MachineBasicBlock &MBB, MachineInstr &MI, unsigned FromReg, unsigned ToReg, const MachineRegisterInfo &MRI, MachineDominatorTree &MDT, LiveIntervals &LIS) argument 142 optimizeStore(MachineBasicBlock &MBB, MachineInstr &MI, const MachineRegisterInfo &MRI, MachineDominatorTree &MDT, LiveIntervals &LIS) argument 151 optimizeCall(MachineBasicBlock &MBB, MachineInstr &MI, const MachineRegisterInfo &MRI, MachineDominatorTree &MDT, LiveIntervals &LIS, const WebAssemblyTargetLowering &TLI, const TargetLibraryInfo &LibInfo) argument 191 LiveIntervals &LIS = getAnalysis<LiveIntervals>(); local [all...] |
H A D | WebAssemblyRegStackify.cpp | 229 const LiveIntervals &LIS) 235 // MRI doesn't know what the Def is. Try asking LIS. 236 if (const VNInfo *ValNo = LIS.getInterval(Reg).getVNInfoBefore( 237 LIS.getInstructionIndex(*Insert))) 238 return LIS.getInstructionFromIndex(ValNo->def); 248 LiveIntervals &LIS) { 254 const LiveInterval &LI = LIS.getInterval(Reg); 256 LIS.getInstructionIndex(*Def).getRegSlot()); 259 const auto &Result = LI.Query(LIS.getInstructionIndex(*I.getParent())); 277 AliasAnalysis &AA, const LiveIntervals &LIS, 227 GetVRegDef(unsigned Reg, const MachineInstr *Insert, const MachineRegisterInfo &MRI, const LiveIntervals &LIS) argument 246 HasOneUse(unsigned Reg, MachineInstr *Def, MachineRegisterInfo &MRI, MachineDominatorTree &MDT, LiveIntervals &LIS) argument 276 IsSafeToMove(const MachineInstr *Def, const MachineInstr *Insert, AliasAnalysis &AA, const LiveIntervals &LIS, const MachineRegisterInfo &MRI) argument 352 OneUseDominatesOtherUses(unsigned Reg, const MachineOperand &OneUse, const MachineBasicBlock &MBB, const MachineRegisterInfo &MRI, const MachineDominatorTree &MDT, LiveIntervals &LIS, WebAssemblyFunctionInfo &MFI) argument 425 ShrinkToUses(LiveInterval &LI, LiveIntervals &LIS) argument 434 MoveForSingleUse(unsigned Reg, MachineOperand& Op, MachineInstr *Def, MachineBasicBlock &MBB, MachineInstr *Insert, LiveIntervals &LIS, WebAssemblyFunctionInfo &MFI, MachineRegisterInfo &MRI) argument 476 RematerializeCheapDef( unsigned Reg, MachineOperand &Op, MachineInstr &Def, MachineBasicBlock &MBB, MachineBasicBlock::instr_iterator Insert, LiveIntervals &LIS, WebAssemblyFunctionInfo &MFI, MachineRegisterInfo &MRI, const WebAssemblyInstrInfo *TII, const WebAssemblyRegisterInfo *TRI) argument 536 MoveAndTeeForMultiUse( unsigned Reg, MachineOperand &Op, MachineInstr *Def, MachineBasicBlock &MBB, MachineInstr *Insert, LiveIntervals &LIS, WebAssemblyFunctionInfo &MFI, MachineRegisterInfo &MRI, const WebAssemblyInstrInfo *TII) argument 715 LiveIntervals &LIS = getAnalysis<LiveIntervals>(); local [all...] |
/external/llvm/lib/CodeGen/ |
H A D | LiveRangeEdit.cpp | 39 LiveInterval &LI = LIS.createEmptyInterval(VReg); 67 LiveInterval &OrigLI = LIS.getInterval(Original); 69 MachineInstr *DefMI = LIS.getInstructionFromIndex(OrigVNI->def); 102 LiveInterval &li = LIS.getInterval(MO.getReg()); 130 DefIdx = LIS.getInstructionIndex(*RM.OrigMI); 156 return LIS.getSlotIndexes()->insertMachineInstrInMaps(*MI, Late).getRegSlot(); 161 LIS.removeInterval(Reg); 191 if (!allUsesAvailableAt(DefMI, LIS.getInstructionIndex(*DefMI), 192 LIS.getInstructionIndex(*UseMI))) 208 MachineInstr *FoldMI = TII.foldMemoryOperand(*UseMI, Ops, *DefMI, &LIS); [all...] |
H A D | RegAllocBase.cpp | 60 LIS = &lis; 75 enqueue(&LIS->getInterval(Reg)); 92 LIS->removeInterval(VirtReg->reg); 137 LiveInterval *SplitVirtReg = &LIS->getInterval(*I); 142 LIS->removeInterval(SplitVirtReg->reg); 157 LIS->RemoveMachineInstrFromMaps(*DeadInst);
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H A D | PHIElimination.cpp | 57 LiveIntervals *LIS; member in class:__anon13947::PHIElimination 135 LIS = getAnalysisIfAvailable<LiveIntervals>(); 144 if (!DisableEdgeSplitting && (LV || LIS)) { 161 if (LIS) 162 LIS->RemoveMachineInstrFromMaps(*DefMI); 169 if (LIS) 170 LIS->RemoveMachineInstrFromMaps(*I.first); 310 if (LIS) { 312 LIS->InsertMachineInstrInMaps(*std::prev(AfterPHIsIt)); 314 SlotIndex MBBStartIndex = LIS [all...] |
H A D | CalcSpillWeights.cpp | 26 void llvm::calculateSpillWeightsAndHints(LiveIntervals &LIS, argument 36 VirtRegAuxInfo VRAI(MF, LIS, VRM, MLI, MBFI, norm); 41 VRAI.calculateSpillWeightAndHint(LIS.getInterval(Reg)); 78 const LiveIntervals &LIS, 91 MachineInstr *MI = LIS.getInstructionFromIndex(VNI->def); 113 const LiveInterval &SrcLI = LIS.getInterval(Reg); 119 MI = LIS.getInstructionFromIndex(VNI->def); 124 if (!TII.isTriviallyReMaterializable(*MI, LIS.getAliasAnalysis())) 176 if (writes && isExiting && LIS.isLiveOutOfMBB(li, mbb)) 222 if (li.isZeroLength(LIS 77 isRematerializable(const LiveInterval &LI, const LiveIntervals &LIS, VirtRegMap *VRM, const TargetInstrInfo &TII) argument [all...] |
H A D | LiveDebugVariables.cpp | 134 LiveIntervals &LIS, const TargetInstrInfo &TII); 139 LiveIntervals &LIS); 233 /// @param LIS Live intervals analysis. 238 LiveIntervals &LIS, MachineDominatorTree &MDT, 252 LiveIntervals &LIS); 257 LiveIntervals &LIS, MachineDominatorTree &MDT, 263 LiveIntervals &LIS); 271 LiveIntervals &LIS, const TargetInstrInfo &TRI); 285 LiveIntervals *LIS; member in class:__anon13913::LDVImpl 525 ? LIS 542 extendDef(SlotIndex Idx, unsigned LocNo, LiveRange *LR, const VNInfo *VNI, SmallVectorImpl<SlotIndex> *Kills, LiveIntervals &LIS, MachineDominatorTree &MDT, UserValueScopes &UVS) argument 590 addDefsFromCopies(LiveInterval *LI, unsigned LocNo, const SmallVectorImpl<SlotIndex> &Kills, SmallVectorImpl<std::pair<SlotIndex, unsigned> > &NewDefs, MachineRegisterInfo &MRI, LiveIntervals &LIS) argument 661 computeIntervals(MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI, LiveIntervals &LIS, MachineDominatorTree &MDT, UserValueScopes &UVS) argument 779 splitLocation(unsigned OldLocNo, ArrayRef<unsigned> NewRegs, LiveIntervals& LIS) argument 878 splitRegister(unsigned OldReg, ArrayRef<unsigned> NewRegs, LiveIntervals &LIS) argument 908 splitRegister(unsigned OldReg, ArrayRef<unsigned> NewRegs, LiveIntervals &LIS) argument 944 findInsertLocation(MachineBasicBlock *MBB, SlotIndex Idx, LiveIntervals &LIS) argument 965 insertDebugValue(MachineBasicBlock *MBB, SlotIndex Idx, unsigned LocNo, LiveIntervals &LIS, const TargetInstrInfo &TII) argument 987 emitDebugValues(VirtRegMap *VRM, LiveIntervals &LIS, const TargetInstrInfo &TII) argument [all...] |
H A D | SplitKit.cpp | 46 : LIS(lis), LastInsertPoint(BBNum) {} 53 SlotIndex MBBEnd = LIS.getMBBEndIdx(&MBB); 67 LIP.first = LIS.getInstructionIndex(*FirstTerm); 78 LIP.second = LIS.getInstructionIndex(*I); 90 return LIS.isLiveInToMBB(CurLI, EHPad); 115 if (LIP == LIS.getMBBEndIdx(&MBB)) 117 return LIS.getInstructionFromIndex(LIP); 126 : MF(vrm.getMachineFunction()), VRM(vrm), LIS(lis), Loops(mli), 152 UseSlots.push_back(LIS.getInstructionIndex(*MO.getParent()).getRegSlot()); 169 const_cast<LiveIntervals&>(LIS) [all...] |
H A D | RegisterCoalescer.cpp | 88 LiveIntervals *LIS; member in class:__anon13966::RegisterCoalescer 239 if (LIS->shrinkToUses(LI, Dead)) { 243 LIS->splitSeparateComponents(*LI, SplitLIs); 462 LiveRangeEdit(nullptr, NewRegs, *MF, *LIS, 477 LIS->getInterval(CP.isFlipped() ? CP.getDstReg() : CP.getSrcReg()); 479 LIS->getInterval(CP.isFlipped() ? CP.getSrcReg() : CP.getDstReg()); 480 SlotIndex CopyIdx = LIS->getInstructionIndex(*CopyMI).getRegSlot(); 516 MachineInstr *ACopyMI = LIS->getInstructionFromIndex(AValNo->def); 530 LIS->getInstructionFromIndex(ValS->end.getPrevSlot()); 591 if (LIS 1723 LiveIntervals *LIS; member in class:__anon13967::JoinVals 2782 isLocalCopy(MachineInstr *Copy, const LiveIntervals *LIS) argument [all...] |
H A D | RenameIndependentSubregs.cpp | 72 SubRangeInfo(LiveIntervals &LIS, LiveInterval::SubRange &SR, argument 74 : ConEQ(LIS), SR(&SR), Index(Index) {} 104 LiveIntervals *LIS; member in class:__anon13969::RenameIndependentSubregs 143 LiveInterval &NewLI = LIS->createEmptyInterval(NewVReg); 162 SubRangeInfos.push_back(SubRangeInfo(*LIS, SR, NumComponents)); 189 SlotIndex Pos = LIS->getInstructionIndex(*MO.getParent()); 224 SlotIndex Pos = LIS->getInstructionIndex(MI); 259 BumpPtrAllocator &Allocator = LIS->getVNInfoAllocator(); 291 BumpPtrAllocator &Allocator = LIS->getVNInfoAllocator(); 292 const SlotIndexes &Indexes = *LIS [all...] |
H A D | LiveDebugVariables.h | 54 LiveIntervals &LIS);
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H A D | TwoAddressInstructionPass.cpp | 79 LiveIntervals *LIS; member in class:__anon14006::TwoAddressInstructionPass 182 static bool isPlainlyKilled(MachineInstr *MI, unsigned Reg, LiveIntervals *LIS); 223 if (LIS) { 224 LiveInterval &LI = LIS->getInterval(SavedReg); 228 SlotIndex MBBEndIdx = LIS->getMBBEndIdx(MBB).getPrevSlot(); 234 KillMI = LIS->getInstructionFromIndex(I->end); 280 if (MO.isKill() || (LIS && isPlainlyKilled(&OtherMI, MOReg, LIS))) { 293 if (!LIS) { 307 if (LIS) 400 isPlainlyKilled(MachineInstr *MI, unsigned Reg, LiveIntervals *LIS) argument 442 isKilled(MachineInstr &MI, unsigned Reg, const MachineRegisterInfo *MRI, const TargetInstrInfo *TII, LiveIntervals *LIS, bool allowFalsePositives) argument [all...] |
H A D | InlineSpiller.cpp | 61 LiveIntervals &LIS; member in class:__anon13904::HoistSpillHelper 112 : MF(mf), LIS(pass.getAnalysis<LiveIntervals>()), 121 IPA(LIS, mf.getNumBlockIDs()) {} 132 LiveIntervals &LIS; member in class:__anon13904::InlineSpiller 170 : MF(mf), LIS(pass.getAnalysis<LiveIntervals>()), 262 if (SnipLI.getNumValNums() > 2 || !LIS.intervalIsInOneMBB(SnipLI)) 314 LiveInterval &SnipLI = LIS.getInterval(SnipReg); 352 SlotIndex Idx = LIS.getInstructionIndex(CopyMI); 359 LiveInterval &SrcLI = LIS.getInterval(SrcReg); 362 MachineBasicBlock *DefMBB = LIS 688 dumpMachineInstrRangeWithSlotIndex(MachineBasicBlock::iterator B, MachineBasicBlock::iterator E, LiveIntervals const &LIS, const char *const header, unsigned VReg =0) argument 859 DEBUG(dumpMachineInstrRangeWithSlotIndex(std::next(MI), MIS.end(), LIS, local [all...] |
H A D | RegAllocPBQP.cpp | 133 void findVRegIntervalsToAlloc(const MachineFunction &MF, LiveIntervals &LIS); 140 MachineFunction &MF, LiveIntervals &LIS, VirtRegMap &VRM, 152 void finalizeAlloc(MachineFunction &MF, LiveIntervals &LIS, 155 void postOptimization(Spiller &VRegSpiller, LiveIntervals &LIS); 164 LiveIntervals &LIS = G.getMetadata().LIS; variable 172 LIS.getInterval(G.getNodeMetadata(NId).getVReg()).weight; 283 LiveIntervals &LIS = G.getMetadata().LIS; variable 306 LiveInterval &LI = LIS 530 findVRegIntervalsToAlloc(const MachineFunction &MF, LiveIntervals &LIS) argument 565 LiveIntervals &LIS = G.getMetadata().LIS; local 635 spillVReg(unsigned VReg, SmallVectorImpl<unsigned> &NewIntervals, MachineFunction &MF, LiveIntervals &LIS, VirtRegMap &VRM, Spiller &VRegSpiller) argument 668 LiveIntervals &LIS = G.getMetadata().LIS; local 702 finalizeAlloc(MachineFunction &MF, LiveIntervals &LIS, VirtRegMap &VRM) const argument 724 postOptimization(Spiller &VRegSpiller, LiveIntervals &LIS) argument 742 LiveIntervals &LIS = getAnalysis<LiveIntervals>(); local [all...] |
/external/swiftshader/third_party/LLVM/lib/CodeGen/ |
H A D | LiveRangeEdit.cpp | 33 LiveIntervals &LIS, 39 LiveInterval &LI = LIS.getOrCreateInterval(VReg); 157 void LiveRangeEdit::eraseVirtReg(unsigned Reg, LiveIntervals &LIS) { argument 159 LIS.removeInterval(Reg); 165 LiveIntervals &LIS, 203 LIS.ReplaceMachineInstrInMaps(UseMI, FoldMI); 212 LiveIntervals &LIS, VirtRegMap &VRM, 224 SlotIndex Idx = LIS.getInstructionIndex(MI).getDefIndex(); 249 LiveInterval &LI = LIS.getInterval(Reg); 268 eraseVirtReg(Reg, LIS); 32 createFrom(unsigned OldReg, LiveIntervals &LIS, VirtRegMap &VRM) argument 162 foldAsLoad(LiveInterval *LI, SmallVectorImpl<MachineInstr*> &Dead, MachineRegisterInfo &MRI, LiveIntervals &LIS, const TargetInstrInfo &TII) argument 211 eliminateDeadDefs(SmallVectorImpl<MachineInstr*> &Dead, LiveIntervals &LIS, VirtRegMap &VRM, const TargetInstrInfo &TII) argument 318 calculateRegClassAndHint(MachineFunction &MF, LiveIntervals &LIS, const MachineLoopInfo &Loops) argument [all...] |
H A D | RegisterCoalescer.cpp | 87 LiveIntervals *LIS; member in class:__anon22654::RegisterCoalescer 419 if (!LIS->hasInterval(CP.getDstReg())) 423 LIS->getInterval(CP.isFlipped() ? CP.getDstReg() : CP.getSrcReg()); 425 LIS->getInterval(CP.isFlipped() ? CP.getSrcReg() : CP.getDstReg()); 426 SlotIndex CopyIdx = LIS->getInstructionIndex(CopyMI).getDefIndex(); 482 LIS->getInstructionFromIndex(ValLR->end.getPrevSlot()); 496 if (LIS->hasInterval(*AS) && IntA.overlaps(LIS->getInterval(*AS))) { 499 LIS->getInterval(*AS).print(dbgs(), TRI); 526 if (!LIS 995 removeIntervalIfEmpty(LiveInterval &li, LiveIntervals *LIS, const TargetRegisterInfo *TRI) argument [all...] |
H A D | InlineSpiller.cpp | 56 LiveIntervals &LIS; member in class:__anon22622::InlineSpiller 141 LIS(pass.getAnalysis<LiveIntervals>()), 234 if (SnipLI.getNumValNums() > 2 || !LIS.intervalIsInOneMBB(SnipLI)) 284 LiveInterval &SnipLI = LIS.getInterval(SnipReg); 370 SV.SpillMBB = LIS.getMBBFromIndex(SV.SpillVNI->def); 388 DepSV.SpillMBB = LIS.getMBBFromIndex(DepSV.SpillVNI->def); 528 LiveInterval &LI = LIS.getInterval(Reg); 529 LiveInterval &OrigLI = LIS.getInterval(Original); 574 MachineInstr *MI = LIS.getInstructionFromIndex(VNI->def); 580 LiveInterval &SrcLI = LIS [all...] |
H A D | LiveDebugVariables.cpp | 129 LiveIntervals &LIS, const TargetInstrInfo &TII); 223 /// @param LIS Live intervals analysis. 228 LiveIntervals &LIS, MachineDominatorTree &MDT, 242 LiveIntervals &LIS); 247 LiveIntervals &LIS, MachineDominatorTree &MDT, 264 LiveIntervals &LIS, const TargetInstrInfo &TRI); 284 LiveIntervals *LIS; member in class:__anon22626::LDVImpl 470 LIS->getMBBStartIdx(MBB) : 471 LIS->getInstructionIndex(llvm::prior(MBBI)).getDefIndex(); 488 LiveIntervals &LIS, MachineDominatorTre 485 extendDef(SlotIndex Idx, unsigned LocNo, LiveInterval *LI, const VNInfo *VNI, SmallVectorImpl<SlotIndex> *Kills, LiveIntervals &LIS, MachineDominatorTree &MDT, UserValueScopes &UVS) argument 547 addDefsFromCopies(LiveInterval *LI, unsigned LocNo, const SmallVectorImpl<SlotIndex> &Kills, SmallVectorImpl<std::pair<SlotIndex, unsigned> > &NewDefs, MachineRegisterInfo &MRI, LiveIntervals &LIS) argument 620 computeIntervals(MachineRegisterInfo &MRI, LiveIntervals &LIS, MachineDominatorTree &MDT, UserValueScopes &UVS) argument 907 findInsertLocation(MachineBasicBlock *MBB, SlotIndex Idx, LiveIntervals &LIS) argument 933 insertDebugValue(MachineBasicBlock *MBB, SlotIndex Idx, unsigned LocNo, LiveIntervals &LIS, const TargetInstrInfo &TII) argument 956 emitDebugValues(VirtRegMap *VRM, LiveIntervals &LIS, const TargetInstrInfo &TII) argument [all...] |
H A D | SplitKit.cpp | 47 LIS(lis), 71 LSP.first = LIS.getMBBEndIdx(MBB); 73 LSP.first = LIS.getInstructionIndex(FirstTerm); 84 LSP.second = LIS.getInstructionIndex(I); 92 if (LPad && LSP.second.isValid() && LIS.isLiveInToMBB(*CurLI, LPad)) 115 UseSlots.push_back(LIS.getInstructionIndex(&*I).getDefIndex()); 132 const_cast<LiveIntervals&>(LIS) 163 MachineFunction::iterator MFI = LIS.getMBBFromIndex(LVI->start); 168 tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(BI.MBB); 246 MFI = LIS [all...] |
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
H A D | CalcSpillWeights.h | 44 LiveIntervals &LIS; member in class:llvm::VirtRegAuxInfo 50 MF(mf), LIS(lis), Loops(loops) {}
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/external/llvm/include/llvm/CodeGen/ |
H A D | CalcSpillWeights.h | 54 LiveIntervals &LIS; member in class:llvm::VirtRegAuxInfo 66 : MF(mf), LIS(lis), VRM(vrm), Loops(loops), MBFI(mbfi), normalize(norm) {} 74 void calculateSpillWeightsAndHints(LiveIntervals &LIS, MachineFunction &MF,
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCVSXFMAMutate.cpp | 66 LiveIntervals *LIS; member in struct:__anon14492::PPCVSXFMAMutate 108 SlotIndex FMAIdx = LIS->getInstructionIndex(*MI); 111 LIS->getInterval(MI->getOperand(1).getReg()).Query(FMAIdx).valueIn(); 117 MachineInstr *AddendMI = LIS->getInstructionFromIndex(AddendValNo->def); 191 if (LIS->getInterval(Reg2).Query(FMAIdx).isKill() 195 } else if (LIS->getInterval(Reg3).Query(FMAIdx).isKill() 212 !LIS->getInterval(AddendSrcReg).liveAt(FMAIdx)) 280 LiveInterval &FMAInt = LIS->getInterval(OldFMAReg); 298 LiveInterval &NewFMAInt = LIS->getInterval(KilledProdReg); 307 LIS [all...] |
/external/llvm/lib/Target/AMDGPU/ |
H A D | SILoadStoreOptimizer.cpp | 63 LiveIntervals *LIS; member in class:__anon14239::SILoadStoreOptimizer 87 LIS(nullptr) {} 256 LIS->InsertMachineInstrInMaps(*Read2); 260 SlotIndex PairedIndex = LIS->getInstructionIndex(*Paired); 261 LiveRange &M0Range = LIS->getRegUnit(*MCRegUnitIterator(AMDGPU::M0, TRI)); 267 LIS->ReplaceMachineInstrInMaps(*I, *Copy0); 268 LIS->ReplaceMachineInstrInMaps(*Paired, *Copy1); 273 LiveInterval &AddrRegLI = LIS->getInterval(AddrReg->getReg()); 274 LIS->shrinkToUses(&AddrRegLI); 276 LIS [all...] |