Searched refs:LSB (Results 1 - 25 of 25) sorted by relevance

/external/syslinux/gpxe/src/drivers/infiniband/
H A Dqib_genbits.pl35 $structures->{$structure}->{$1}->{LSB} = $2;
55 my $fields = [ map { { name => $_, lsb => $structure->{$_}->{LSB},
58 sort { hex ( $structure->{$a}->{LSB} ) <=>
59 hex ( $structure->{$b}->{LSB} ) }
76 die "Inconsistent LSB/RMASK in $datum->{name} before $field->{name}\n"
98 die "Inconsistent LSB/MSB/RMASK in $datum->{name}.$field->{name}\n"
105 die "Inconsistent LSB/RMASK in $datum->{name} final field\n"
/external/ltp/testcases/commands/file/
H A Dfile01.sh37 *Data:*"little endian"*) TEST_ARCH=LSB;;
/external/valgrind/none/tests/ppc32/
H A Dround.c598 int LSB; local
606 ** and the LSB bit at the bottom of the manitssa.
618 /* mask off LSB from resulting guard bits */
637 /* mask off LSB from resulting guard bits */
654 /* g >> 3 == LSB, g & 7 == guard bits */
700 /* get LSB for tie breaking */
701 LSB = Z.layout.frac & 1;
717 if (debug) printf("tie: LSB = %d\n", LSB);
718 expected = (LSB
929 int LSB; local
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/external/valgrind/none/tests/ppc64/
H A Dround.c598 int LSB; local
606 ** and the LSB bit at the bottom of the manitssa.
618 /* mask off LSB from resulting guard bits */
637 /* mask off LSB from resulting guard bits */
654 /* g >> 3 == LSB, g & 7 == guard bits */
700 /* get LSB for tie breaking */
701 LSB = Z.layout.frac & 1;
717 if (debug) printf("tie: LSB = %d\n", LSB);
718 expected = (LSB
929 int LSB; local
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/external/llvm/lib/Target/SystemZ/
H A DSystemZInstrInfo.cpp1351 // have already been filtered out. Store the first set bit in LSB and
1353 static bool isStringOfOnes(uint64_t Mask, unsigned &LSB, unsigned &Length) { argument
1357 LSB = First;
1373 unsigned LSB, Length; local
1374 if (isStringOfOnes(Mask, LSB, Length)) {
1375 Start = 63 - (LSB + Length - 1);
1376 End = 63 - LSB;
1382 if (isStringOfOnes(Mask ^ allOnes(BitSize), LSB, Length)) {
1383 assert(LSB > 0 && "Bottom bit must be set");
1384 assert(LSB
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/external/llvm/lib/Target/AArch64/InstPrinter/
H A DAArch64InstPrinter.cpp170 int LSB = (BitWidth - ImmR) % BitWidth; local
174 << ", #" << LSB << ", #" << Width;
180 int LSB = (BitWidth - ImmR) % BitWidth; local
184 << getRegisterName(Op2.getReg()) << ", #" << LSB << ", #" << Width;
189 int LSB = ImmR; local
194 << ", #" << LSB << ", #" << Width;
/external/llvm/lib/Target/ARM/
H A DARMISelDAGToDAG.cpp2354 unsigned LSB = Srl_imm; local
2358 if ((LSB + Width + 1) == N->getValueType(0).getSizeInBits()) {
2363 CurDAG->getTargetConstant(LSB, dl, MVT::i32),
2372 CurDAG->getTargetConstant(ARM_AM::getSORegOpc(ShOpcVal, LSB), dl,
2381 CurDAG->getTargetConstant(LSB, dl, MVT::i32),
2400 int LSB = Srl_imm - Shl_imm; local
2401 if (LSB < 0)
2405 CurDAG->getTargetConstant(LSB, dl, MVT::i32),
2417 unsigned LSB = countTrailingZeros(And_imm); local
2419 if (isInt32Immediate(N->getOperand(1), Srl_imm) && Srl_imm == LSB) {
2436 unsigned LSB = 0; local
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H A DARMISelLowering.cpp4610 // Compute the least significant set bit: LSB = X & -X
4613 SDValue LSB = DAG.getNode(ISD::AND, dl, VT, X, NX); local
4621 SDValue Bits = DAG.getNode(ISD::SUB, dl, VT, LSB, One);
4632 SDValue CTLZ = DAG.getNode(ISD::CTLZ, dl, VT, LSB);
4642 // Compute LSB - 1.
4648 Bits = DAG.getNode(ISD::ADD, dl, VT, LSB, FF);
4652 Bits = DAG.getNode(ISD::SUB, dl, VT, LSB, One);
9446 unsigned LSB = countTrailingZeros(Mask); local
9447 if (ShAmtC != LSB)
9564 unsigned LSB local
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/external/capstone/arch/AArch64/
H A DAArch64InstPrinter.c70 int LSB; local
254 LSB = (BitWidth - ImmR) % BitWidth;
260 printInt32Bang(O, LSB);
273 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = LSB;
283 LSB = ImmR;
289 printInt32Bang(O, LSB);
302 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = LSB;
/external/llvm/lib/Target/AArch64/
H A DAArch64ISelDAGToDAG.cpp1420 unsigned &LSB, unsigned &MSB,
1494 LSB = SrlImm;
1543 SDValue &Opd0, unsigned &LSB,
1546 // continuous bits from the source value and places it from the LSB of the
1580 LSB = SrlImm;
2094 int LSB = countTrailingOnes(NotKnownZero); local
2098 unsigned ImmR = (BitWidth - LSB) % BitWidth;
2105 bool IsBFI = LSB != 0;
2106 uint64_t BFIImm = OrImm >> LSB;
2159 // f = BFM Opd0, Opd1, LSB, MS
1418 isBitfieldExtractOpFromAnd(SelectionDAG *CurDAG, SDNode *N, unsigned &Opc, SDValue &Opd0, unsigned &LSB, unsigned &MSB, unsigned NumberOfIgnoredLowBits, bool BiggerPattern) argument
1542 isSeveralBitsExtractOpFromShr(SDNode *N, unsigned &Opc, SDValue &Opd0, unsigned &LSB, unsigned &MSB) argument
2270 unsigned LSB = countTrailingZeros(Mask1Imm); local
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp366 unsigned LSB; member in struct:__anon22814::ARMOperand::__anon22815::__anon22834
1016 unsigned lsb = Bitfield.LSB;
1551 static ARMOperand *CreateBitfield(unsigned LSB, unsigned Width, argument
1554 Op->Bitfield.LSB = LSB;
1755 OS << "<bitfield " << "lsb: " << Bitfield.LSB
2619 // The bitfield descriptor is really two operands, the LSB and the width.
2638 int64_t LSB = CE->getValue(); local
2639 // The LSB must be in the range [0,31]
2640 if (LSB <
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/external/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp557 unsigned LSB; member in struct:__anon14271::ARMOperand::BitfieldOp
1877 unsigned lsb = Bitfield.LSB;
2713 CreateBitfield(unsigned LSB, unsigned Width, SMLoc S, SMLoc E) { argument
2715 Op->Bitfield.LSB = LSB;
2973 OS << "<bitfield " << "lsb: " << Bitfield.LSB
4568 // The bitfield descriptor is really two operands, the LSB and the width.
4588 int64_t LSB = CE->getValue(); local
4589 // The LSB must be in the range [0,31]
4590 if (LSB <
6339 unsigned LSB = Inst.getOperand(2).getImm(); local
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/
H A DARMISelDAGToDAG.cpp2068 unsigned LSB = Srl_imm; local
2071 CurDAG->getTargetConstant(LSB, MVT::i32),
2089 int LSB = Srl_imm - Shl_imm; local
2090 if (LSB < 0)
2094 CurDAG->getTargetConstant(LSB, MVT::i32),
H A DARMISelLowering.cpp6870 unsigned LSB = CountTrailingZeros_32(Mask); local
6871 if (ShAmtC != LSB)
6894 unsigned LSB = CountTrailingZeros_32(~InvMask); local
6895 unsigned Width = (32 - CountLeadingZeros_32(~InvMask)) - LSB;
/external/mesa3d/src/gallium/drivers/swr/rasterizer/common/
H A Dsimdintrin.h1175 // 2. populate LSB from src
1176 const UINT LSB = (UINT)((int)(a << 31) >> 31);
1179 result |= LSB & lowest;
/external/llvm/lib/Target/AArch64/AsmParser/
H A DAArch64AsmParser.cpp3790 uint64_t LSB = LSBCE->getValue(); local
3800 if (LSB >= RegWidth)
3809 ImmR = (32 - LSB) & 0x1f;
3811 ImmR = (64 - LSB) & 0x3f;
/external/mesa3d/src/gallium/drivers/nouveau/codegen/
H A Dnv50_ir_from_tgsi.cpp869 NV50_IR_OPCODE_CASE(LSB, BFIND);
/external/libpng/
H A Dconfigure6881 *LSB*)
/external/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp14092 // Shift LSB to MSB and use VPMOVB/W2M or TESTD/Q.
19176 SDValue LSB = DAG.getNode(ISD::AND, dl, VT, N0, local
19183 DAG.getNode(ISD::CTLZ, dl, VT, LSB));
19189 DAG.getNode(ISD::SUB, dl, VT, LSB, One));
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/external/libevent/
H A Dconfigure7455 *LSB*)
/external/pcre/dist2/
H A Dconfigure8217 *LSB*)
/external/python/cpython2/Modules/_ctypes/libffi/
H A Dconfigure7515 *LSB*)
/external/python/cpython3/Modules/_ctypes/libffi/
H A Dconfigure7515 *LSB*)
/external/ImageMagick/
H A Dconfigure14783 *LSB*)
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/external/curl/
H A Dconfigure9880 *LSB*)
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