Searched refs:OpName (Results 1 - 25 of 47) sorted by relevance

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/external/llvm/lib/Target/AMDGPU/
H A DR600InstrInfo.cpp71 NewMI->getOperand(getOperandIdx(*NewMI, AMDGPU::OpName::src0))
148 return isLDSInstr(Opcode) && getOperandIdx(Opcode, AMDGPU::OpName::dst) == -1;
152 return isLDSInstr(Opcode) && getOperandIdx(Opcode, AMDGPU::OpName::dst) != -1;
253 AMDGPU::OpName::src0,
254 AMDGPU::OpName::src1,
255 AMDGPU::OpName::src2
264 {AMDGPU::OpName::src0, AMDGPU::OpName::src0_sel},
265 {AMDGPU::OpName::src1, AMDGPU::OpName
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H A DR600ExpandSpecialInstrs.cpp83 int DstIdx = TII->getOperandIdx(MI.getOpcode(), AMDGPU::OpName::dst);
90 AMDGPU::OpName::pred_sel);
92 AMDGPU::OpName::pred_sel);
112 TII->setImmOperand(*PredSet, AMDGPU::OpName::update_exec_mask, 1);
114 TII->setImmOperand(*PredSet, AMDGPU::OpName::update_pred, 1);
223 TII->getOperandIdx(Opcode, AMDGPU::OpName::src0))
226 TII->getOperandIdx(Opcode, AMDGPU::OpName::src1))
273 TII->getOperandIdx(MI, AMDGPU::OpName::dst)).getReg();
275 TII->getOperandIdx(MI, AMDGPU::OpName::src0)).getReg();
280 int Src1Idx = TII->getOperandIdx(MI, AMDGPU::OpName
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H A DSIShrinkInstructions.cpp84 const MachineOperand *Src2 = TII->getNamedOperand(MI, AMDGPU::OpName::src2);
97 TII->hasModifiersSet(MI, AMDGPU::OpName::src2_modifiers))
106 const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
108 TII->getNamedOperand(MI, AMDGPU::OpName::src1_modifiers);
115 if (TII->hasModifiersSet(MI, AMDGPU::OpName::src0_modifiers))
119 if (TII->hasModifiersSet(MI, AMDGPU::OpName::omod))
122 return !TII->hasModifiersSet(MI, AMDGPU::OpName::clamp);
138 int Src0Idx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::src0);
349 TII->getNamedOperand(MI, AMDGPU::OpName::src2);
369 int Op32DstIdx = AMDGPU::getNamedOperandIdx(Op32, AMDGPU::OpName
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H A DR600ClauseMergePass.cpp77 .getOperand(TII->getOperandIdx(MI.getOpcode(), AMDGPU::OpName::COUNT))
84 .getOperand(TII->getOperandIdx(MI.getOpcode(), AMDGPU::OpName::Enabled))
90 int CntIdx = TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::COUNT);
109 int CntIdx = TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::COUNT);
121 TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::KCACHE_MODE0);
123 TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::KCACHE_BANK0);
125 TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::KCACHE_ADDR0);
137 TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::KCACHE_MODE1);
139 TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::KCACHE_BANK1);
141 TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName
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H A DSILoadStoreOptimizer.cpp171 int AddrIdx = AMDGPU::getNamedOperandIdx(I->getOpcode(), AMDGPU::OpName::addr);
180 AMDGPU::OpName::offset);
200 const MachineOperand *AddrReg = TII->getNamedOperand(*I, AMDGPU::OpName::addr);
202 const MachineOperand *Dest0 = TII->getNamedOperand(*I, AMDGPU::OpName::vdst);
203 const MachineOperand *Dest1 = TII->getNamedOperand(*Paired, AMDGPU::OpName::vdst);
206 = TII->getNamedOperand(*I, AMDGPU::OpName::offset)->getImm() & 0xffff;
208 = TII->getNamedOperand(*Paired, AMDGPU::OpName::offset)->getImm() & 0xffff;
295 const MachineOperand *Addr = TII->getNamedOperand(*I, AMDGPU::OpName::addr);
296 const MachineOperand *Data0 = TII->getNamedOperand(*I, AMDGPU::OpName::data0);
298 = TII->getNamedOperand(*Paired, AMDGPU::OpName
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H A DR600Packetizer.cpp89 int OperandIdx = TII->getOperandIdx(BI->getOpcode(), AMDGPU::OpName::write);
92 int DstIdx = TII->getOperandIdx(BI->getOpcode(), AMDGPU::OpName::dst);
134 AMDGPU::OpName::src0,
135 AMDGPU::OpName::src1,
136 AMDGPU::OpName::src2
190 int OpI = TII->getOperandIdx(MII->getOpcode(), AMDGPU::OpName::pred_sel),
191 OpJ = TII->getOperandIdx(MIJ->getOpcode(), AMDGPU::OpName::pred_sel);
225 unsigned LastOp = TII->getOperandIdx(MI->getOpcode(), AMDGPU::OpName::last);
306 AMDGPU::OpName::bank_swizzle);
310 TII->getOperandIdx(MI.getOpcode(), AMDGPU::OpName
[all...]
H A DSIInstrInfo.cpp53 static bool nodesHaveSameOperandValue(SDNode *N0, SDNode* N1, unsigned OpName) { argument
57 int Op0Idx = AMDGPU::getNamedOperandIdx(Opc0, OpName);
58 int Op1Idx = AMDGPU::getNamedOperandIdx(Opc1, OpName);
123 if (AMDGPU::getNamedOperandIdx(Opc0, AMDGPU::OpName::data1) != -1 ||
124 AMDGPU::getNamedOperandIdx(Opc1, AMDGPU::OpName::data1) != -1)
160 if (!nodesHaveSameOperandValue(Load0, Load1, AMDGPU::OpName::soffset) ||
162 !nodesHaveSameOperandValue(Load0, Load1, AMDGPU::OpName::vaddr) ||
163 !nodesHaveSameOperandValue(Load0, Load1, AMDGPU::OpName::srsrc))
166 int OffIdx0 = AMDGPU::getNamedOperandIdx(Opc0, AMDGPU::OpName::offset);
167 int OffIdx1 = AMDGPU::getNamedOperandIdx(Opc1, AMDGPU::OpName
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H A DR600ISelLowering.cpp223 int DstIdx = TII->getOperandIdx(MI.getOpcode(), AMDGPU::OpName::dst);
288 int Idx = TII->getOperandIdx(*MIB, AMDGPU::OpName::literal);
296 TII->setImmOperand(*NewMI, AMDGPU::OpName::src0_sel,
2192 bool HasDst = TII->getOperandIdx(Opcode, AMDGPU::OpName::dst) > -1;
2203 TII->getOperandIdx(Opcode, AMDGPU::OpName::src0),
2204 TII->getOperandIdx(Opcode, AMDGPU::OpName::src1),
2205 TII->getOperandIdx(Opcode, AMDGPU::OpName::src2),
2206 TII->getOperandIdx(Opcode, AMDGPU::OpName::src0_X),
2207 TII->getOperandIdx(Opcode, AMDGPU::OpName::src0_Y),
2208 TII->getOperandIdx(Opcode, AMDGPU::OpName
[all...]
H A DR600Defines.h65 namespace OpName { namespace
H A DSIRegisterInfo.cpp259 AMDGPU::OpName::vaddr) &&
263 AMDGPU::OpName::offset);
324 MachineOperand *FIOp = TII->getNamedOperand(MI, AMDGPU::OpName::vaddr);
329 MachineOperand *OffsetOp = TII->getNamedOperand(MI, AMDGPU::OpName::offset);
640 TII->getNamedOperand(*MI, AMDGPU::OpName::src),
641 TII->getNamedOperand(*MI, AMDGPU::OpName::scratch_rsrc)->getReg(),
642 TII->getNamedOperand(*MI, AMDGPU::OpName::scratch_offset)->getReg(),
644 TII->getNamedOperand(*MI, AMDGPU::OpName::offset)->getImm(), RS);
655 TII->getNamedOperand(*MI, AMDGPU::OpName::dst),
656 TII->getNamedOperand(*MI, AMDGPU::OpName
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H A DSILowerControlFlow.cpp423 if (const MachineOperand *Val = TII->getNamedOperand(MI, AMDGPU::OpName::val)) {
435 const MachineOperand *Src = TII->getNamedOperand(MI, AMDGPU::OpName::src);
531 const MachineOperand *Idx = TII->getNamedOperand(MI, AMDGPU::OpName::idx);
548 MachineOperand *SaveOp = TII->getNamedOperand(MI, AMDGPU::OpName::sdst);
633 const MachineOperand *SrcVec = TII->getNamedOperand(MI, AMDGPU::OpName::src);
634 int Offset = TII->getNamedOperand(MI, AMDGPU::OpName::offset)->getImm();
639 const MachineOperand *Idx = TII->getNamedOperand(MI, AMDGPU::OpName::idx);
662 int Offset = TII->getNamedOperand(MI, AMDGPU::OpName::offset)->getImm();
665 const MachineOperand *Val = TII->getNamedOperand(MI, AMDGPU::OpName::val);
668 MachineOperand *Idx = TII->getNamedOperand(MI, AMDGPU::OpName
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H A DSIInstrInfo.h396 unsigned OpName) const;
508 unsigned OpName) const {
509 return getNamedOperand(const_cast<MachineInstr &>(MI), OpName);
513 int64_t getNamedImmOperand(const MachineInstr &MI, unsigned OpName) const {
514 int Idx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), OpName);
H A DSIInsertWaits.cpp249 MachineOperand *Data = TII->getNamedOperand(MI, AMDGPU::OpName::data);
255 MachineOperand *Data0 = TII->getNamedOperand(MI, AMDGPU::OpName::data0);
259 MachineOperand *Data1 = TII->getNamedOperand(MI, AMDGPU::OpName::data1);
/external/tensorflow/tensorflow/core/kernels/
H A Dlinalg_ops_common.h185 #define REGISTER_LINALG_OP_CPU(OpName, OpClass, Scalar) \
187 Name(OpName).Device(DEVICE_CPU).TypeConstraint<Scalar>("T"), OpClass)
189 #define REGISTER_LINALG_OP_GPU(OpName, OpClass, Scalar) \
191 Name(OpName).Device(DEVICE_GPU).TypeConstraint<Scalar>("T"), OpClass)
194 #define REGISTER_LINALG_OP(OpName, OpClass, Scalar) \
195 REGISTER_LINALG_OP_CPU(OpName, OpClass, Scalar)
/external/tensorflow/tensorflow/cc/framework/
H A Dscope_internal.h55 enum class OpName;
68 Impl(const Scope& other, Tags::OpName, const string& name,
H A Dscope.cc94 Scope::Impl::Impl(const Scope& other, Tags::OpName, const string& name,
359 return Scope(new Impl(*this, Impl::Tags::OpName(), impl()->name_, op_name));
/external/tensorflow/tensorflow/contrib/lite/tools/
H A Dvisualize.py205 def OpName(idx): function in function:GenerateGraph
220 "target": OpName(op_index)
225 "source": OpName(op_index)
228 "id": OpName(op_index),
/external/swiftshader/third_party/LLVM/utils/TableGen/
H A DCodeGenInstruction.cpp159 std::string OpName = Op.substr(1); local
163 std::string::size_type DotIdx = OpName.find_first_of(".");
165 SubOpName = OpName.substr(DotIdx+1);
168 OpName = OpName.substr(0, DotIdx);
171 unsigned OpIdx = getOperandNamed(OpName);
271 std::string OpName = P.first; local
273 if (OpName.empty()) break;
276 std::pair<unsigned,unsigned> Op = ParseOperandName(OpName, false);
H A DCodeGenDAGPatterns.cpp1742 TreePatternNode *TreePattern::ParseTreePattern(Init *TheInit, StringRef OpName){ argument
1753 OpName);
1757 if (R->getName() == "node" && !OpName.empty()) {
1758 if (OpName.empty())
1760 Args.push_back(OpName);
1763 Res->setName(OpName);
1768 if (!OpName.empty())
1778 return ParseTreePattern(II, OpName);
1802 if (!OpName.empty())
1870 Result->setName(OpName);
2614 const std::string &OpName = CGI.Operands[i].Name; local
2646 const std::string &OpName = Op.Name; local
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H A DFastISelEmitter.cpp386 static std::string getLegalCName(std::string OpName) {
387 std::string::size_type pos = OpName.find("::");
389 OpName.replace(pos, 2, "_");
390 return OpName;
/external/spirv-llvm/lib/SPIRV/libSPIRV/
H A DSPIRVFunction.cpp145 if (Decoder.OpCode == OpName ||
/external/llvm/utils/TableGen/
H A DCodeGenInstruction.cpp164 std::string OpName = Op.substr(1); local
168 std::string::size_type DotIdx = OpName.find_first_of(".");
170 SubOpName = OpName.substr(DotIdx+1);
173 OpName = OpName.substr(0, DotIdx);
176 unsigned OpIdx = getOperandNamed(OpName);
279 std::string OpName = P.first; local
281 if (OpName.empty()) break;
284 std::pair<unsigned,unsigned> Op = ParseOperandName(OpName, false);
H A DCodeGenDAGPatterns.cpp2086 TreePatternNode *TreePattern::ParseTreePattern(Init *TheInit, StringRef OpName){ argument
2097 OpName);
2101 if (R->getName() == "node" && !OpName.empty()) {
2102 if (OpName.empty())
2104 Args.push_back(OpName);
2107 Res->setName(OpName);
2113 if (OpName.empty())
2116 Args.push_back(OpName);
2117 Res->setName(OpName);
2122 if (!OpName
3008 const std::string &OpName = CGI.Operands[i].Name; local
3040 const std::string &OpName = Op.Name; local
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H A DFastISelEmitter.cpp413 static std::string getLegalCName(std::string OpName) {
414 std::string::size_type pos = OpName.find("::");
416 OpName.replace(pos, 2, "_");
417 return OpName;
/external/clang/lib/AST/
H A DDeclarationName.cpp184 const char *OpName = OperatorNames[N.getCXXOverloadedOperator()]; local
185 assert(OpName && "not an overloaded operator");
188 if (OpName[0] >= 'a' && OpName[0] <= 'z')
190 OS << OpName; local

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