Searched refs:RIP (Results 1 - 25 of 50) sorted by relevance

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/external/valgrind/memcheck/tests/amd64-linux/
H A Dint3-amd64.stdout.exp2 in int_handler, RIP is ...
/external/scapy/scapy/layers/
H A Drip.py7 RIP (Routing Information Protocol).
14 class RIP(Packet): class in inherits:Packet
15 name = "RIP header"
30 class RIPEntry(RIP):
31 name = "RIP entry"
42 name = "RIP authentication"
70 bind_layers( UDP, RIP, sport=520)
71 bind_layers( UDP, RIP, dport=520)
72 bind_layers( RIP, RIPEntry, )
/external/strace/linux/x86_64/
H A Duserent.h17 XLAT(8*RIP),
/external/kernel-headers/original/uapi/asm-x86/asm/
H A Dptrace-abi.h55 #define RIP 128 macro
/external/libunwind/src/x86_64/
H A Dinit.h65 c->dwarf.loc[RIP] = REG_INIT_LOC(c, rip, RIP);
67 ret = dwarf_get (&c->dwarf, c->dwarf.loc[RIP], &c->dwarf.ip);
80 c->dwarf.ret_addr_column = RIP;
H A DGstep.c135 c->dwarf.loc[RIP] = DWARF_LOC (c->dwarf.cfa, 0);
199 c->dwarf.loc[RIP] = rip_loc;
202 c->dwarf.ret_addr_column = RIP;
210 if (!DWARF_IS_NULL_LOC (c->dwarf.loc[RIP]))
212 ret = dwarf_get (&c->dwarf, c->dwarf.loc[RIP], &c->dwarf.ip);
213 Debug (1, "Frame Chain [RIP=0x%Lx] = 0x%Lx\n",
214 (unsigned long long) DWARF_GET_LOC (c->dwarf.loc[RIP]),
H A DGos-freebsd.c51 /* Check if RIP points at sigreturn sequence.
74 /* Check if RIP points at standard syscall sequence.
127 c->dwarf.loc[RIP] = DWARF_LOC (ucontext + UC_MCONTEXT_GREGS_RIP, 0);
136 c->dwarf.loc[RIP] = DWARF_LOC (c->dwarf.cfa, 0);
137 ret = dwarf_get (&c->dwarf, c->dwarf.loc[RIP], &c->dwarf.ip);
138 Debug (1, "Frame Chain [RIP=0x%Lx] = 0x%Lx\n",
139 (unsigned long long) DWARF_GET_LOC (c->dwarf.loc[RIP]),
H A Dunwind_i.h55 #define RIP 16 macro
H A DGregs.c77 c->dwarf.ip = *valp; /* also update the RIP cache */
78 loc = c->dwarf.loc[RIP];
H A DGstash_frame.c80 /* Later we are going to fish out {RBP,RSP,RIP} from sigcontext via
87 assert (DWARF_GET_LOC(d->loc[RIP]) - uc == UC_MCONTEXT_GREGS_RIP);
/external/llvm/lib/Analysis/
H A DRegionPrinter.cpp146 static RegionInfo *getGraph(RegionInfoPass *RIP) { argument
147 return &RIP->getRegionInfo();
/external/valgrind/coregrind/m_sigframe/
H A Dsigframe-amd64-darwin.c109 SC2(__rip,RIP);
137 SC2(RIP,__rip);
226 "next RIP=%#lx, next RSP=%#lx\n",
269 "valid magic; next RIP=%#llx\n",
H A Dsigframe-amd64-linux.c362 SC2(rip,RIP);
496 "next %%RIP = %#llx, status=%d\n",
597 "VG_(signal_return) (thread %u): isRT=%d valid magic; RIP=%#llx\n",
/external/llvm/lib/Target/X86/
H A DX86RegisterInfo.cpp51 : X86GenRegisterInfo((TT.isArch64Bit() ? X86::RIP : X86::EIP),
54 (TT.isArch64Bit() ? X86::RIP : X86::EIP)) {
181 // NOSP does not contain RIP, so no special case here.
190 // NOSP does not contain RIP, so no special case here.
442 for (MCSubRegIterator I(X86::RIP, this, /*IncludeSelf=*/true); I.isValid();
521 for (auto Reg : {X86::EFLAGS, X86::RIP, X86::EIP, X86::IP})
/external/google-breakpad/src/common/android/
H A Dbreakpad_getcontext_unittest.cc137 CHECK_REG(RIP);
/external/llvm/lib/Transforms/ObjCARC/
H A DObjCARCOpts.cpp1606 for (Instruction *RIP : NewRetainReleaseRRI.ReverseInsertPts) {
1607 if (ReleasesToMove.ReverseInsertPts.insert(RIP).second) {
1610 const BBState &RIPBBState = BBStates[RIP->getParent()];
1663 for (Instruction *RIP : NewReleaseRetainRRI.ReverseInsertPts) {
1664 if (RetainsToMove.ReverseInsertPts.insert(RIP).second) {
1667 const BBState &RIPBBState = BBStates[RIP->getParent()];
/external/swiftshader/third_party/LLVM/lib/Target/X86/MCTargetDesc/
H A DX86MCTargetDesc.cpp289 ? X86::RIP // Should have dwarf #16.
327 MachineLocation CSSrc(is64Bit ? X86::RIP : X86::EIP);
H A DX86AsmBackend.cpp230 // Check if it has an expression and is not RIP relative.
238 if (Op.isReg() && Op.getReg() == X86::RIP)
/external/swiftshader/third_party/LLVM/lib/Target/X86/
H A DX86CodeEmitter.cpp419 // But it's probably not beneficial. If the MCE supports using RIP directly
474 if (BaseReg == X86::RIP ||
475 (Is64BitMode && DispForReloc)) { // [disp32+RIP] in X86-64 mode
485 // while others, unless explicit asked to use RIP, use absolute references.
489 // If no BaseReg, issue a RIP relative instruction only if the MCE can
493 if (BaseReg != 0 && BaseReg != X86::RIP)
503 // byte to emit an addr that is just 'disp32' (the non-RIP relative form).
506 BaseReg == X86::RIP) { // [disp32+RIP] in X86-64 mode
H A DX86GenRegisterInfo.inc130 RIP = 111,
298 const unsigned EIP_Overlaps[] = { X86::EIP, X86::IP, X86::RIP, 0 };
312 const unsigned IP_Overlaps[] = { X86::IP, X86::EIP, X86::RIP, 0 };
359 const unsigned RIP_Overlaps[] = { X86::RIP, X86::EIP, X86::IP, 0 };
514 const unsigned EIP_SuperRegsSet[] = { X86::RIP, 0 };
517 const unsigned IP_SuperRegsSet[] = { X86::EIP, X86::RIP, 0 };
676 { "RIP", RIP_Overlaps, RIP_SubRegsSet, Empty_SuperRegsSet },
740 X86::RAX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::R8, X86::R9, X86::R10, X86::R11, X86::RBX, X86::R14, X86::R15, X86::R12, X86::R13, X86::RBP, X86::RSP, X86::RIP,
860 X86::RAX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::R8, X86::R9, X86::R11, X86::RIP,
870 X86::RAX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::RBX, X86::RBP, X86::RSP, X86::RIP,
[all...]
/external/swiftshader/third_party/LLVM/lib/Target/X86/Disassembler/
H A DX86Disassembler.cpp363 baseReg = MCOperand::CreateReg(X86::RIP); // Section 2.2.1.6
H A DX86DisassemblerDecoder.h291 ENTRY(RIP)
/external/valgrind/VEX/auxprogs/
H A Dgenoffsets.c119 GENOFFSET(AMD64,amd64,RIP);
/external/llvm/lib/Target/X86/MCTargetDesc/
H A DX86MCTargetDesc.cpp148 ? X86::RIP // Should have dwarf #16.
193 unsigned InstPtr = is64Bit ? X86::RIP : X86::EIP;
/external/capstone/arch/X86/
H A DX86DisassemblerDecoder.h400 ENTRY(RIP)

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