Searched refs:RVLocs1 (Results 1 - 3 of 3) sorted by relevance
/external/llvm/lib/CodeGen/ |
H A D | CallingConvLower.cpp | 260 SmallVector<CCValAssign, 4> RVLocs1; 261 CCState CCInfo1(CalleeCC, false, MF, RVLocs1, C); 268 if (RVLocs1.size() != RVLocs2.size()) 270 for (unsigned I = 0, E = RVLocs1.size(); I != E; ++I) { 271 const CCValAssign &Loc1 = RVLocs1[I];
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 1682 SmallVector<CCValAssign, 16> RVLocs1; local 1684 getTargetMachine(), RVLocs1, *DAG.getContext(), Call); 1692 if (RVLocs1.size() != RVLocs2.size()) 1694 for (unsigned i = 0, e = RVLocs1.size(); i != e; ++i) { 1695 if (RVLocs1[i].isRegLoc() != RVLocs2[i].isRegLoc()) 1697 if (RVLocs1[i].getLocInfo() != RVLocs2[i].getLocInfo()) 1699 if (RVLocs1[i].isRegLoc()) { 1700 if (RVLocs1[i].getLocReg() != RVLocs2[i].getLocReg()) 1703 if (RVLocs1[i].getLocMemOffset() != RVLocs2[i].getLocMemOffset())
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 2670 SmallVector<CCValAssign, 16> RVLocs1; local 2672 getTargetMachine(), RVLocs1, *DAG.getContext()); 2680 if (RVLocs1.size() != RVLocs2.size()) 2682 for (unsigned i = 0, e = RVLocs1.size(); i != e; ++i) { 2683 if (RVLocs1[i].isRegLoc() != RVLocs2[i].isRegLoc()) 2685 if (RVLocs1[i].getLocInfo() != RVLocs2[i].getLocInfo()) 2687 if (RVLocs1[i].isRegLoc()) { 2688 if (RVLocs1[i].getLocReg() != RVLocs2[i].getLocReg()) 2691 if (RVLocs1[i].getLocMemOffset() != RVLocs2[i].getLocMemOffset())
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