| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeIntegerTypes.cpp | 1440 EVT ShTy = N->getOperand(1).getValueType(); local
1448 NVT, InL, DAG.getConstant(Amt - NVTBits, DL, ShTy));
1453 Lo = DAG.getNode(ISD::SHL, DL, NVT, InL, DAG.getConstant(Amt, DL, ShTy));
1456 DAG.getConstant(Amt, DL, ShTy)),
1458 DAG.getConstant(-Amt + NVTBits, DL, ShTy)));
1468 NVT, InH, DAG.getConstant(Amt - NVTBits, DL, ShTy));
1476 DAG.getConstant(Amt, DL, ShTy)),
1478 DAG.getConstant(-Amt + NVTBits, DL, ShTy)));
1479 Hi = DAG.getNode(ISD::SRL, DL, NVT, InH, DAG.getConstant(Amt, DL, ShTy));
1487 DAG.getConstant(NVTBits - 1, DL, ShTy));
1515 EVT ShTy = Amt.getValueType(); local
1603 EVT ShTy = Amt.getValueType(); local
[all...] |
| H A D | TargetLowering.cpp | 702 EVT ShTy = getShiftAmountTy(InnerVT, DL); local
703 if (!APInt(BitWidth, ShAmt).isIntN(ShTy.getSizeInBits()))
704 ShTy = InnerVT;
707 TLO.DAG.getConstant(ShAmt, dl, ShTy));
|
| H A D | SelectionDAG.cpp | 1810 EVT ShTy = TLI->getShiftAmountTy(LHSTy, getDataLayout()); local
1811 if (OpTy == ShTy || OpTy.isVector()) return Op;
1813 return getZExtOrTrunc(Op, SDLoc(Op), ShTy);
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeIntegerTypes.cpp | 1264 EVT ShTy = N->getOperand(1).getValueType(); local
1272 NVT, InL, DAG.getConstant(Amt-NVTBits, ShTy));
1286 Lo = DAG.getNode(ISD::SHL, DL, NVT, InL, DAG.getConstant(Amt, ShTy));
1289 DAG.getConstant(Amt, ShTy)),
1291 DAG.getConstant(NVTBits-Amt, ShTy)));
1302 NVT, InH, DAG.getConstant(Amt-NVTBits,ShTy));
1310 DAG.getConstant(Amt, ShTy)),
1312 DAG.getConstant(NVTBits-Amt, ShTy)));
1313 Hi = DAG.getNode(ISD::SRL, DL, NVT, InH, DAG.getConstant(Amt, ShTy));
1321 DAG.getConstant(NVTBits-1, ShTy));
1349 EVT ShTy = Amt.getValueType(); local
1427 EVT ShTy = Amt.getValueType(); local
[all...] |
| H A D | TargetLowering.cpp | 1480 EVT ShTy = getShiftAmountTy(InnerVT); local
1481 if (!APInt(BitWidth, ShAmt).isIntN(ShTy.getSizeInBits()))
1482 ShTy = InnerVT;
1485 TLO.DAG.getConstant(ShAmt, ShTy));
|
| H A D | SelectionDAG.cpp | 1446 MVT ShTy = TLI.getShiftAmountTy(LHSTy); local
1447 if (OpTy == ShTy || OpTy.isVector()) return Op;
1449 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1450 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 1505 static ARMOperand *CreateShiftedRegister(ARM_AM::ShiftOpc ShTy, argument
1511 Op->RegShiftedReg.ShiftTy = ShTy;
1520 static ARMOperand *CreateShiftedImmediate(ARM_AM::ShiftOpc ShTy, argument
1525 Op->RegShiftedImm.ShiftTy = ShTy;
|
| /external/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 2649 CreateShiftedRegister(ARM_AM::ShiftOpc ShTy, unsigned SrcReg, argument
2653 Op->RegShiftedReg.ShiftTy = ShTy;
2663 CreateShiftedImmediate(ARM_AM::ShiftOpc ShTy, unsigned SrcReg, argument
2666 Op->RegShiftedImm.ShiftTy = ShTy;
|