Searched refs:TMP_REG1 (Results 1 - 15 of 15) sorted by relevance

/external/pcre/dist2/src/sljit/
H A DsljitNativeSPARC_32.c48 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & SRC2_IMM));
55 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & SRC2_IMM));
68 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & SRC2_IMM));
78 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & SRC2_IMM));
82 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & SRC2_IMM));
85 FAIL_IF(push_inst(compiler, OR | D(TMP_REG1) | S1(0) | S2(src2), DR(TMP_REG1)));
91 FAIL_IF(push_inst(compiler, SUB | SET_FLAGS | D(0) | S1(TMP_REG1) | S2(0), SET_FLAGS));
92 FAIL_IF(push_inst(compiler, SLL | D(TMP_REG1) | S1(TMP_REG1) | IM
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H A DsljitNativeX86_common.c67 #define TMP_REG1 (SLJIT_NUMBER_OF_REGISTERS + 2) macro
83 #define TMP_REG1 (SLJIT_NUMBER_OF_REGISTERS + 2) macro
686 inst = emit_x86_instruction(compiler, 1, TMP_REG1, 0, src, srcw);
733 inst = emit_x86_instruction(compiler, 1, TMP_REG1, 0, src, srcw);
736 inst = emit_x86_instruction(compiler, 1, TMP_REG1, 0, dst, dstw);
780 && reg_map[TMP_REG1] > 7,
786 && reg_map[TMP_REG1] == 2,
796 EMIT_MOV(compiler, TMP_REG1, 0, SLJIT_R1, 0);
799 inst = emit_x86_instruction(compiler, 1, TMP_REG1, 0, TMP_REG1,
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H A DsljitNativeARM_64.c37 #define TMP_REG1 (SLJIT_NUMBER_OF_REGISTERS + 2) macro
517 /* dst must be register, TMP_REG1
518 arg1 must be register, TMP_REG1, imm
532 FAIL_IF(load_immediate(compiler, TMP_REG1, arg1));
533 arg1 = TMP_REG1;
551 SLJIT_ASSERT(!(flags & SET_FLAGS) && (flags & ARG2_IMM) && arg1 == TMP_REG1);
654 FAIL_IF(load_immediate(compiler, TMP_REG1, arg1));
655 arg1 = TMP_REG1;
666 SLJIT_ASSERT(!(flags & SET_FLAGS) && arg1 == TMP_REG1);
672 SLJIT_ASSERT(!(flags & SET_FLAGS) && arg1 == TMP_REG1);
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H A DsljitNativeSPARC_common.c90 #define TMP_REG1 (SLJIT_NUMBER_OF_REGISTERS + 2) macro
440 FAIL_IF(load_immediate(compiler, TMP_REG1, -local_size));
441 FAIL_IF(push_inst(compiler, SAVE | D(SLJIT_SP) | S1(SLJIT_SP) | S2(TMP_REG1), UNMOVABLE_INS));
584 arg2 = TMP_REG1;
605 arg2 = TMP_REG1;
641 /* arg1 goes to TMP_REG1 or src reg
644 result goes to TMP_REG2, so put result can use TMP_REG1 and TMP_REG3. */
665 else if ((dst & SLJIT_MEM) && !getput_arg_fast(compiler, flags | ARG_TEST, TMP_REG1, dst, dstw))
694 FAIL_IF(load_immediate(compiler, TMP_REG1, src1w));
695 src1_r = TMP_REG1;
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H A DsljitNativeMIPS_64.c168 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & SRC2_IMM));
175 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & SRC2_IMM));
189 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & SRC2_IMM));
207 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & SRC2_IMM));
211 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & SRC2_IMM));
219 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & SRC2_IMM));
231 FAIL_IF(push_inst(compiler, SELECT_OP(DADDU, ADDU) | S(src2) | TA(0) | D(TMP_REG1), DR(TMP_REG1)));
233 FAIL_IF(push_inst(compiler, BEQ | S(TMP_REG1) | TA(0) | IMM(5), UNMOVABLE_INS));
238 FAIL_IF(push_inst(compiler, BGEZ | S(TMP_REG1) | IM
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H A DsljitNativeARM_T2_32.c36 #define TMP_REG1 (SLJIT_NUMBER_OF_REGISTERS + 2) macro
513 /* dst must be register, TMP_REG1
514 arg1 must be register, TMP_REG1, imm
522 FAIL_IF(load_immediate(compiler, TMP_REG1, arg1));
523 arg1 = TMP_REG1;
536 SLJIT_ASSERT(!(flags & SET_FLAGS) && (flags & ARG2_IMM) && arg1 == TMP_REG1);
672 FAIL_IF(load_immediate(compiler, TMP_REG1, arg1));
673 arg1 = TMP_REG1;
687 SLJIT_ASSERT(!(flags & SET_FLAGS) && arg1 == TMP_REG1);
693 SLJIT_ASSERT(!(flags & SET_FLAGS) && arg1 == TMP_REG1);
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H A DsljitNativeMIPS_32.c77 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & SRC2_IMM));
84 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & SRC2_IMM));
102 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & SRC2_IMM));
119 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & SRC2_IMM));
127 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & SRC2_IMM));
139 FAIL_IF(push_inst(compiler, ADDU | S(src2) | TA(0) | D(TMP_REG1), DR(TMP_REG1)));
141 FAIL_IF(push_inst(compiler, BEQ | S(TMP_REG1) | TA(0) | IMM(5), UNMOVABLE_INS));
146 FAIL_IF(push_inst(compiler, BGEZ | S(TMP_REG1) | IMM(-2), UNMOVABLE_INS));
147 FAIL_IF(push_inst(compiler, SLL | T(TMP_REG1) |
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H A DsljitNativeMIPS_common.c47 #define TMP_REG1 (SLJIT_NUMBER_OF_REGISTERS + 2) macro
566 FAIL_IF(load_immediate(compiler, DR(TMP_REG1), local_size));
568 FAIL_IF(push_inst(compiler, SUBU_W | S(SLJIT_SP) | T(TMP_REG1) | D(SLJIT_SP), DR(SLJIT_SP)));
628 FAIL_IF(load_immediate(compiler, DR(TMP_REG1), local_size));
629 FAIL_IF(push_inst(compiler, ADDU_W | S(SLJIT_SP) | T(TMP_REG1) | D(TMP_REG1), DR(TMP_REG1)));
630 base = S(TMP_REG1);
655 return push_inst(compiler, ADDU_W | S(TMP_REG1) | TA(0) | D(SLJIT_SP), UNMOVABLE_INS);
756 tmp_ar = DR(TMP_REG1);
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H A DsljitNativeARM_32.c39 #define TMP_REG1 (SLJIT_NUMBER_OF_REGISTERS + 2) macro
263 return push_inst(compiler, BLX | RM(TMP_REG1));
486 inst[1] = BLX | RM(TMP_REG1);
978 SLJIT_ASSERT(src1 == TMP_REG1); \
993 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & ARGS_SWAPPED));
1006 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & ARGS_SWAPPED));
1027 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & ARGS_SWAPPED));
1094 SLJIT_ASSERT(dst != TMP_REG1);
1095 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, TMP_REG1, SLJIT_UNUSED, reg_map[src2])));
1096 FAIL_IF(push_inst(compiler, mul_inst | (reg_map[src2] << 8) | reg_map[TMP_REG1]));
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H A DsljitNativePPC_common.c94 #define TMP_REG1 (SLJIT_NUMBER_OF_REGISTERS + 2) macro
958 tmp_r = ((inp_flags & LOAD_DATA) && ((inp_flags) & MEM_MASK) <= GPR_REG) ? reg : TMP_REG1;
961 tmp_r = TMP_REG1;
1126 /* arg1 goes to TMP_REG1 or src reg
1129 result goes to TMP_REG2, so put result can use TMP_REG1 and TMP_REG3. */
1171 FAIL_IF(load_immediate(compiler, TMP_REG1, src1w));
1172 src1_r = TMP_REG1;
1174 else if (getput_arg_fast(compiler, input_flags | LOAD_DATA, TMP_REG1, src1, src1w)) {
1176 src1_r = TMP_REG1;
1204 FAIL_IF(getput_arg(compiler, input_flags | LOAD_DATA, TMP_REG1, src
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H A DsljitNativeX86_32.c90 PUSH_REG(reg_map[TMP_REG1]);
94 *inst++ = MOD_REG | (reg_map[TMP_REG1] << 3) | 0x4 /* esp */;
122 *inst++ = MOD_DISP8 | (reg_map[SLJIT_S0] << 3) | reg_map[TMP_REG1];
127 *inst++ = MOD_DISP8 | (reg_map[SLJIT_S1] << 3) | reg_map[TMP_REG1];
132 *inst++ = MOD_DISP8 | (reg_map[SLJIT_S2] << 3) | reg_map[TMP_REG1];
151 inst[1] = MOD_REG | (reg_map[TMP_REG1] << 3) | reg_map[SLJIT_SP];
160 inst[16] = PUSH_r + reg_map[TMP_REG1];
256 POP_REG(reg_map[TMP_REG1]);
491 dst = TMP_REG1;
H A DsljitNativePPC_32.c52 SLJIT_ASSERT(src1 == TMP_REG1);
59 SLJIT_ASSERT(src1 == TMP_REG1);
74 SLJIT_ASSERT(src1 == TMP_REG1);
86 SLJIT_ASSERT(src1 == TMP_REG1);
90 SLJIT_ASSERT(src1 == TMP_REG1);
94 SLJIT_ASSERT(src1 == TMP_REG1);
H A DsljitNativePPC_64.c133 FAIL_IF(push_inst(compiler, EXTSW | S(src1) | A(TMP_REG1))); \
134 src1 = TMP_REG1; \
144 FAIL_IF(push_inst(compiler, EXTSW | S(src1) | A(TMP_REG1))); \
145 src1 = TMP_REG1; \
154 SLJIT_ASSERT(src1 == TMP_REG1);
161 SLJIT_ASSERT(src1 == TMP_REG1);
174 SLJIT_ASSERT(src1 == TMP_REG1);
189 SLJIT_ASSERT(src1 == TMP_REG1);
201 SLJIT_ASSERT(src1 == TMP_REG1);
206 SLJIT_ASSERT(src1 == TMP_REG1);
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H A DsljitNativeTILEGX_64.c46 #define TMP_REG1 (SLJIT_NUMBER_OF_REGISTERS + 2) macro
1361 SLJIT_ASSERT(!(flags & LOAD_DATA) && reg_map[TMP_REG1] != reg_ar);
1592 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & SRC2_IMM));
1599 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & SRC2_IMM));
1614 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & SRC2_IMM));
1629 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & SRC2_IMM));
1643 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & SRC2_IMM));
1652 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & SRC2_IMM));
1961 /* arg1 goes to TMP_REG1 or src reg.
1964 result goes to TMP_REG2, so put result can use TMP_REG1 an
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H A DsljitNativeX86_64.c602 dst = TMP_REG1;
638 FAIL_IF(emit_load_imm64(compiler, TMP_REG1, srcw));
639 src = TMP_REG1;
722 dst_r = FAST_IS_REG(dst) ? dst : TMP_REG1;

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