Searched refs:TMP_REG3 (Results 1 - 9 of 9) sorted by relevance

/external/pcre/dist2/src/sljit/
H A DsljitNativeARM_T2_32.c38 #define TMP_REG3 (SLJIT_NUMBER_OF_REGISTERS + 4) macro
1014 tmp_r = (flags & STORE) ? TMP_REG3 : reg;
1031 other_r = TMP_REG3;
1034 else if (emit_set_delta(compiler, TMP_REG3, TMP_REG3, argw - compiler->cache_argw) != SLJIT_ERR_UNSUPPORTED) {
1037 other_r = TMP_REG3;
1043 FAIL_IF(load_immediate(compiler, TMP_REG3, argw));
1046 other_r = TMP_REG3;
1066 return push_inst32(compiler, sljit_mem32[flags] | MEM_IMM12 | RT4(reg) | RN4(TMP_REG3) | diff);
1068 return push_inst32(compiler, sljit_mem32[flags] | MEM_IMM8 | RT4(reg) | RN4(TMP_REG3) | (compile
[all...]
H A DsljitNativeARM_64.c39 #define TMP_REG3 (SLJIT_NUMBER_OF_REGISTERS + 4) macro
922 tmp_r = (flags & STORE) ? TMP_REG3 : reg;
947 other_r = TMP_REG3;
950 else if (emit_set_delta(compiler, TMP_REG3, TMP_REG3, argw - compiler->cache_argw) != SLJIT_ERR_UNSUPPORTED) {
953 other_r = TMP_REG3;
959 FAIL_IF(load_immediate(compiler, TMP_REG3, argw));
962 other_r = TMP_REG3;
994 | RT(reg) | RN(TMP_REG3) | ((diff & 0x1ff) << 12));
995 if (emit_set_delta(compiler, TMP_REG3, TMP_REG
[all...]
H A DsljitNativeMIPS_common.c49 #define TMP_REG3 (SLJIT_NUMBER_OF_REGISTERS + 4) macro
773 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(TMP_REG3) | TA(reg_ar), delay_slot);
778 FAIL_IF(push_inst(compiler, ADDU_W | S(base) | T(TMP_REG3) | D(TMP_REG3), DR(TMP_REG3)));
779 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(TMP_REG3) | TA(reg_ar), delay_slot);
781 FAIL_IF(push_inst(compiler, ADDU_W | S(base) | T(TMP_REG3) | DA(tmp_ar), tmp_ar));
787 FAIL_IF(push_inst(compiler, ADDU_W | S(base) | T(TMP_REG3) | D(base), DR(base)));
796 FAIL_IF(push_inst(compiler, SLL_W | T(OFFS_REG(arg)) | D(TMP_REG3) | SH_IMM(argw), DR(TMP_REG3)));
[all...]
H A DsljitNativeARM_32.c41 #define TMP_REG3 (SLJIT_NUMBER_OF_REGISTERS + 4) macro
1084 mul_inst = SMULL | (reg_map[TMP_REG3] << 16) | (reg_map[dst] << 12);
1102 /* We need to use TMP_REG3. */
1106 return push_inst(compiler, EMIT_DATA_PROCESS_INS(CMP_DP, SET_FLAGS, SLJIT_UNUSED, TMP_REG3, RM(dst) | 0xfc0));
1453 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, TMP_REG3, SLJIT_UNUSED, RM(reg)))); \
1454 reg = TMP_REG3; \
1473 tmp_r = (inp_flags & LOAD_DATA) ? reg : TMP_REG3;
1489 GETPUT_ARG_DATA_TRANSFER(sign, 0, reg, TMP_REG3, argw);
1501 tmp_r = TMP_REG3;
1520 GETPUT_ARG_DATA_TRANSFER(1, 0, reg, TMP_REG3, im
[all...]
H A DsljitNativePPC_common.c96 #define TMP_REG3 (SLJIT_NUMBER_OF_REGISTERS + 4) macro
941 FAIL_IF(push_inst(compiler, ADDI | D(TMP_REG3) | A(TMP_REG3) | (imm & 0x3))); \
969 tmp_r = TMP_REG3;
974 tmp_r = TMP_REG3;
1021 tmp_r = TMP_REG3;
1027 tmp_r = TMP_REG3;
1039 return push_inst(compiler, INST_CODE_AND_DST(inst, inp_flags, reg) | A(TMP_REG3) | IMM(diff));
1048 tmp_r = TMP_REG3;
1059 return push_inst(compiler, INST_CODE_AND_DST(inst, inp_flags, reg) | A(TMP_REG3) | IM
[all...]
H A DsljitNativeX86_64.c50 SLJIT_COMPILE_ASSERT(reg_map[TMP_REG3] == 9, tmp3_is_9_first);
77 SLJIT_COMPILE_ASSERT(reg_map[TMP_REG3] == 9, tmp3_is_9_second);
390 if (emit_load_imm64(compiler, TMP_REG3, immb))
394 b |= TO_OFFS_REG(TMP_REG3);
396 b |= TMP_REG3;
H A DsljitNativeSPARC_common.c92 #define TMP_REG3 (SLJIT_NUMBER_OF_REGISTERS + 4) macro
574 arg2 = TMP_REG3;
579 arg2 = TMP_REG3;
592 FAIL_IF(push_inst(compiler, ADD | D(TMP_REG3) | S1(TMP_REG3) | IMM(argw - compiler->cache_argw), DR(TMP_REG3)));
595 arg2 = TMP_REG3;
600 arg2 = TMP_REG3;
643 TMP_REG3 can be used for caching
644 result goes to TMP_REG2, so put result can use TMP_REG1 and TMP_REG3
[all...]
H A DsljitNativeTILEGX_64.c48 #define TMP_REG3 (SLJIT_NUMBER_OF_REGISTERS + 4) macro
1414 FAIL_IF(ADD(TMP_REG3_mapped, reg_map[base], reg_map[!argw ? OFFS_REG(arg) : TMP_REG3]));
1417 FAIL_IF(ADD(tmp_ar, reg_map[base], reg_map[!argw ? OFFS_REG(arg) : TMP_REG3]));
1425 FAIL_IF(ADD(reg_map[base], reg_map[base], reg_map[!argw ? OFFS_REG(arg) : TMP_REG3]));
1963 TMP_REG3 can be used for caching.
1964 result goes to TMP_REG2, so put result can use TMP_REG1 and TMP_REG3. */
H A DsljitNativeX86_common.c85 #define TMP_REG3 (SLJIT_NUMBER_OF_REGISTERS + 4) macro

Completed in 163 milliseconds