Searched refs:benefit (Results 1 - 13 of 13) sorted by relevance
| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| H A D | RegAllocPBQP.h | 156 PBQP::PBQPNum benefit);
161 PBQP::PBQPNum benefit);
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| /external/mesa3d/src/util/ |
| H A D | register_allocate.c | 647 float benefit = 0; local
650 /* Define the benefit of eliminating an interference between n, n2
659 benefit += ((float)g->regs->classes[n_class]->q[n2_class] /
664 return benefit;
668 * Returns a node number to be spilled according to the cost/benefit using
685 float benefit; local
693 benefit = ra_get_spill_benefit(g, n);
695 if (benefit / cost > best_benefit) {
696 best_benefit = benefit / cost;
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| H A D | RegAllocPBQP.cpp | 422 PBQP::PBQPNum benefit) {
423 costVec[pregOption] += -benefit;
430 PBQP::PBQPNum benefit) {
441 costMat[i + 1][j + 1] += -benefit;
420 addPhysRegCoalesce(PBQP::Vector &costVec, unsigned pregOption, PBQP::PBQPNum benefit) argument
426 addVirtRegCoalesce( PBQP::Matrix &costMat, const PBQPRAProblem::AllowedSet &vr1Allowed, const PBQPRAProblem::AllowedSet &vr2Allowed, PBQP::PBQPNum benefit) argument
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| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| H A D | brw_schedule_instructions.cpp | 713 int benefit = 0; local
718 benefit -= v->alloc.sizes[inst->dst.nr];
728 benefit += v->alloc.sizes[inst->src[i].nr];
736 benefit++;
742 return benefit;
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| /external/llvm/utils/vim/syntax/ |
| H A D | llvm.vim | 16 " benefit as much from having dedicated highlighting rules.
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| /external/swiftshader/third_party/LLVM/utils/vim/ |
| H A D | llvm.vim | 16 " benefit as much from having dedicated highlighting rules.
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| /external/syslinux/core/ |
| H A D | bcopyxx.inc | 222 and edx,~15 ; Align 16 to benefit the GDT
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| /external/tensorflow/tensorflow/contrib/verbs/ |
| H A D | README.md | 30 3. Following HKUST research on the use of GPU direct, and their [GDR implementation](https://github.com/tensorflow/tensorflow/blob/master/tensorflow/contrib/gdr/README.md), there is a smart way to benefit from the TensorFlow allocation theme which is mostly pool based, i.e allocators pre-allocate a large memory block, and allocate the tensors from there. By attaching a custom Visitor to relevant allocators, we can do a single registration of the entire memory block, which zeros the registration overhead. Once the block is registered, each new tensor allocated will be at a registered address, which will allow us to do direct RDMA writes to it.
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| /external/libunwind/doc/ |
| H A D | libunwind-dynamic.tex | 317 overhead of explicit sorting is only paid when there is a real benefit
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| /external/libffi/ |
| H A D | texinfo.tex | 5001 % A bit of stretch before each entry for the benefit of balancing
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| /external/libmicrohttpd/doc/ |
| H A D | texinfo.tex | 5001 % A bit of stretch before each entry for the benefit of balancing
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| /external/python/cpython2/Modules/_ctypes/libffi/ |
| H A D | texinfo.tex | 5001 % A bit of stretch before each entry for the benefit of balancing
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| /external/python/cpython3/Modules/_ctypes/libffi/ |
| H A D | texinfo.tex | 5001 % A bit of stretch before each entry for the benefit of balancing
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