/external/swiftshader/third_party/LLVM/lib/CodeGen/ |
H A D | CalcSpillWeights.cpp | 62 unsigned sub, hreg, hsub; local 65 hreg = mi->getOperand(1).getReg(); 69 hreg = mi->getOperand(0).getReg(); 73 if (!hreg) 76 if (TargetRegisterInfo::isVirtualRegister(hreg)) 77 return sub == hsub ? hreg : 0; 83 return rc->contains(hreg) ? hreg : 0; 85 // reg:sub should match the physreg hreg. 86 return tri.getMatchingSuperReg(hreg, su [all...] |
/external/llvm/lib/CodeGen/ |
H A D | CalcSpillWeights.cpp | 49 unsigned sub, hreg, hsub; local 52 hreg = mi->getOperand(1).getReg(); 56 hreg = mi->getOperand(0).getReg(); 60 if (!hreg) 63 if (TargetRegisterInfo::isVirtualRegister(hreg)) 64 return sub == hsub ? hreg : 0; 70 return rc->contains(hreg) ? hreg : 0; 72 // reg:sub should match the physreg hreg. 73 return tri.getMatchingSuperReg(hreg, su [all...] |
/external/valgrind/VEX/priv/ |
H A D | host_mips_isel.c | 4175 HReg hreg, hregHI; local 4224 hregHI = hreg = INVALID_HREG; 4231 hreg = mkHReg(True, HRcInt64, 0, j++); 4234 hreg = mkHReg(True, HRcInt32, 0, j++); 4239 hreg = mkHReg(True, HRcInt64, 0, j++); 4242 hreg = mkHReg(True, HRcInt32, 0, j++); 4248 hreg = mkHReg(True, HRcInt64, 0, j++); 4253 hreg = mkHReg(True, HRcFlt64, 0, j++); 4256 hreg = mkHReg(True, HRcFlt32, 0, j++); 4260 hreg [all...] |
H A D | host_s390_isel.c | 4100 HReg hreg, hregHI; local 4149 hregHI = hreg = INVALID_HREG; 4156 hreg = mkVRegI(j++); 4160 hreg = mkVRegI(j++); 4168 hreg = mkVRegF(j++); 4173 hreg = mkVRegF(j++); 4183 env->vregmap[i] = hreg;
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H A D | host_arm64_isel.c | 4115 HReg hreg, hregHI; local 4155 hregHI = hreg = INVALID_HREG; 4159 hreg = mkHReg(True, HRcInt64, 0, j++); 4162 hreg = mkHReg(True, HRcInt64, 0, j++); 4168 hreg = mkHReg(True, HRcFlt64, 0, j++); 4171 hreg = mkHReg(True, HRcVec128, 0, j++); 4174 hreg = mkHReg(True, HRcVec128, 0, j++); 4181 env->vregmap[i] = hreg;
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H A D | host_x86_isel.c | 4433 HReg hreg, hregHI; local 4475 hregHI = hreg = INVALID_HREG; 4480 case Ity_I32: hreg = mkHReg(True, HRcInt32, 0, j++); break; 4481 case Ity_I64: hreg = mkHReg(True, HRcInt32, 0, j++); 4484 case Ity_F64: hreg = mkHReg(True, HRcFlt64, 0, j++); break; 4485 case Ity_V128: hreg = mkHReg(True, HRcVec128, 0, j++); break; 4489 env->vregmap[i] = hreg;
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H A D | host_amd64_isel.c | 4934 HReg hreg, hregHI; local 4978 hregHI = hreg = INVALID_HREG; 4982 hreg = mkHReg(True, HRcInt64, 0, j++); 4985 hreg = mkHReg(True, HRcInt64, 0, j++); 4991 hreg = mkHReg(True, HRcVec128, 0, j++); 4994 hreg = mkHReg(True, HRcVec128, 0, j++); 5001 env->vregmap[i] = hreg;
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H A D | host_arm_isel.c | 6529 HReg hreg, hregHI; local 6571 hregHI = hreg = INVALID_HREG; 6576 case Ity_I32: hreg = mkHReg(True, HRcInt32, 0, j++); break; 6579 hreg = mkHReg(True, HRcFlt64, 0, j++); 6582 hreg = mkHReg(True, HRcInt32, 0, j++); 6585 case Ity_F32: hreg = mkHReg(True, HRcFlt32, 0, j++); break; 6586 case Ity_F64: hreg = mkHReg(True, HRcFlt64, 0, j++); break; 6587 case Ity_V128: hreg = mkHReg(True, HRcVec128, 0, j++); break; 6591 env->vregmap[i] = hreg;
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/external/vixl/src/aarch64/ |
H A D | simulator-aarch64.h | 1167 VIXL_DEPRECATED("ReadHRegister", int16_t hreg(unsigned code) const) {
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