| /external/v8/src/arm64/ |
| H A D | instructions-arm64.cc | 90 // indicate a failure case. Specifically, where the constraints on imm_s are not
95 int32_t imm_s = ImmSetBits(); local
98 // An integer is constructed from the n, imm_s and imm_r bits according to
116 if (imm_s == 0x3F) {
119 uint64_t bits = (1UL << (imm_s + 1)) - 1;
122 if ((imm_s >> 1) == 0x1F) {
126 if ((imm_s & width) == 0) {
128 if ((imm_s & mask) == mask) {
131 uint64_t bits = (1UL << ((imm_s & mask) + 1)) - 1;
|
| H A D | assembler-arm64.cc | 2376 unsigned n, imm_s, imm_r; local
2377 if (IsImmLogical(immediate, reg_size, &n, &imm_s, &imm_r)) {
2379 LogicalImmediate(rd, rn, n, imm_s, imm_r, op);
2396 unsigned imm_s,
2402 ImmSetBits(imm_s, reg_size) | ImmRotate(imm_r, reg_size) | dest_reg |
2637 // imm_s and imm_r are updated with immediates encoded in the format required
2640 // to by n, imm_s and imm_r are undefined.
2644 unsigned* imm_s,
2646 DCHECK((n != NULL) && (imm_s != NULL) && (imm_r != NULL));
2651 // Logical immediates are encoded using parameters n, imm_s an
2393 LogicalImmediate(const Register& rd, const Register& rn, unsigned n, unsigned imm_s, unsigned imm_r, LogicalOp op) argument
2641 IsImmLogical(uint64_t value, unsigned width, unsigned* n, unsigned* imm_s, unsigned* imm_r) argument
[all...] |
| H A D | macro-assembler-arm64.cc | 122 unsigned n, imm_s, imm_r; local
123 if (IsImmLogical(immediate, reg_size, &n, &imm_s, &imm_r)) {
125 LogicalImmediate(rd, rn, n, imm_s, imm_r, op);
417 unsigned n, imm_s, imm_r; local
429 } else if (IsImmLogical(imm, reg_size, &n, &imm_s, &imm_r)) {
431 LogicalImmediate(dst, AppropriateZeroRegFor(dst), n, imm_s, imm_r, ORR);
|
| H A D | assembler-arm64.h | 1782 unsigned* imm_s,
1897 unsigned imm_s,
|
| /external/vixl/src/aarch64/ |
| H A D | instructions-aarch64.cc | 125 // indicate a failure case. Specifically, where the constraints on imm_s are
130 int32_t imm_s = GetImmSetBits(); local
133 // An integer is constructed from the n, imm_s and imm_r bits according to
151 if (imm_s == 0x3f) {
154 uint64_t bits = (UINT64_C(1) << (imm_s + 1)) - 1;
157 if ((imm_s >> 1) == 0x1f) {
161 if ((imm_s & width) == 0) {
163 if ((imm_s & mask) == mask) {
166 uint64_t bits = (UINT64_C(1) << ((imm_s & mask) + 1)) - 1;
|
| H A D | macro-assembler-aarch64.cc | 511 unsigned n, imm_s, imm_r; local
528 } else if (IsImmLogical(imm, reg_size, &n, &imm_s, &imm_r)) {
535 imm_s,
870 unsigned n, imm_s, imm_r; local
871 if (IsImmLogical(immediate, reg_size, &n, &imm_s, &imm_r)) {
873 LogicalImmediate(rd, rn, n, imm_s, imm_r, op);
|
| H A D | assembler-aarch64.cc | 4027 unsigned n, imm_s, imm_r;
4028 if (IsImmLogical(immediate, reg_size, &n, &imm_s, &imm_r)) {
4030 LogicalImmediate(rd, rn, n, imm_s, imm_r, op);
4047 unsigned imm_s,
4053 ImmSetBits(imm_s, reg_size) | ImmRotate(imm_r, reg_size) | dest_reg |
4423 // imm_s and imm_r are updated with immediates encoded in the format required
4426 // to by n, imm_s and imm_r are undefined.
4430 unsigned* imm_s,
4436 // Logical immediates are encoded using parameters n, imm_s and imm_r using
4616 if ((n != NULL) || (imm_s !
[all...] |
| H A D | assembler-aarch64.h | 2883 unsigned* imm_s = NULL,
3129 unsigned imm_s,
|
| /external/valgrind/VEX/priv/ |
| H A D | host_arm64_isel.c | 1063 /*OUT*/UInt* imm_s, /*OUT*/UInt* imm_r,
1070 // pointed to by n, imm_s and imm_r are updated with immediates
1073 // returns false, and the values pointed to by n, imm_s and imm_r
1075 vassert(n != NULL && imm_s != NULL && imm_r != NULL);
1078 // Logical immediates are encoded using parameters n, imm_s and imm_r using
1124 *imm_s = 0x3C;
1130 *imm_s = ((imm_s_fixed | (set_bits - 1)) & imm_s_mask);
1171 UInt n = 0, imm_s = 0, imm_r = 0; local
1172 Bool ok = isImmLogical(&n, &imm_s, &imm_r, imm64, 64);
1174 vassert(n < 2 && imm_s < 6
1062 isImmLogical( UInt* n, UInt* imm_s, UInt* imm_r, ULong value, UInt width ) argument
[all...] |