Searched refs:in5 (Results 1 - 25 of 40) sorted by relevance

12

/external/libvpx/libvpx/vp9/encoder/mips/msa/
H A Dvp9_fdct8x8_msa.c18 v8i16 in0, in1, in2, in3, in4, in5, in6, in7; local
20 LD_SH8(input, stride, in0, in1, in2, in3, in4, in5, in6, in7);
22 SLLI_4V(in4, in5, in6, in7, 2);
26 VP9_FDCT8(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in3, in4,
27 in5, in6, in7);
28 TRANSPOSE8x8_SH_SH(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2,
29 in3, in4, in5, in6, in7);
30 VP9_FDCT8(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in3, in4,
31 in5, in6, in7);
34 VP9_ADST8(in0, in1, in2, in3, in4, in5, in
[all...]
H A Dvp9_fdct_msa.h18 #define VP9_ADST8(in0, in1, in2, in3, in4, in5, in6, in7, out0, out1, out2, \
47 ILVRL_H2_SH(in2, in5, vec1_m, vec0_m); \
51 cnst2_m, cnst3_m, in5, in2, in6, in1); \
52 BUTTERFLY_4(in7, in0, in2, in5, s1_m, s0_m, in2, in5); \
70 ILVRL_H2_SH(in2, in5, vec1_m, vec0_m); \
H A Dvp9_fdct16x16_msa.c368 v8i16 in0, in1, in2, in3, in4, in5, in6, in7, in8, in9, in10, in11; local
371 LD_SH8(temp, 16, in0, in1, in2, in3, in4, in5, in6, in7);
374 TRANSPOSE8x8_SH_SH(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in3,
375 in4, in5, in6, in7);
380 FDCT_POSTPROC_2V_NEG_H(in4, in5);
386 BUTTERFLY_16(in0, in1, in2, in3, in4, in5, in6, in7, in8, in9, in10, in11,
396 in4, in5, in6, in7);
400 TRANSPOSE8x8_SH_SH(tmp4, in4, tmp5, in5, tmp6, in6, tmp7, in7, tmp4, in4,
401 tmp5, in5, tmp6, in6, tmp7, in7);
403 ST_SH8(tmp4, in4, tmp5, in5, tmp
[all...]
/external/libvpx/libvpx/vp9/common/mips/msa/
H A Dvp9_idct8x8_msa.c18 v8i16 in0, in1, in2, in3, in4, in5, in6, in7; local
21 LD_SH8(input, 8, in0, in1, in2, in3, in4, in5, in6, in7);
23 TRANSPOSE8x8_SH_SH(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in3,
24 in4, in5, in6, in7);
29 VP9_IDCT8x8_1D(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in3,
30 in4, in5, in6, in7);
32 TRANSPOSE8x8_SH_SH(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2,
33 in3, in4, in5, in6, in7);
34 VP9_IDCT8x8_1D(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in3,
35 in4, in5, in
[all...]
/external/libvpx/libvpx/vpx_dsp/mips/
H A Didct8x8_msa.c15 v8i16 in0, in1, in2, in3, in4, in5, in6, in7; local
18 LD_SH8(input, 8, in0, in1, in2, in3, in4, in5, in6, in7);
21 TRANSPOSE8x8_SH_SH(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in3,
22 in4, in5, in6, in7);
24 VP9_IDCT8x8_1D(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in3,
25 in4, in5, in6, in7);
27 TRANSPOSE8x8_SH_SH(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in3,
28 in4, in5, in6, in7);
30 VP9_IDCT8x8_1D(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in3,
31 in4, in5, in
43 v8i16 in0, in1, in2, in3, in4, in5, in6, in7; local
[all...]
H A Dfwd_txfm_msa.c15 v8i16 in0, in1, in2, in3, in4, in5, in6, in7; local
18 LD_SH8(input, stride, in0, in1, in2, in3, in4, in5, in6, in7);
19 ADD4(in0, in1, in2, in3, in4, in5, in6, in7, in0, in2, in4, in6);
31 v8i16 in0, in1, in2, in3, in4, in5, in6, in7; local
44 LD_SH16(input, src_stride, in0, in1, in2, in3, in4, in5, in6, in7, in8, in9,
47 SLLI_4V(in4, in5, in6, in7, 2);
51 ADD4(in4, in11, in5, in10, in6, in9, in7, in8, tmp4, tmp5, tmp6, tmp7);
56 SUB4(in4, in11, in5, in10, in6, in9, in7, in8, in11, in10, in9, in8);
150 v8i16 in0, in1, in2, in3, in4, in5, in6, in7; local
153 LD_SH8(input, 16, in0, in1, in2, in3, in4, in5, in
216 v8i16 in0, in1, in2, in3, in4, in5, in6, in7; local
251 v8i16 in0, in1, in2, in3, in4, in5, in6, in7; local
[all...]
H A Dfwd_dct32x32_msa.c16 v8i16 in0, in1, in2, in3, in4, in5, in6, in7; local
23 LD_SH4(input + (28 * src_stride), src_stride, in4, in5, in6, in7);
27 SLLI_4V(in4, in5, in6, in7, 2);
30 BUTTERFLY_8(in0, in1, in2, in3, in4, in5, in6, in7, step0, step1, step2,
31 step3, in4, in5, in6, in7);
35 ST_SH4(in4, in5, in6, in7, temp_buff + (28 * 8), 8);
41 LD_SH4(input + (20 * src_stride), src_stride, in4, in5, in6, in7);
45 SLLI_4V(in4, in5, in6, in7, 2);
48 BUTTERFLY_8(in0, in1, in2, in3, in4, in5, in6, in7, step0, step1, step2,
49 step3, in4, in5, in
59 v8i16 in0, in1, in2, in3, in4, in5, in6, in7; local
255 v8i16 in0, in1, in2, in3, in4, in5, in6, in7; local
288 v8i16 in0, in1, in2, in3, in4, in5, in6, in7; local
392 v8i16 in0, in1, in2, in3, in4, in5, in6, in7; local
596 v8i16 in0, in1, in2, in3, in4, in5, in6, in7; local
695 v8i16 in0, in1, in2, in3, in4, in5, in6, in7; local
931 v8i16 in0, in1, in2, in3, in4, in5, in6, in7; local
[all...]
H A Dmacros_msa.h331 #define ST_V8(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, pdst, stride) \
334 ST_V4(RTYPE, in4, in5, in6, in7, (pdst) + 4 * stride, stride); \
488 #define AVER_UB4(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, out0, out1, \
492 AVER_UB2(RTYPE, in4, in5, in6, in7, out2, out3) \
1005 #define ILVL_B4(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, out0, out1, \
1009 ILVL_B2(RTYPE, in4, in5, in6, in7, out2, out3); \
1062 #define ILVR_B4(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, out0, out1, \
1066 ILVR_B2(RTYPE, in4, in5, in6, in7, out2, out3); \
1073 #define ILVR_B8(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, in8, in9, in10, \
1077 ILVR_B4(RTYPE, in0, in1, in2, in3, in4, in5, in
[all...]
H A Dinv_txfm_msa.h18 #define VP9_ADST8(in0, in1, in2, in3, in4, in5, in6, in7, out0, out1, out2, \
47 ILVRL_H2_SH(in2, in5, vec1_m, vec0_m); \
51 cnst2_m, cnst3_m, in5, in2, in6, in1); \
52 BUTTERFLY_4(in7, in0, in2, in5, s1_m, s0_m, in2, in5); \
70 ILVRL_H2_SH(in2, in5, vec1_m, vec0_m); \
214 #define VP9_IDCT8x8_1D(in0, in1, in2, in3, in4, in5, in6, in7, out0, out1, \
227 VP9_MADD(in1, in7, in3, in5, k0_m, k1_m, k2_m, k3_m, in1, in7, in3, in5); \
228 SUB2(in1, in3, in7, in5, res0_
[all...]
H A Dfwd_txfm_msa.h46 #define SRLI_AVE_S_4V_H(in0, in1, in2, in3, in4, in5, in6, in7) \
51 SRLI_H4_SH(in4, in5, in6, in7, vec4_m, vec5_m, vec6_m, vec7_m, 15); \
54 AVE_SH4_SH(vec4_m, in4, vec5_m, in5, vec6_m, in6, vec7_m, in7, in4, in5, \
58 #define VP9_FDCT8(in0, in1, in2, in3, in4, in5, in6, in7, out0, out1, out2, \
67 BUTTERFLY_8(in0, in1, in2, in3, in4, in5, in6, in7, s0_m, s1_m, s2_m, \
118 #define FDCT8x16_EVEN(in0, in1, in2, in3, in4, in5, in6, in7, out0, out1, \
127 BUTTERFLY_8(in0, in1, in2, in3, in4, in5, in6, in7, s0_m, s1_m, s2_m, \
H A Dtxfm_macros_msa.h40 #define DOT_ADD_SUB_SRARI_PCK(in0, in1, in2, in3, in4, in5, in6, in7, dst0, \
46 DOTP_SH4_SW(in0, in1, in0, in1, in4, in4, in5, in5, tp0_m, tp2_m, tp3_m, \
H A Ddeblock_msa.c17 #define VPX_TRANSPOSE8x16_UB_UB(in0, in1, in2, in3, in4, in5, in6, in7, out0, \
25 ILVR_B4_SH(in1, in0, in3, in2, in5, in4, in7, in6, temp0, temp1, temp2, \
31 ILVL_B4_SH(in1, in0, in3, in2, in5, in4, in7, in6, temp0, temp1, temp2, \
74 #define TRANSPOSE12x16_B(in0, in1, in2, in3, in4, in5, in6, in7, in8, in9, \
82 ILVR_B2_SH(in5, in4, in7, in6, temp0, temp1); \
97 ILVL_B2_SH(in5, in4, in7, in6, temp0, temp1); \
99 in5 = (v16u8)__msa_ilvl_d((v2i64)temp6, (v2i64)temp2); \
113 #define VPX_TRANSPOSE12x8_UB_UB(in0, in1, in2, in3, in4, in5, in6, in7, in8, \
121 ILVR_B2_SH(in5, in4, in7, in6, temp0, temp1); \
127 ILVL_B2_SH(in5, in
[all...]
/external/tensorflow/tensorflow/core/kernels/
H A Daggregate_ops_gpu.cu.cc69 typename TTypes<T>::ConstFlat in5) {
70 Add5EigenImpl<GPUDevice, T>::Compute(d, out, in1, in2, in3, in4, in5);
81 typename TTypes<T>::ConstFlat in5,
83 Add6EigenImpl<GPUDevice, T>::Compute(d, out, in1, in2, in3, in4, in5, in6);
94 typename TTypes<T>::ConstFlat in5,
97 Add7EigenImpl<GPUDevice, T>::Compute(d, out, in1, in2, in3, in4, in5, in6,
108 typename TTypes<T>::ConstFlat in5, typename TTypes<T>::ConstFlat in6,
110 Add8EigenImpl<GPUDevice, T>::Compute(d, out, in1, in2, in3, in4, in5, in6,
121 typename TTypes<T>::ConstFlat in5, typename TTypes<T>::ConstFlat in6,
123 Add8pEigenImpl<GPUDevice, T>::Compute(d, out, in1, in2, in3, in4, in5, in
64 operator ()(const GPUDevice& d, typename TTypes<T>::Flat out, typename TTypes<T>::ConstFlat in1, typename TTypes<T>::ConstFlat in2, typename TTypes<T>::ConstFlat in3, typename TTypes<T>::ConstFlat in4, typename TTypes<T>::ConstFlat in5) argument
76 operator ()(const GPUDevice& d, typename TTypes<T>::Flat out, typename TTypes<T>::ConstFlat in1, typename TTypes<T>::ConstFlat in2, typename TTypes<T>::ConstFlat in3, typename TTypes<T>::ConstFlat in4, typename TTypes<T>::ConstFlat in5, typename TTypes<T>::ConstFlat in6) argument
89 operator ()(const GPUDevice& d, typename TTypes<T>::Flat out, typename TTypes<T>::ConstFlat in1, typename TTypes<T>::ConstFlat in2, typename TTypes<T>::ConstFlat in3, typename TTypes<T>::ConstFlat in4, typename TTypes<T>::ConstFlat in5, typename TTypes<T>::ConstFlat in6, typename TTypes<T>::ConstFlat in7) argument
104 operator ()( const GPUDevice& d, typename TTypes<T>::Flat out, typename TTypes<T>::ConstFlat in1, typename TTypes<T>::ConstFlat in2, typename TTypes<T>::ConstFlat in3, typename TTypes<T>::ConstFlat in4, typename TTypes<T>::ConstFlat in5, typename TTypes<T>::ConstFlat in6, typename TTypes<T>::ConstFlat in7, typename TTypes<T>::ConstFlat in8) argument
117 operator ()( const GPUDevice& d, typename TTypes<T>::Flat out, typename TTypes<T>::ConstFlat in1, typename TTypes<T>::ConstFlat in2, typename TTypes<T>::ConstFlat in3, typename TTypes<T>::ConstFlat in4, typename TTypes<T>::ConstFlat in5, typename TTypes<T>::ConstFlat in6, typename TTypes<T>::ConstFlat in7, typename TTypes<T>::ConstFlat in8) argument
130 operator ()( const GPUDevice& d, typename TTypes<T>::Flat out, typename TTypes<T>::ConstFlat in1, typename TTypes<T>::ConstFlat in2, typename TTypes<T>::ConstFlat in3, typename TTypes<T>::ConstFlat in4, typename TTypes<T>::ConstFlat in5, typename TTypes<T>::ConstFlat in6, typename TTypes<T>::ConstFlat in7, typename TTypes<T>::ConstFlat in8, typename TTypes<T>::ConstFlat in9) argument
[all...]
H A Daggregate_ops.h88 typename TTypes<T>::ConstFlat in5);
98 typename TTypes<T>::ConstFlat in5) {
99 out.device(d) = in1 + in2 + in3 + in4 + in5;
110 typename TTypes<T>::ConstFlat in5,
121 typename TTypes<T>::ConstFlat in5,
123 out.device(d) = in1 + in2 + in3 + in4 + in5 + in6;
134 typename TTypes<T>::ConstFlat in5,
146 typename TTypes<T>::ConstFlat in5,
149 out.device(d) = in1 + in2 + in3 + in4 + in5 + in6 + in7;
159 typename TTypes<T>::ConstFlat in5, typenam
93 Compute(const Device& d, typename TTypes<T>::Flat out, typename TTypes<T>::ConstFlat in1, typename TTypes<T>::ConstFlat in2, typename TTypes<T>::ConstFlat in3, typename TTypes<T>::ConstFlat in4, typename TTypes<T>::ConstFlat in5) argument
116 Compute(const Device& d, typename TTypes<T>::Flat out, typename TTypes<T>::ConstFlat in1, typename TTypes<T>::ConstFlat in2, typename TTypes<T>::ConstFlat in3, typename TTypes<T>::ConstFlat in4, typename TTypes<T>::ConstFlat in5, typename TTypes<T>::ConstFlat in6) argument
141 Compute(const Device& d, typename TTypes<T>::Flat out, typename TTypes<T>::ConstFlat in1, typename TTypes<T>::ConstFlat in2, typename TTypes<T>::ConstFlat in3, typename TTypes<T>::ConstFlat in4, typename TTypes<T>::ConstFlat in5, typename TTypes<T>::ConstFlat in6, typename TTypes<T>::ConstFlat in7) argument
165 Compute( const Device& d, typename TTypes<T>::Flat out, typename TTypes<T>::ConstFlat in1, typename TTypes<T>::ConstFlat in2, typename TTypes<T>::ConstFlat in3, typename TTypes<T>::ConstFlat in4, typename TTypes<T>::ConstFlat in5, typename TTypes<T>::ConstFlat in6, typename TTypes<T>::ConstFlat in7, typename TTypes<T>::ConstFlat in8) argument
189 Compute( const Device& d, typename TTypes<T>::Flat out, typename TTypes<T>::ConstFlat in1, typename TTypes<T>::ConstFlat in2, typename TTypes<T>::ConstFlat in3, typename TTypes<T>::ConstFlat in4, typename TTypes<T>::ConstFlat in5, typename TTypes<T>::ConstFlat in6, typename TTypes<T>::ConstFlat in7, typename TTypes<T>::ConstFlat in8) argument
212 Compute( const Device& d, typename TTypes<T>::Flat out, typename TTypes<T>::ConstFlat in1, typename TTypes<T>::ConstFlat in2, typename TTypes<T>::ConstFlat in3, typename TTypes<T>::ConstFlat in4, typename TTypes<T>::ConstFlat in5, typename TTypes<T>::ConstFlat in6, typename TTypes<T>::ConstFlat in7, typename TTypes<T>::ConstFlat in8, typename TTypes<T>::ConstFlat in9) argument
[all...]
H A Daggregate_ops_cpu.h69 typename TTypes<T>::ConstFlat in5) {
70 Add5EigenImpl<CPUDevice, T>::Compute(d, out, in1, in2, in3, in4, in5);
80 typename TTypes<T>::ConstFlat in5,
82 Add6EigenImpl<CPUDevice, T>::Compute(d, out, in1, in2, in3, in4, in5, in6);
92 typename TTypes<T>::ConstFlat in5,
95 Add7EigenImpl<CPUDevice, T>::Compute(d, out, in1, in2, in3, in4, in5, in6,
106 typename TTypes<T>::ConstFlat in5, typename TTypes<T>::ConstFlat in6,
108 Add8EigenImpl<CPUDevice, T>::Compute(d, out, in1, in2, in3, in4, in5, in6,
119 typename TTypes<T>::ConstFlat in5, typename TTypes<T>::ConstFlat in6,
121 Add8pEigenImpl<CPUDevice, T>::Compute(d, out, in1, in2, in3, in4, in5, in
64 operator ()(const CPUDevice& d, typename TTypes<T>::Flat out, typename TTypes<T>::ConstFlat in1, typename TTypes<T>::ConstFlat in2, typename TTypes<T>::ConstFlat in3, typename TTypes<T>::ConstFlat in4, typename TTypes<T>::ConstFlat in5) argument
75 operator ()(const CPUDevice& d, typename TTypes<T>::Flat out, typename TTypes<T>::ConstFlat in1, typename TTypes<T>::ConstFlat in2, typename TTypes<T>::ConstFlat in3, typename TTypes<T>::ConstFlat in4, typename TTypes<T>::ConstFlat in5, typename TTypes<T>::ConstFlat in6) argument
87 operator ()(const CPUDevice& d, typename TTypes<T>::Flat out, typename TTypes<T>::ConstFlat in1, typename TTypes<T>::ConstFlat in2, typename TTypes<T>::ConstFlat in3, typename TTypes<T>::ConstFlat in4, typename TTypes<T>::ConstFlat in5, typename TTypes<T>::ConstFlat in6, typename TTypes<T>::ConstFlat in7) argument
102 operator ()( const CPUDevice& d, typename TTypes<T>::Flat out, typename TTypes<T>::ConstFlat in1, typename TTypes<T>::ConstFlat in2, typename TTypes<T>::ConstFlat in3, typename TTypes<T>::ConstFlat in4, typename TTypes<T>::ConstFlat in5, typename TTypes<T>::ConstFlat in6, typename TTypes<T>::ConstFlat in7, typename TTypes<T>::ConstFlat in8) argument
115 operator ()( const CPUDevice& d, typename TTypes<T>::Flat out, typename TTypes<T>::ConstFlat in1, typename TTypes<T>::ConstFlat in2, typename TTypes<T>::ConstFlat in3, typename TTypes<T>::ConstFlat in4, typename TTypes<T>::ConstFlat in5, typename TTypes<T>::ConstFlat in6, typename TTypes<T>::ConstFlat in7, typename TTypes<T>::ConstFlat in8) argument
128 operator ()( const CPUDevice& d, typename TTypes<T>::Flat out, typename TTypes<T>::ConstFlat in1, typename TTypes<T>::ConstFlat in2, typename TTypes<T>::ConstFlat in3, typename TTypes<T>::ConstFlat in4, typename TTypes<T>::ConstFlat in5, typename TTypes<T>::ConstFlat in6, typename TTypes<T>::ConstFlat in7, typename TTypes<T>::ConstFlat in8, typename TTypes<T>::ConstFlat in9) argument
172 operator ()(const SYCLDevice& d, typename TTypes<T>::Flat out, typename TTypes<T>::ConstFlat in1, typename TTypes<T>::ConstFlat in2, typename TTypes<T>::ConstFlat in3, typename TTypes<T>::ConstFlat in4, typename TTypes<T>::ConstFlat in5) argument
183 operator ()(const SYCLDevice& d, typename TTypes<T>::Flat out, typename TTypes<T>::ConstFlat in1, typename TTypes<T>::ConstFlat in2, typename TTypes<T>::ConstFlat in3, typename TTypes<T>::ConstFlat in4, typename TTypes<T>::ConstFlat in5, typename TTypes<T>::ConstFlat in6) argument
195 operator ()(const SYCLDevice& d, typename TTypes<T>::Flat out, typename TTypes<T>::ConstFlat in1, typename TTypes<T>::ConstFlat in2, typename TTypes<T>::ConstFlat in3, typename TTypes<T>::ConstFlat in4, typename TTypes<T>::ConstFlat in5, typename TTypes<T>::ConstFlat in6, typename TTypes<T>::ConstFlat in7) argument
210 operator ()( const SYCLDevice& d, typename TTypes<T>::Flat out, typename TTypes<T>::ConstFlat in1, typename TTypes<T>::ConstFlat in2, typename TTypes<T>::ConstFlat in3, typename TTypes<T>::ConstFlat in4, typename TTypes<T>::ConstFlat in5, typename TTypes<T>::ConstFlat in6, typename TTypes<T>::ConstFlat in7, typename TTypes<T>::ConstFlat in8) argument
223 operator ()( const SYCLDevice& d, typename TTypes<T>::Flat out, typename TTypes<T>::ConstFlat in1, typename TTypes<T>::ConstFlat in2, typename TTypes<T>::ConstFlat in3, typename TTypes<T>::ConstFlat in4, typename TTypes<T>::ConstFlat in5, typename TTypes<T>::ConstFlat in6, typename TTypes<T>::ConstFlat in7, typename TTypes<T>::ConstFlat in8) argument
236 operator ()( const SYCLDevice& d, typename TTypes<T>::Flat out, typename TTypes<T>::ConstFlat in1, typename TTypes<T>::ConstFlat in2, typename TTypes<T>::ConstFlat in3, typename TTypes<T>::ConstFlat in4, typename TTypes<T>::ConstFlat in5, typename TTypes<T>::ConstFlat in6, typename TTypes<T>::ConstFlat in7, typename TTypes<T>::ConstFlat in8, typename TTypes<T>::ConstFlat in9) argument
[all...]
/external/libvpx/libvpx/vp9/encoder/x86/
H A Dvp9_dct_ssse3.c49 __m128i in5 = _mm_load_si128((const __m128i *)(input + 5 * stride)); local
64 in5 = _mm_slli_epi16(in5, 2);
73 in[5] = &in5;
87 const __m128i q2 = _mm_add_epi16(in2, in5);
90 const __m128i q5 = _mm_sub_epi16(in2, in5);
239 in5 = _mm_unpackhi_epi64(tr1_1, tr1_5);
262 const __m128i sign_in5 = _mm_srai_epi16(in5, 15);
270 in5 = _mm_sub_epi16(in5, sign_in
[all...]
H A Dvp9_dct_intrin_sse2.c212 __m128i in5 = _mm_load_si128((const __m128i *)(input + 5 * stride)); local
227 in5 = _mm_slli_epi16(in5, 2);
236 in[5] = &in5;
250 const __m128i q2 = _mm_add_epi16(in2, in5);
253 const __m128i q5 = _mm_sub_epi16(in2, in5);
408 in5 = _mm_unpackhi_epi64(tr1_1, tr1_5);
431 const __m128i sign_in5 = _mm_srai_epi16(in5, 15);
439 in5 = _mm_sub_epi16(in5, sign_in
872 __m128i in0, in1, in2, in3, in4, in5, in6, in7; local
[all...]
/external/webp/src/dsp/
H A Dmsa_macro.h310 #define ST_B8(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, \
313 ST_B4(RTYPE, in4, in5, in6, in7, pdst + 4 * stride, stride); \
873 #define ILVR_B4(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, \
876 ILVR_B2(RTYPE, in4, in5, in6, in7, out2, out3); \
899 #define ILVR_H4(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, \
902 ILVR_H2(RTYPE, in4, in5, in6, in7, out2, out3); \
923 #define ILVR_D4(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, \
926 ILVR_D2(RTYPE, in4, in5, in6, in7, out2, out3); \
984 #define PCKEV_B4(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, \
987 PCKEV_B2(RTYPE, in4, in5, in
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/external/libvpx/libvpx/vp8/common/mips/msa/
H A Dvp8_macros_msa.h360 #define ST_B8(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, pdst, stride) \
363 ST_B4(RTYPE, in4, in5, in6, in7, (pdst) + 4 * stride, stride); \
558 #define VSHF_B3(RTYPE, in0, in1, in2, in3, in4, in5, mask0, mask1, mask2, \
562 out2 = (RTYPE)__msa_vshf_b((v16i8)mask2, (v16i8)in5, (v16i8)in4); \
953 #define ILVL_B4(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, out0, out1, \
957 ILVL_B2(RTYPE, in4, in5, in6, in7, out2, out3); \
1008 #define ILVR_B4(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, out0, out1, \
1012 ILVR_B2(RTYPE, in4, in5, in6, in7, out2, out3); \
1035 #define ILVR_H4(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, out0, out1, \
1039 ILVR_H2(RTYPE, in4, in5, in
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/external/boringssl/src/crypto/fipsmodule/aes/asm/
H A Daesp8-ppc.pl672 my ($in0, $in1, $in2, $in3, $in4, $in5, $in6, $in7 )=map("v$_",(0..3,10..13));
783 lvx_u $in5,$x50,$inp
791 le?vperm $in5,$in5,$in5,$inpperm
796 vxor $out5,$in5,$rndkey0
903 vxor $in5,$in5,v31
921 vncipherlast $out6,$out6,$in5
923 lvx_u $in5,
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/external/libvpx/libvpx/vpx_dsp/x86/
H A Dfwd_txfm_impl_sse2.h282 __m128i in5 = _mm_load_si128((const __m128i *)(input + 5 * stride)); local
291 in5 = _mm_slli_epi16(in5, 2);
305 const __m128i q2 = ADD_EPI16(in2, in5);
308 const __m128i q5 = SUB_EPI16(in2, in5);
514 in5 = _mm_unpackhi_epi64(tr1_1, tr1_5);
537 const __m128i sign_in5 = _mm_srai_epi16(in5, 15);
545 in5 = _mm_sub_epi16(in5, sign_in5);
553 in5
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/external/libvpx/libvpx/vpx_dsp/ppc/
H A Dinv_txfm_vsx.c159 #define TRANSPOSE8x8(in0, in1, in2, in3, in4, in5, in6, in7, out0, out1, out2, \
165 out4 = vec_mergeh(in4, in5); \
166 out5 = vec_mergel(in4, in5); \
174 in5 = (int16x8_t)vec_mergel((int32x4_t)out4, (int32x4_t)out6); \
179 out2 = vec_perm(in1, in5, tr8_mask0); \
180 out3 = vec_perm(in1, in5, tr8_mask1); \
218 #define IDCT8(in0, in1, in2, in3, in4, in5, in6, in7) \
226 STEP8_0(in5, in3, step5, step6, cospi12_v, cospi20_v); \
232 in5 = vec_sub(step4, step5); \
242 STEP8_1(in6, in5, step
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/external/libjpeg-turbo/simd/
H A Djquanti-altivec.c57 __vector unsigned char in0, in1, in2, in3, in4, in5, in6, in7; local
78 out5 = (__vector short)VEC_UNPACKHU(in5);
/external/libpng/mips/
H A Dfilter_msa_intrinsics.c285 #define ADD3(in0, in1, in2, in3, in4, in5, \
289 out2 = in4 + in5; \
291 #define ADD4(in0, in1, in2, in3, in4, in5, in6, in7, \
295 ADD2(in4, in5, in6, in7, out2, out3); \
/external/libvpx/libvpx/vpx_dsp/arm/
H A Didct32x32_135_add_neon.c23 int16x8_t *const in5, int16x8_t *const in6,
35 *in5 = load_tran_low_to_s16q(input);
45 int16x4_t *const in5, int16x4_t *const in6,
57 *in5 = load_tran_low_to_s16d(input);
20 load_8x8_s16(const tran_low_t *input, int16x8_t *const in0, int16x8_t *const in1, int16x8_t *const in2, int16x8_t *const in3, int16x8_t *const in4, int16x8_t *const in5, int16x8_t *const in6, int16x8_t *const in7) argument
42 load_4x8_s16(const tran_low_t *input, int16x4_t *const in0, int16x4_t *const in1, int16x4_t *const in2, int16x4_t *const in3, int16x4_t *const in4, int16x4_t *const in5, int16x4_t *const in6, int16x4_t *const in7) argument

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