| /art/runtime/interpreter/mterp/arm/ |
| H A D | op_return_void_no_barrier.S | 1 ldr lr, [rSELF, #THREAD_FLAGS_OFFSET]
3 ands lr, #THREAD_SUSPEND_OR_CHECKPOINT_REQUEST
|
| H A D | op_return_void.S | 3 ldr lr, [rSELF, #THREAD_FLAGS_OFFSET]
5 ands lr, #THREAD_SUSPEND_OR_CHECKPOINT_REQUEST
|
| H A D | op_return.S | 9 ldr lr, [rSELF, #THREAD_FLAGS_OFFSET]
11 ands lr, #THREAD_SUSPEND_OR_CHECKPOINT_REQUEST
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| H A D | op_return_wide.S | 7 ldr lr, [rSELF, #THREAD_FLAGS_OFFSET]
9 ands lr, #THREAD_SUSPEND_OR_CHECKPOINT_REQUEST
|
| H A D | op_mul_long.S | 28 umull r1, lr, r2, r0 @ r1/lr <- ZxX
31 add r2, r2, lr @ r2<- lr + low(ZxW + (YxX))
|
| H A D | op_move_wide_16.S | 6 VREG_INDEX_TO_ADDR lr, r2 @ r2<- &fp[AAAA]
10 stmia lr, {r0-r1} @ fp[AAAA]<- r0/r1
|
| H A D | op_mul_long_2addr.S | 17 umull r1, lr, r2, r0 @ r1/lr <- ZxX
21 add r2, r2, lr @ r2<- r2 + low(ZxW + (YxX))
|
| H A D | alt_stub.S | 8 adrl lr, artMterpAsmInstructionStart + (${opnum} * 128) @ Addr of primary handler.
|
| H A D | op_sget_wide.S | 15 VREG_INDEX_TO_ADDR lr, r9 @ r9<- &fp[AA]
20 stmia lr, {r0-r1} @ vAA/vAA+1<- r0/r1
|
| H A D | funopWider.S | 14 CLEAR_SHADOW_PAIR r9, ip, lr @ Zero shadow regs
|
| H A D | op_const_wide_16.S | 6 CLEAR_SHADOW_PAIR r3, r2, lr @ Zero out the shadow regs
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| H A D | op_move_result_wide.S | 6 CLEAR_SHADOW_PAIR rINST, ip, lr @ Zero out the shadow regs
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| H A D | op_move_wide_from16.S | 8 CLEAR_SHADOW_PAIR rINST, ip, lr @ Zero out the shadow regs
|
| H A D | op_float_to_long.S | 25 bx lr @ return
31 bx lr @ return 0 for NaN
|
| H A D | entry.S | 33 stmfd sp!, {r3-r10,fp,lr} @ save 10 regs, (r3 just to align 64)
44 .cfi_rel_offset lr, 36
|
| H A D | fbinopWide.S | 19 CLEAR_SHADOW_PAIR r9, ip, lr @ Zero shadow regs
|
| H A D | op_const_wide_32.S | 7 CLEAR_SHADOW_PAIR r3, r2, lr @ Zero out the shadow regs
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| H A D | op_move_wide.S | 8 CLEAR_SHADOW_PAIR rINST, ip, lr @ Zero out the shadow regs
|
| H A D | unopWide.S | 15 CLEAR_SHADOW_PAIR rINST, ip, lr @ Zero shadow regs
|
| /art/runtime/arch/arm/ |
| H A D | memcmp16_arm.S | 39 bxeq lr
61 bxne lr
64 bx lr
68 0: push {r4, lr}
71 .cfi_rel_offset lr, 4
82 popne {r4, lr}
83 bxne lr
109 ldr lr, [r1, #4]!
113 eorseq r0, r0, lr
115 ldreq lr, [r
[all...] |
| H A D | jni_entrypoints_arm.S | 24 push {r0, r1, r2, r3, lr} @ spill regs
30 .cfi_rel_offset lr, 16
38 pop {r0, r1, r2, r3, lr} @ restore regs
44 .cfi_restore lr
|
| H A D | instruction_set_features_assembly_tests.S | 41 bx lr
64 bx lr
|
| H A D | quick_entrypoints_arm.S | 31 push {r4-r11, lr} @ 9 words (36 bytes) of callee saves.
41 .cfi_rel_offset lr, 32
74 push {r5-r8, r10-r11, lr} @ 7 words of callee saves
82 .cfi_rel_offset lr, 24
103 pop {r5-r8, r10-r11, lr} @ 7 words of callee saves
110 .cfi_restore lr
122 push {r1-r3, r5-r8, r10-r11, lr} @ 10 words of callee saves and args.
133 .cfi_rel_offset lr, 36
167 pop {r1-r3, r5-r8, r10-r11, lr} @ 10 words of callee saves
177 .cfi_restore lr
[all...] |
| /art/runtime/interpreter/mterp/arm64/ |
| H A D | alt_stub.S | 8 adr lr, artMterpAsmInstructionStart + (${opnum} * 128) // Addr of primary handler.
|
| /art/runtime/interpreter/mterp/out/ |
| H A D | mterp_arm64.S | 53 r30 : (lr) is reserved (the link register).
394 SAVE_TWO_REGS fp, lr, 64
7231 ldr lr, [xSELF, #THREAD_FLAGS_OFFSET]
7235 ands lr, lr, #THREAD_SUSPEND_OR_CHECKPOINT_REQUEST
7305 * still needs to get the opcode and branch to it, and flags are in lr.
7374 RESTORE_TWO_REGS fp, lr, 64
7392 RESTORE_TWO_REGS fp, lr, 64
7416 adr lr, artMterpAsmInstructionStart + (0 * 128) // Addr of primary handler.
7433 adr lr, artMterpAsmInstructionStar
[all...] |