Searched defs:NZCV (Results 1 - 5 of 5) sorted by relevance
/external/vixl/tools/test_generator/ |
H A D | data_types.py | 408 class NZCV(U32): class in inherits:U32 410 Description of NZCV flags as inputs to an instruction. 413 and record the NZCV flags before and after emitting the instruction under 418 # When setting the `NZCV` flags, we need to make sure we do not override the 428 // Set the `NZCV` and `Q` flags together. 441 // Only record the NZCV bits. 458 # When clearing or setting the `Q` bit, we need to make sure the `NZCV` 465 // Save the `NZCV` flags. 468 // Set the `NZCV` and `Q` flags together.
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64ConditionalCompares.cpp | 63 STATISTIC(NumMultNZCVUses, "Number of ccmps rejected (NZCV used)"); 64 STATISTIC(NumUnknNZCVDefs, "Number of ccmps rejected (NZCV def unknown)"); 99 // operand that specifies the NZCV flag values when the condition is false and 300 if (!I->readsRegister(AArch64::NZCV)) { 351 MIOperands(*I).analyzePhysReg(AArch64::NZCV, TRI); 379 // Reject any live-in physregs. It's probably NZCV/EFLAGS, and very hard to 422 if (&I != CmpMI && I.modifiesRegister(AArch64::NZCV, TRI)) { 643 // The NZCV immediate operand should provide flags for the case where Head 646 unsigned NZCV = AArch64CC::getNZCVToSatisfyCondCode(CmpBBTailCC); local 660 MIB.addImm(NZCV) [all...] |
H A D | AArch64ISelLowering.cpp | 199 // Add/Sub overflow ops with MVT::Glues are lowered to NZCV dependences. 1008 TrueBB->addLiveIn(AArch64::NZCV); 1009 EndBB->addLiveIn(AArch64::NZCV); 1169 /// without a real NZCV register, so we have to use less efficient combinations 1257 /// a comparison. They set the NZCV flags to a predefined value if their 1321 unsigned NZCV = AArch64CC::getNZCVToSatisfyCondCode(InvOutCC); local 1322 SDValue NZCVOp = DAG.getConstant(NZCV, DL, MVT::i32); 1383 /// and conditional compare operations. @returns an NZCV flags producing node 1387 /// effects pushed to the tree leafs; @p Predicate is an NZCV flag predicate 3453 // trashed: X0 (it takes an argument), LR (it's a call) and NZCV (le [all...] |
/external/v8/src/arm64/ |
H A D | constants-arm64.h | 205 /* NZCV */ \ 211 M_(NZCV, Flags_mask) \ 376 NZCV = ((0x1 << SysO0_offset) | enumerator in enum:v8::internal::SystemRegister
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/external/vixl/src/aarch64/ |
H A D | constants-aarch64.h | 174 /* NZCV */ \ 180 M_(NZCV, Flags_mask) \ 357 NZCV = SystemRegisterEncoder<3, 3, 4, 2, 0>::value, enumerator in enum:vixl::aarch64::SystemRegister
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