Searched defs:Src0 (Results 1 - 25 of 31) sorted by relevance

12

/external/llvm/lib/Target/AArch64/
H A DAArch64AdvSIMDScalarPass.cpp306 unsigned Src0 = 0, SubReg0; local
317 Src0 = MOSrc0->getReg();
319 // Src0 is going to be reused, thus, it cannot be killed anymore.
338 // Src0 is going to be reused, thus, it cannot be killed anymore.
349 if (!Src0) {
351 Src0 = MRI->createVirtualRegister(&AArch64::FPR64RegClass);
352 insertCopy(TII, MI, Src0, OrigSrc0, KillSrc0);
371 .addReg(Src0, getKillRegState(KillSrc0), SubReg0)
H A DAArch64FastISel.cpp4514 const Value *Src0 = I->getOperand(0); local
4516 if (const auto *C = dyn_cast<ConstantInt>(Src0))
4518 std::swap(Src0, Src1);
4526 if (const auto *ZExt = dyn_cast<ZExtInst>(Src0)) {
4532 Src0 = ZExt->getOperand(0);
4535 } else if (const auto *SExt = dyn_cast<SExtInst>(Src0)) {
4541 Src0 = SExt->getOperand(0);
4546 unsigned Src0Reg = getRegForValue(Src0);
4549 bool Src0IsKill = hasTrivialKill(Src0);
4779 // (Src0 <
[all...]
/external/llvm/lib/Target/AMDGPU/
H A DR600ExpandSpecialInstrs.cpp222 unsigned Src0 = BMI->getOperand( local
228 (void) Src0;
230 if ((TRI.getEncodingValue(Src0) & 0xff) < 127 &&
232 assert(TRI.getHWRegChan(Src0) == TRI.getHWRegChan(Src1));
274 unsigned Src0 = MI.getOperand( local
287 Src0 = TRI.getSubReg(Src0, SubRegIndex);
293 Src1 = TRI.getSubReg(Src0, SubRegIndex1);
294 Src0 = TRI.getSubReg(Src0, SubRegIndex
[all...]
H A DSIShrinkInstructions.cpp139 MachineOperand &Src0 = MI.getOperand(Src0Idx); local
143 if (Src0.isImm() &&
144 TII->isLiteralConstant(Src0, TII->getOpSize(MI, Src0Idx)))
147 // Literal constants and SGPRs can only be used in Src0, so if Src0 is an
150 if (Src0.isReg() && !isVGPR(&Src0, TRI, MRI))
153 // Try to fold Src0
154 if (Src0.isReg() && MRI.hasOneUse(Src0
276 const MachineOperand &Src0 = MI.getOperand(1); local
[all...]
H A DAMDGPUPromoteAlloca.cpp729 Value *Src0 = CI->getOperand(0); local
730 Type *EltTy = Src0->getType()->getPointerElementType();
H A DSIInstrInfo.cpp889 unsigned Src0 = MI.getOperand(1).getReg(); local
894 .addReg(RI.getSubReg(Src0, AMDGPU::sub0))
899 .addReg(RI.getSubReg(Src0, AMDGPU::sub1))
954 MachineOperand &Src0 = MI.getOperand(Src0Idx); local
955 if (!Src0.isReg())
978 if (!isLegalRegOperand(MRI, InstrDesc.OpInfo[Src1Idx], Src0))
1007 unsigned Reg = Src0.getReg();
1008 unsigned SubReg = Src0.getSubReg();
1010 Src0.ChangeToImmediate(Src1.getImm());
1239 MachineOperand *Src0
[all...]
H A DAMDGPUISelLowering.cpp2150 static SDValue constantFoldBFE(SelectionDAG &DAG, IntTy Src0, uint32_t Offset, argument
2153 uint32_t Shl = static_cast<uint32_t>(Src0) << (32 - Offset - Width);
2158 return DAG.getConstant(Src0 >> Offset, DL, MVT::i32);
H A DSIISelLowering.cpp1909 SDValue Src0 = Param->isAllOnesValue() ? Numerator : Denominator; local
1911 return DAG.getNode(AMDGPUISD::DIV_SCALE, DL, Op->getVTList(), Src0,
/external/swiftshader/third_party/subzero/src/
H A DIceInstMIPS32.cpp165 auto *Src0 = llvm::cast<Constant>(getSrc(0)); local
166 if (auto *CR = llvm::dyn_cast<ConstantRelocatable>(Src0)) {
172 Src0->emit(Func);
183 const CfgNode *TargetFalse, Operand *Src0,
187 addSource(Src0);
191 const CfgNode *TargetFalse, Operand *Src0,
196 addSource(Src0);
182 InstMIPS32Br(Cfg *Func, const CfgNode *TargetTrue, const CfgNode *TargetFalse, Operand *Src0, const InstMIPS32Label *Label, CondMIPS32::Cond Cond) argument
190 InstMIPS32Br(Cfg *Func, const CfgNode *TargetTrue, const CfgNode *TargetFalse, Operand *Src0, Operand *Src1, const InstMIPS32Label *Label, CondMIPS32::Cond Cond) argument
H A DIceConverter.cpp346 Ice::Operand *Src0 = convertOperand(Instr, 0); local
349 return Ice::InstArithmetic::create(Func.get(), Opcode, Dest, Src0, Src1);
406 Ice::Operand *Src0 = convertOperand(Instr, 0); local
446 return Ice::InstIcmp::create(Func.get(), Cond, Dest, Src0, Src1);
450 Ice::Operand *Src0 = convertOperand(Instr, 0); local
510 return Ice::InstFcmp::create(Func.get(), Cond, Dest, Src0, Src1);
H A DIceInstX86BaseImpl.h253 InstImpl<TraitsType>::InstX86Icmp::InstX86Icmp(Cfg *Func, Operand *Src0, argument
256 this->addSource(Src0);
261 InstImpl<TraitsType>::InstX86Ucomiss::InstX86Ucomiss(Cfg *Func, Operand *Src0, argument
264 this->addSource(Src0);
959 const Cfg *Func, Type DispatchTy, const Variable *Dest, const Operand *Src0,
967 if (const auto *SrcVar = llvm::dyn_cast<Variable>(Src0)) {
975 } else if (const auto *Mem = llvm::dyn_cast<X86OperandMem>(Src0)) {
1290 Operand *Src0 = this->getSrc(0); local
1292 const auto SrcReg = llvm::cast<Variable>(Src0)->getRegNum();
1295 switch (Src0
958 emitIASThreeOpImmOps( const Cfg *Func, Type DispatchTy, const Variable *Dest, const Operand *Src0, const Operand *Src1, const ThreeOpImmEmitter<DReg_t, SReg_t> Emitter) argument
1331 Operand *Src0 = this->getSrc(0); local
[all...]
H A DIceTargetLowering.cpp955 Variable *Dest, Operand *Src0,
958 Dest, [this, Kind](Variable *Dest, Operand *Src0, Operand *Src1) {
959 return Context.insert<InstArithmetic>(Kind, Dest, Src0, Src1);
960 }, Src0, Src1);
954 scalarizeArithmetic(InstArithmetic::OpKind Kind, Variable *Dest, Operand *Src0, Operand *Src1) argument
H A DIceTargetLowering.h504 Operand *Src0, Operand *Src1);
509 /// (Variable *Dest, Variable *Src0, Variable *Src1) -> Instr *.
566 auto *Src0 = thunk0(); local
567 return insertScalarInstruction(Res, Src0);
575 auto *Src0 = thunk0(); local
577 return insertScalarInstruction(Res, Src0, Src1);
585 auto *Src0 = thunk0(); local
588 return insertScalarInstruction(Res, Src0, Src1, Src2);
H A DIceCfg.cpp1336 const CfgVector<const Inst *> &Insts, Variable **Src0,
1340 *Src0 = nullptr;
1375 if (*Src0 == nullptr) {
1376 // No sources yet. Save Src to Src0.
1377 *Src0 = Src;
1380 // Src0 is not Src.
1381 if (*Src0 != Src) {
1384 } else if (Src != *Src0 && Src != *Src1) {
1397 assert(*Src0 != nullptr);
1399 // If a second source was not seen, then we just make Src1 = Src0 t
1335 findAllExtracts(Cfg *Func, GlobalContext *Ctx, VariablesMetadata *VM, const CfgVector<const Inst *> &Insts, Variable **Src0, Variable **Src1, CfgVector<const Inst *> *Extracts) argument
1464 Variable *Src0; local
[all...]
H A DIceInst.h982 static InstShuffleVector *create(Cfg *Func, Variable *Dest, Operand *Src0, argument
985 InstShuffleVector(Func, Dest, Src0, Src1);
1048 InstShuffleVector(Cfg *Func, Variable *Dest, Operand *Src0, Operand *Src1);
H A DIceInstARM32.cpp1168 const Operand *Src0 = getSrc(0); local
1170 Type SrcTy = Src0->getType();
1184 Asm->vqmovn2(typeElementType(DestTy), Dest, Src0, Src1, Unsigned, local
1190 Asm->vqmovn2(typeElementType(DestTy), Dest, Src0, Src1, Unsigned, local
1196 Asm->vqmovn2(typeElementType(DestTy), Dest, Src0, Src1, Unsigned, local
1207 const Operand *Src0 = getSrc(0); local
1208 Type SrcTy = Src0->getType();
1233 const Operand *Src0 = getSrc(0); local
1235 Type SrcTy = Src0->getType();
1241 Asm->vmlap(typeElementType(SrcTy), Dest, Src0, Src local
1249 const Operand *Src0 = getSrc(0); local
1252 Asm->vzip(typeElementType(DestTy), Dest, Src0, Src1); local
1522 InstARM32Umull(Cfg *Func, Variable *DestLo, Variable *DestHi, Variable *Src0, Variable *Src1, CondARM32::Cond Predicate) argument
1801 InstARM32Vcmp(Cfg *Func, Variable *Src0, Operand *Src1, CondARM32::Cond Predicate) argument
1979 Operand *Src0 = getSrc(0); local
2030 Operand *Src0 = getSrc(0); local
2514 auto *Src0 = llvm::cast<Constant>(getSrc(0)); local
2775 const Operand *Src0 = getSrc(0); local
2801 Asm->vst1qr(getVecElmtBitsize(Ty), Src0, Src1, Func->getTarget()); local
2836 const Operand *Src0 = getSrc(0); local
2887 const Operand *Src0 = getSrc(0); local
3127 const Operand *Src0 = getSrc(0); local
[all...]
H A DIceInstARM32.h746 Variable *Src0, Operand *Src1,
750 InstARM32ThreeAddrGPR(Func, Dest, Src0, Src1, Predicate, SetFlags);
771 InstARM32ThreeAddrGPR(Cfg *Func, Variable *Dest, Variable *Src0, argument
775 addSource(Src0);
796 static InstARM32ThreeAddrFP *create(Cfg *Func, Variable *Dest, Variable *Src0, argument
799 InstARM32ThreeAddrFP(Func, Dest, Src0, Src1);
822 InstARM32ThreeAddrFP(Cfg *Func, Variable *Dest, Variable *Src0, Operand *Src1) argument
824 addSource(Src0);
847 Variable *Src0, Variable *Src1) {
849 InstARM32ThreeAddrSignAwareFP(Func, Dest, Src0, Src
745 create(Cfg *Func, Variable *Dest, Variable *Src0, Operand *Src1, CondARM32::Cond Predicate, bool SetFlags = false) argument
846 create(Cfg *Func, Variable *Dest, Variable *Src0, Variable *Src1) argument
853 create(Cfg *Func, Variable *Dest, Variable *Src0, ConstantInteger32 *Src1) argument
862 InstARM32ThreeAddrSignAwareFP(Cfg *Func, Variable *Dest, Variable *Src0, Operand *Src1) argument
876 create(Cfg *Func, Variable *Dest, Variable *Src0, Variable *Src1, Variable *Src2, CondARM32::Cond Predicate) argument
901 InstARM32FourAddrGPR(Cfg *Func, Variable *Dest, Variable *Src0, Variable *Src1, Variable *Src2, CondARM32::Cond Predicate) argument
926 create(Cfg *Func, Variable *Dest, Variable *Src0, Variable *Src1) argument
951 InstARM32FourAddrFP(Cfg *Func, Variable *Dest, Variable *Src0, Variable *Src1) argument
970 create(Cfg *Func, Variable *Src0, Operand *Src1, CondARM32::Cond Predicate) argument
992 InstARM32CmpLike(Cfg *Func, Variable *Src0, Operand *Src1, CondARM32::Cond Predicate) argument
1438 create(Cfg *Func, Variable *DestLo, Variable *DestHi, Variable *Src0, Variable *Src1, CondARM32::Cond Predicate) argument
1546 create(Cfg *Func, Variable *Dest, Variable *Src0, uint32_t Index, CondARM32::Cond Predicate) argument
1556 InstARM32Extract(Cfg *Func, Variable *Dest, Variable *Src0, uint32_t Index, CondARM32::Cond Predicate) argument
1575 create(Cfg *Func, Variable *Dest, Variable *Src0, uint32_t Index, CondARM32::Cond Predicate) argument
1585 InstARM32Insert(Cfg *Func, Variable *Dest, Variable *Src0, uint32_t Index, CondARM32::Cond Predicate) argument
1602 create(Cfg *Func, Variable *Src0, Variable *Src1, CondARM32::Cond Predicate) argument
1607 create(Cfg *Func, Variable *Src0, OperandARM32FlexFpZero *Src1, CondARM32::Cond Predicate) argument
[all...]
H A DIceInstMIPS32.h409 Variable *Src0) {
411 InstMIPS32TwoAddrFPR(Func, Dest, Src0);
436 InstMIPS32TwoAddrFPR(Cfg *Func, Variable *Dest, Variable *Src0) argument
438 addSource(Src0);
453 Variable *Src0) {
455 InstMIPS32TwoAddrGPR(Func, Dest, Src0);
480 InstMIPS32TwoAddrGPR(Cfg *Func, Variable *Dest, Variable *Src0) argument
482 addSource(Src0);
500 Variable *Src0, Variable *Src1) {
502 InstMIPS32ThreeAddrFPR(Func, Dest, Src0, Src
408 create(Cfg *Func, Variable *Dest, Variable *Src0) argument
452 create(Cfg *Func, Variable *Dest, Variable *Src0) argument
499 create(Cfg *Func, Variable *Dest, Variable *Src0, Variable *Src1) argument
527 InstMIPS32ThreeAddrFPR(Cfg *Func, Variable *Dest, Variable *Src0, Variable *Src1) argument
548 create(Cfg *Func, Variable *Dest, Variable *Src0, Variable *Src1) argument
576 InstMIPS32ThreeAddrGPR(Cfg *Func, Variable *Dest, Variable *Src0, Variable *Src1) argument
819 create(Cfg *Func, CfgNode *TargetTrue, CfgNode *TargetFalse, Operand *Src0, Operand *Src1, CondMIPS32::Cond Cond) argument
827 create(Cfg *Func, CfgNode *TargetTrue, CfgNode *TargetFalse, Operand *Src0, CondMIPS32::Cond Cond) argument
835 create(Cfg *Func, CfgNode *TargetTrue, CfgNode *TargetFalse, Operand *Src0, Operand *Src1, const InstMIPS32Label *Label, CondMIPS32::Cond Cond) argument
903 create(Cfg *Func, Variable *Src0, Variable *Src1) argument
937 InstMIPS32FPCmp(Cfg *Func, Variable *Src0, Variable *Src1) argument
988 create(Cfg *Func, Operand *Src0, Operand *Src1, uint32_t Tcode) argument
1025 InstMIPS32Trap(Cfg *Func, Operand *Src0, Operand *Src1, const uint32_t Tcode) argument
1054 create(Cfg *Func, Variable *Dest, Operand *Src0, Operand *Src1, RelocOp Reloc) argument
1129 InstMIPS32Imm16(Cfg *Func, Variable *Dest, Operand *Src0, Operand *Src1, RelocOp Reloc = RO_No) argument
[all...]
H A DIceTargetLoweringARM32.h213 Operand *Src0, Operand *Src1);
253 Operand *Src0, Operand *Src1);
254 CondWhenTrue lowerInt32IcmpCond(InstIcmp::ICond Condition, Operand *Src0,
256 CondWhenTrue lowerInt64IcmpCond(InstIcmp::ICond Condition, Operand *Src0,
258 CondWhenTrue lowerIcmpCond(InstIcmp::ICond Condition, Operand *Src0,
334 void _add(Variable *Dest, Variable *Src0, Operand *Src1, argument
336 Context.insert<InstARM32Add>(Dest, Src0, Src1, Pred);
338 void _adds(Variable *Dest, Variable *Src0, Operand *Src1, argument
341 Context.insert<InstARM32Add>(Dest, Src0, Src1, Pred, SetFlags);
346 void _adc(Variable *Dest, Variable *Src0, Operan argument
350 _and(Variable *Dest, Variable *Src0, Operand *Src1, CondARM32::Cond Pred = CondARM32::AL) argument
354 _asr(Variable *Dest, Variable *Src0, Operand *Src1, CondARM32::Cond Pred = CondARM32::AL) argument
358 _bic(Variable *Dest, Variable *Src0, Operand *Src1, CondARM32::Cond Pred = CondARM32::AL) argument
373 _cmn(Variable *Src0, Operand *Src1, CondARM32::Cond Pred = CondARM32::AL) argument
377 _cmp(Variable *Src0, Operand *Src1, CondARM32::Cond Pred = CondARM32::AL) argument
381 _clz(Variable *Dest, Variable *Src0, CondARM32::Cond Pred = CondARM32::AL) argument
386 _eor(Variable *Dest, Variable *Src0, Operand *Src1, CondARM32::Cond Pred = CondARM32::AL) argument
407 _lsl(Variable *Dest, Variable *Src0, Operand *Src1, CondARM32::Cond Pred = CondARM32::AL) argument
411 _lsls(Variable *Dest, Variable *Src0, Operand *Src1, CondARM32::Cond Pred = CondARM32::AL) argument
419 _lsr(Variable *Dest, Variable *Src0, Operand *Src1, CondARM32::Cond Pred = CondARM32::AL) argument
423 _mla(Variable *Dest, Variable *Src0, Variable *Src1, Variable *Acc, CondARM32::Cond Pred = CondARM32::AL) argument
427 _mls(Variable *Dest, Variable *Src0, Variable *Src1, Variable *Acc, CondARM32::Cond Pred = CondARM32::AL) argument
435 _mov(Variable *Dest, Operand *Src0, CondARM32::Cond Pred = CondARM32::AL) argument
453 _mov_redefined(Variable *Dest, Operand *Src0, CondARM32::Cond Pred = CondARM32::AL) argument
469 _extractelement(Variable *Dest, Variable *Src0, uint32_t Index, CondARM32::Cond Pred = CondARM32::AL) argument
476 _insertelement(Variable *Dest, Variable *Src0, uint32_t Index, CondARM32::Cond Pred = CondARM32::AL) argument
710 _movt(Variable *Dest, Operand *Src0, CondARM32::Cond Pred = CondARM32::AL) argument
714 _movw(Variable *Dest, Operand *Src0, CondARM32::Cond Pred = CondARM32::AL) argument
718 _mul(Variable *Dest, Variable *Src0, Variable *Src1, CondARM32::Cond Pred = CondARM32::AL) argument
722 _mvn(Variable *Dest, Operand *Src0, CondARM32::Cond Pred = CondARM32::AL) argument
726 _orr(Variable *Dest, Variable *Src0, Operand *Src1, CondARM32::Cond Pred = CondARM32::AL) argument
730 _orrs(Variable *Dest, Variable *Src0, Operand *Src1, CondARM32::Cond Pred = CondARM32::AL) argument
745 _rbit(Variable *Dest, Variable *Src0, CondARM32::Cond Pred = CondARM32::AL) argument
749 _rev(Variable *Dest, Variable *Src0, CondARM32::Cond Pred = CondARM32::AL) argument
756 _rscs(Variable *Dest, Variable *Src0, Operand *Src1, CondARM32::Cond Pred = CondARM32::AL) argument
764 _rsc(Variable *Dest, Variable *Src0, Operand *Src1, CondARM32::Cond Pred = CondARM32::AL) argument
768 _rsbs(Variable *Dest, Variable *Src0, Operand *Src1, CondARM32::Cond Pred = CondARM32::AL) argument
776 _rsb(Variable *Dest, Variable *Src0, Operand *Src1, CondARM32::Cond Pred = CondARM32::AL) argument
780 _sbc(Variable *Dest, Variable *Src0, Operand *Src1, CondARM32::Cond Pred = CondARM32::AL) argument
784 _sbcs(Variable *Dest, Variable *Src0, Operand *Src1, CondARM32::Cond Pred = CondARM32::AL) argument
792 _sdiv(Variable *Dest, Variable *Src0, Variable *Src1, CondARM32::Cond Pred = CondARM32::AL) argument
810 _sub(Variable *Dest, Variable *Src0, Operand *Src1, CondARM32::Cond Pred = CondARM32::AL) argument
814 _subs(Variable *Dest, Variable *Src0, Operand *Src1, CondARM32::Cond Pred = CondARM32::AL) argument
822 _sxt(Variable *Dest, Variable *Src0, CondARM32::Cond Pred = CondARM32::AL) argument
826 _tst(Variable *Src0, Operand *Src1, CondARM32::Cond Pred = CondARM32::AL) argument
831 _udiv(Variable *Dest, Variable *Src0, Variable *Src1, CondARM32::Cond Pred = CondARM32::AL) argument
835 _umull(Variable *DestLo, Variable *DestHi, Variable *Src0, Variable *Src1, CondARM32::Cond Pred = CondARM32::AL) argument
847 _uxt(Variable *Dest, Variable *Src0, CondARM32::Cond Pred = CondARM32::AL) argument
855 _vadd(Variable *Dest, Variable *Src0, Variable *Src1) argument
858 _vand(Variable *Dest, Variable *Src0, Variable *Src1) argument
861 _vbsl(Variable *Dest, Variable *Src0, Variable *Src1) argument
864 _vceq(Variable *Dest, Variable *Src0, Variable *Src1) argument
867 _vcge(Variable *Dest, Variable *Src0, Variable *Src1) argument
870 _vcgt(Variable *Dest, Variable *Src0, Variable *Src1) argument
877 _vdiv(Variable *Dest, Variable *Src0, Variable *Src1) argument
880 _vcmp(Variable *Src0, Variable *Src1, CondARM32::Cond Pred = CondARM32::AL) argument
884 _vcmp(Variable *Src0, OperandARM32FlexFpZero *FpZero, CondARM32::Cond Pred = CondARM32::AL) argument
891 _veor(Variable *Dest, Variable *Src0, Variable *Src1) argument
905 _vmla(Variable *Dest, Variable *Src0, Variable *Src1) argument
908 _vmlap(Variable *Dest, Variable *Src0, Variable *Src1) argument
911 _vmls(Variable *Dest, Variable *Src0, Variable *Src1) argument
914 _vmovl(Variable *Dest, Variable *Src0, Variable *Src1) argument
917 _vmovh(Variable *Dest, Variable *Src0, Variable *Src1) argument
920 _vmovhl(Variable *Dest, Variable *Src0, Variable *Src1) argument
923 _vmovlh(Variable *Dest, Variable *Src0, Variable *Src1) argument
926 _vmul(Variable *Dest, Variable *Src0, Variable *Src1) argument
929 _vmulh(Variable *Dest, Variable *Src0, Variable *Src1, bool Unsigned) argument
933 _vmvn(Variable *Dest, Variable *Src0) argument
936 _vneg(Variable *Dest, Variable *Src0) argument
940 _vorr(Variable *Dest, Variable *Src0, Variable *Src1) argument
943 _vqadd(Variable *Dest, Variable *Src0, Variable *Src1, bool Unsigned) argument
947 _vqmovn2(Variable *Dest, Variable *Src0, Variable *Src1, bool Unsigned, bool Saturating) argument
954 _vqsub(Variable *Dest, Variable *Src0, Variable *Src1, bool Unsigned) argument
958 _vshl(Variable *Dest, Variable *Src0, Variable *Src1) argument
961 _vshl(Variable *Dest, Variable *Src0, ConstantInteger32 *Src1) argument
965 _vshr(Variable *Dest, Variable *Src0, ConstantInteger32 *Src1) argument
981 _vsub(Variable *Dest, Variable *Src0, Variable *Src1) argument
984 _vzip(Variable *Dest, Variable *Src0, Variable *Src1) argument
[all...]
H A DIceTargetLoweringX86Base.h363 void lowerCaseCluster(const CaseCluster &Case, Operand *Src0, bool DoneCmp,
419 Operand *legalizeSrc0ForCmp(Operand *Src0, Operand *Src1);
516 void _adc(Variable *Dest, Operand *Src0) { argument
517 AutoMemorySandboxer<> _(this, &Dest, &Src0);
518 Context.insert<typename Traits::Insts::Adc>(Dest, Src0);
524 void _add(Variable *Dest, Operand *Src0) { argument
525 AutoMemorySandboxer<> _(this, &Dest, &Src0);
526 Context.insert<typename Traits::Insts::Add>(Dest, Src0);
532 void _addps(Variable *Dest, Operand *Src0) { argument
533 AutoMemorySandboxer<> _(this, &Dest, &Src0);
536 _addss(Variable *Dest, Operand *Src0) argument
543 _and(Variable *Dest, Operand *Src0) argument
547 _andnps(Variable *Dest, Operand *Src0) argument
551 _andps(Variable *Dest, Operand *Src0) argument
559 _blendvps(Variable *Dest, Operand *Src0, Operand *Src1) argument
577 _bsf(Variable *Dest, Operand *Src0) argument
581 _bsr(Variable *Dest, Operand *Src0) argument
589 _cbwdq(Variable *Dest, Operand *Src0) argument
593 _cmov(Variable *Dest, Operand *Src0, BrCond Condition) argument
597 _cmp(Operand *Src0, Operand *Src1) argument
601 _cmpps(Variable *Dest, Operand *Src0, CmppsCond Condition) argument
628 _cvt(Variable *Dest, Operand *Src0, typename Traits::Insts::Cvt::CvtVariant Variant) argument
633 _round(Variable *Dest, Operand *Src0, Operand *Imm) argument
637 _div(Variable *Dest, Operand *Src0, Operand *Src1) argument
641 _divps(Variable *Dest, Operand *Src0) argument
645 _divss(Variable *Dest, Operand *Src0) argument
650 _fld(Operand *Src0) argument
671 _idiv(Variable *Dest, Operand *Src0, Operand *Src1) argument
675 _imul(Variable *Dest, Operand *Src0) argument
679 _imul_imm(Variable *Dest, Operand *Src0, Constant *Imm) argument
683 _insertps(Variable *Dest, Operand *Src0, Operand *Src1) argument
692 _lea(Variable *Dest, Operand *Src0) argument
709 _mov(Variable *&Dest, Operand *Src0, RegNumT RegNum = RegNumT()) argument
719 _movp(Variable *Dest, Operand *Src0) argument
723 _movd(Variable *Dest, Operand *Src0) argument
727 _movq(Variable *Dest, Operand *Src0) argument
731 _movss(Variable *Dest, Variable *Src0) argument
734 _movsx(Variable *Dest, Operand *Src0) argument
738 _movzx(Variable *Dest, Operand *Src0) argument
742 _maxss(Variable *Dest, Operand *Src0) argument
746 _minss(Variable *Dest, Operand *Src0) argument
750 _maxps(Variable *Dest, Operand *Src0) argument
754 _minps(Variable *Dest, Operand *Src0) argument
758 _mul(Variable *Dest, Variable *Src0, Operand *Src1) argument
762 _mulps(Variable *Dest, Operand *Src0) argument
766 _mulss(Variable *Dest, Operand *Src0) argument
777 _or(Variable *Dest, Operand *Src0) argument
781 _orps(Variable *Dest, Operand *Src0) argument
789 _padd(Variable *Dest, Operand *Src0) argument
793 _padds(Variable *Dest, Operand *Src0) argument
797 _paddus(Variable *Dest, Operand *Src0) argument
801 _pand(Variable *Dest, Operand *Src0) argument
805 _pandn(Variable *Dest, Operand *Src0) argument
809 _pblendvb(Variable *Dest, Operand *Src0, Operand *Src1) argument
813 _pcmpeq(Variable *Dest, Operand *Src0, Type ArithmeticTypeOverride = IceType_void) argument
819 _pcmpgt(Variable *Dest, Operand *Src0) argument
823 _pextr(Variable *Dest, Operand *Src0, Operand *Src1) argument
827 _pinsr(Variable *Dest, Operand *Src0, Operand *Src1) argument
831 _pmull(Variable *Dest, Operand *Src0) argument
835 _pmulhw(Variable *Dest, Operand *Src0) argument
839 _pmulhuw(Variable *Dest, Operand *Src0) argument
843 _pmaddwd(Variable *Dest, Operand *Src0) argument
847 _pmuludq(Variable *Dest, Operand *Src0) argument
854 _por(Variable *Dest, Operand *Src0) argument
858 _punpckl(Variable *Dest, Operand *Src0) argument
862 _punpckh(Variable *Dest, Operand *Src0) argument
866 _packss(Variable *Dest, Operand *Src0) argument
870 _packus(Variable *Dest, Operand *Src0) argument
874 _pshufb(Variable *Dest, Operand *Src0) argument
878 _pshufd(Variable *Dest, Operand *Src0, Operand *Src1) argument
882 _psll(Variable *Dest, Operand *Src0) argument
886 _psra(Variable *Dest, Operand *Src0) argument
890 _psrl(Variable *Dest, Operand *Src0) argument
894 _psub(Variable *Dest, Operand *Src0) argument
898 _psubs(Variable *Dest, Operand *Src0) argument
902 _psubus(Variable *Dest, Operand *Src0) argument
906 _push(Operand *Src0) argument
909 _pxor(Variable *Dest, Operand *Src0) argument
916 _rol(Variable *Dest, Operand *Src0) argument
928 _sar(Variable *Dest, Operand *Src0) argument
932 _sbb(Variable *Dest, Operand *Src0) argument
943 _shl(Variable *Dest, Operand *Src0) argument
947 _shld(Variable *Dest, Variable *Src0, Operand *Src1) argument
951 _shr(Variable *Dest, Operand *Src0) argument
955 _shrd(Variable *Dest, Variable *Src0, Operand *Src1) argument
959 _shufps(Variable *Dest, Operand *Src0, Operand *Src1) argument
963 _movmsk(Variable *Dest, Operand *Src0) argument
967 _sqrt(Variable *Dest, Operand *Src0) argument
987 _sub(Variable *Dest, Operand *Src0) argument
998 _subps(Variable *Dest, Operand *Src0) argument
1002 _subss(Variable *Dest, Operand *Src0) argument
1006 _test(Operand *Src0, Operand *Src1) argument
1010 _ucomiss(Operand *Src0, Operand *Src1) argument
1034 _xor(Variable *Dest, Operand *Src0) argument
1038 _xorps(Variable *Dest, Operand *Src0) argument
[all...]
H A DIceTargetLoweringMIPS32.h166 void _add(Variable *Dest, Variable *Src0, Variable *Src1) { argument
167 Context.insert<InstMIPS32Add>(Dest, Src0, Src1);
170 void _addu(Variable *Dest, Variable *Src0, Variable *Src1) { argument
171 Context.insert<InstMIPS32Addu>(Dest, Src0, Src1);
174 void _and(Variable *Dest, Variable *Src0, Variable *Src1) { argument
175 Context.insert<InstMIPS32And>(Dest, Src0, Src1);
188 void _br(CfgNode *TargetTrue, CfgNode *TargetFalse, Operand *Src0, argument
190 Context.insert<InstMIPS32Br>(TargetTrue, TargetFalse, Src0, Src1,
194 void _br(CfgNode *TargetTrue, CfgNode *TargetFalse, Operand *Src0, argument
196 Context.insert<InstMIPS32Br>(TargetTrue, TargetFalse, Src0, Conditio
199 _br(CfgNode *TargetTrue, CfgNode *TargetFalse, Operand *Src0, Operand *Src1, const InstMIPS32Label *Label, CondMIPS32::Cond Condition) argument
222 _add_d(Variable *Dest, Variable *Src0, Variable *Src1) argument
226 _add_s(Variable *Dest, Variable *Src0, Variable *Src1) argument
234 _addiu(Variable *Dest, Variable *Src0, Operand *Src1, RelocOp Reloc) argument
238 _c_eq_d(Variable *Src0, Variable *Src1) argument
242 _c_eq_s(Variable *Src0, Variable *Src1) argument
246 _c_ole_d(Variable *Src0, Variable *Src1) argument
250 _c_ole_s(Variable *Src0, Variable *Src1) argument
254 _c_olt_d(Variable *Src0, Variable *Src1) argument
258 _c_olt_s(Variable *Src0, Variable *Src1) argument
262 _c_ueq_d(Variable *Src0, Variable *Src1) argument
266 _c_ueq_s(Variable *Src0, Variable *Src1) argument
270 _c_ule_d(Variable *Src0, Variable *Src1) argument
274 _c_ule_s(Variable *Src0, Variable *Src1) argument
278 _c_ult_d(Variable *Src0, Variable *Src1) argument
282 _c_ult_s(Variable *Src0, Variable *Src1) argument
286 _c_un_d(Variable *Src0, Variable *Src1) argument
290 _c_un_s(Variable *Src0, Variable *Src1) argument
322 _div(Variable *Dest, Variable *Src0, Variable *Src1) argument
326 _div_d(Variable *Dest, Variable *Src0, Variable *Src1) argument
330 _div_s(Variable *Dest, Variable *Src0, Variable *Src1) argument
334 _divu(Variable *Dest, Variable *Src0, Variable *Src1) argument
370 _mov(Variable *Dest, Operand *Src0, Operand *Src1 = nullptr) argument
386 _mov_redefined(Variable *Dest, Operand *Src0, Operand *Src1 = nullptr) argument
414 _movf(Variable *Dest, Variable *Src0, Operand *FCC) argument
418 _movn(Variable *Dest, Variable *Src0, Variable *Src1) argument
422 _movn_d(Variable *Dest, Variable *Src0, Variable *Src1) argument
426 _movn_s(Variable *Dest, Variable *Src0, Variable *Src1) argument
430 _movt(Variable *Dest, Variable *Src0, Operand *FCC) argument
434 _movz(Variable *Dest, Variable *Src0, Variable *Src1) argument
438 _movz_d(Variable *Dest, Variable *Src0, Variable *Src1) argument
442 _movz_s(Variable *Dest, Variable *Src0, Variable *Src1) argument
458 _mul(Variable *Dest, Variable *Src0, Variable *Src1) argument
462 _mul_d(Variable *Dest, Variable *Src0, Variable *Src1) argument
466 _mul_s(Variable *Dest, Variable *Src0, Variable *Src1) argument
470 _mult(Variable *Dest, Variable *Src0, Variable *Src1) argument
474 _multu(Variable *Dest, Variable *Src0, Variable *Src1) argument
480 _nor(Variable *Dest, Variable *Src0, Variable *Src1) argument
484 _not(Variable *Dest, Variable *Src0) argument
488 _or(Variable *Dest, Variable *Src0, Variable *Src1) argument
508 _sllv(Variable *Dest, Variable *Src0, Variable *Src1) argument
512 _slt(Variable *Dest, Variable *Src0, Variable *Src1) argument
524 _sltu(Variable *Dest, Variable *Src0, Variable *Src1) argument
540 _srav(Variable *Dest, Variable *Src0, Variable *Src1) argument
548 _srlv(Variable *Dest, Variable *Src0, Variable *Src1) argument
552 _sub(Variable *Dest, Variable *Src0, Variable *Src1) argument
556 _sub_d(Variable *Dest, Variable *Src0, Variable *Src1) argument
560 _sub_s(Variable *Dest, Variable *Src0, Variable *Src1) argument
564 _subu(Variable *Dest, Variable *Src0, Variable *Src1) argument
578 _teq(Variable *Src0, Variable *Src1, uint32_t TrapCode) argument
598 _xor(Variable *Dest, Variable *Src0, Variable *Src1) argument
[all...]
H A DIceTargetLoweringX86BaseImpl.h802 /// Replaces Src0 or Src1 with LoadSrc if the answer is true.
804 Operand *&Src0, Operand *&Src1) {
805 if (Src0 == LoadDest && Src1 != LoadDest) {
806 Src0 = LoadSrc;
809 if (Src0 != LoadDest && Src1 == LoadDest) {
855 Operand *Src0 = Arith->getSrc(0); local
857 if (canFoldLoadIntoBinaryInst(LoadSrc, LoadDest, Src0, Src1)) {
859 Arith->getDest(), Src0, Src1);
862 Operand *Src0 = Icmp->getSrc(0); local
864 if (canFoldLoadIntoBinaryInst(LoadSrc, LoadDest, Src0, Src
803 canFoldLoadIntoBinaryInst(Operand *LoadSrc, Variable *LoadDest, Operand *&Src0, Operand *&Src1) argument
869 Operand *Src0 = Fcmp->getSrc(0); local
876 Operand *Src0 = Select->getTrueOperand(); local
884 auto *Src0 = llvm::dyn_cast<Variable>(Cast->getSrc(0)); local
1615 optimizeScalarMul(Variable *Dest, Operand *Src0, int32_t Src1) argument
1931 Operand *Src0 = legalize(Instr->getSrc(0)); local
2592 Operand *Src0 = legalize(Cond, Legal_Reg | Legal_Mem); local
2955 Operand *Src0 = legalizeUndef(Instr->getSrc(0)); local
2964 Operand *Src0 = legalizeUndef(Instr->getSrc(0)); local
3079 Operand *Src0 = Instr->getSrc(0); local
3108 Operand *Src0 = Instr->getSrc(0); local
3336 Operand *Src0 = Fcmp->getSrc(0); local
3441 Operand *Src0 = Fcmp->getSrc(0); local
3514 Operand *Src0 = legalize(Icmp->getSrc(0)); local
3551 Operand *Src0 = legalize(Icmp->getSrc(0)); local
3671 Operand *Src0 = legalize(Icmp->getSrc(0)); local
[all...]
H A DIceTargetLoweringARM32.cpp541 Operand *Src0 = Instr->getSrc(0); local
544 // Src0 and Src1 have to be zero-, or signed-extended to i32. For Src0,
547 Context.insert<InstCast>(CastKind, Src0_32, Src0);
548 Src0 = Src0_32;
574 assert(Src0->getType() == IceType_i32);
575 Call->addArg(Src0);
602 Operand *Src0 = Instr->getSrc(0); local
604 const Type SrcTy = Src0->getType();
626 Call->addArg(Src0);
732 Operand *Src0 = IntrinsicCall->getArg(0); local
2358 Variable *Src0 = Func->makeVariable(IceType_i1); local
2448 Operand *const Src0; member in class:__anon23512::NumericOperandsBase
2587 lowerInt64Arithmetic(InstArithmetic::OpKind Op, Variable *Dest, Operand *Src0, Operand *Src1) argument
[all...]
/external/llvm/lib/Target/ARM/
H A DARMISelDAGToDAG.cpp2536 static bool SearchSignedMulLong(SDValue OR, unsigned *Opc, SDValue &Src0, argument
2578 Src0 = SMULLOHI->getOperand(1);
2581 Src0 = SMULLOHI->getOperand(0);
2590 SDValue Src0 = N->getOperand(0); local
2596 if (Src0.getOpcode() != ISD::OR && Src1.getOpcode() != ISD::OR)
2600 if (SearchSignedMulLong(Src0, &Opc, A, B, true)) {
2603 Acc = Src0;
/external/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorTypes.cpp1094 SDValue Src0 = MLD->getSrc0(); local
1116 if (getTypeAction(Src0.getValueType()) == TargetLowering::TypeSplitVector)
1117 GetSplitVector(Src0, Src0Lo, Src0Hi);
1119 std::tie(Src0Lo, Src0Hi) = DAG.SplitVector(Src0, dl);
1162 SDValue Src0 = MGT->getValue(); local
1179 if (getTypeAction(Src0.getValueType()) == TargetLowering::TypeSplitVector)
1180 GetSplitVector(Src0, Src0Lo, Src0Hi);
1182 std::tie(Src0Lo, Src0Hi) = DAG.SplitVector(Src0, dl);
1532 SDValue Src0 = N->getOperand(1); local
1534 EVT Src0VT = Src0
1679 SDValue Src0 = MGT->getValue(); local
2869 SDValue Src0 = GetWidenedVector(N->getSrc0()); local
2906 SDValue Src0 = GetWidenedVector(N->getValue()); local
[all...]

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