/external/llvm/test/MC/AArch64/ |
H A D | alias-addsubimm.s | 3 // CHECK: sub w0, w2, #2, lsl #12 4 // CHECK: sub w0, w2, #2, lsl #12 5 sub w0, w2, #2, lsl 12 6 add w0, w2, #-2, lsl 12 7 // CHECK: sub x1, x3, #2, lsl #12 8 // CHECK: sub x1, x3, #2, lsl #12 9 sub x1, x3, #2, lsl 12 10 add x1, x3, #-2, lsl 12 17 sub x1, x3, #4095, lsl 0 18 add x1, x3, #-4095, lsl [all...] |
H A D | neon-mov.s | 11 movi v15.2s, #1, lsl #8 12 movi v16.2s, #1, lsl #16 13 movi v31.2s, #1, lsl #24 15 movi v0.4s, #1, lsl #8 16 movi v0.4s, #1, lsl #16 17 movi v0.4s, #1, lsl #24 19 movi v0.4h, #1, lsl #8 21 movi v0.8h, #1, lsl #8 25 // CHECK: movi v15.2s, #{{0x1|1}}, lsl #8 // encoding: [0x2f,0x24,0x00,0x0f] 26 // CHECK: movi v16.2s, #{{0x1|1}}, lsl #1 [all...] |
H A D | arm64-optional-hash.s | 8 ; CHECK: adds x3, x4, #1024, lsl #12 ; encoding: [0x83,0x00,0x50,0xb1] 9 adds x3, x4, 1024, lsl 12 30 ; CHECK: prfm pstl3strm, [x4, x5, lsl #3] ; encoding: [0x95,0x78,0xa5,0xf8] 31 prfm pstl3strm, [x4, x5, lsl 3]
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H A D | arm64-aliases.s | 43 ands wzr, w1, w2, lsl #2 44 ands xzr, x1, x2, lsl #3 45 tst w3, w7, lsl #31 52 ; CHECK: tst w1, w2, lsl #2 ; encoding: [0x3f,0x08,0x02,0x6a] 53 ; CHECK: tst x1, x2, lsl #3 ; encoding: [0x3f,0x0c,0x02,0xea] 54 ; CHECK: tst w3, w7, lsl #31 ; encoding: [0x7f,0x7c,0x07,0x6a] 60 cmn w1, #3, lsl #0 70 ; CHECK: cmn x2, #0x400, lsl #12 ; encoding: [0x5f,0x00,0x50,0xb1] 82 cmp w1, #1024, lsl #12 93 cmp wsp, w9, lsl # [all...] |
H A D | arm64-arithmetic-encoding.s | 33 add w3, w4, #1024, lsl #0 35 add x3, x4, #1024, lsl #0 42 add w3, w4, #1024, lsl #12 44 add w3, w4, #0, lsl #12 45 add x3, x4, #1024, lsl #12 47 add x3, x4, #0, lsl #12 50 ; CHECK: add w3, w4, #1024, lsl #12 ; encoding: [0x83,0x00,0x50,0x11] 51 ; CHECK: add w3, w4, #1024, lsl #12 ; encoding: [0x83,0x00,0x50,0x11] 52 ; CHECK: add w3, w4, #0, lsl #12 ; encoding: [0x83,0x00,0x40,0x11] 53 ; CHECK: add x3, x4, #1024, lsl #1 [all...] |
/external/compiler-rt/lib/builtins/arm/ |
H A D | switch16.S | 36 add r0, lr, r0, lsl #1 // compute address of element in table 37 add ip, lr, ip, lsl #1 // compute address of last element in table 41 add ip, lr, r0, lsl #1 // compute label = lr + element*2
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H A D | switch32.S | 36 add r0, lr, r0, lsl #2 // compute address of element in table 37 add ip, lr, ip, lsl #2 // compute address of last element in table
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H A D | comparesf2.S | 47 mov r2, r0, lsl #1 48 mov r3, r1, lsl #1 114 mov r2, r0, lsl #1 115 mov r3, r1, lsl #1 138 mov r2, r0, lsl #1 139 mov r3, r1, lsl #1
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H A D | switch8.S | 39 add ip, lr, r0, lsl #1 // compute label = lr + element*2
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H A D | switchu8.S | 39 add ip, lr, r0, lsl #1 // compute label = lr + element*2
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/external/libxaac/decoder/armv7/ |
H A D | ixheaacd_radix4_bfly.s | 39 MOV r3, r3, lsl #1 45 ADD r2, r1, r3, lsl #2 55 LDR r8, [r2, r3, lsl #2] 56 LDR r9, [r2, r3, lsl #3] 69 LDR r9, [r2, r3, lsl #2]! 70 LDR r10, [r2, r3, lsl #2]! 92 MOV r8, r8, lsl #1 98 MOV r8, r8, lsl #1 99 STR r8, [r2], -r3, lsl #2 105 MOV r5, r8, lsl # [all...] |
H A D | ixheaacd_tns_ar_filter_fixed_32x16.s | 66 MOV r8, r8, lsl r1 68 MOV r8 , r8 , lsl r6 76 MOV r5 , r5 , lsl #1 78 ADD r14, r12, r5, lsl #1 86 MOV r8, r8, lsl r1 87 SUB r8 , r8 , r11, lsl #1 91 MOV r8 , r8 , lsl r6 110 MOV r5 , r4 , lsl #1 113 ADD r14 , r12, r5, lsl #1 135 MOV r8, r8, lsl r [all...] |
H A D | ixheaacd_esbr_radix4bfly.s | 37 MOV r3, r3, lsl #1 43 ADD r2, r1, r3, lsl #2 53 LDR r8, [r2, r3, lsl #2] 54 LDR r9, [r2, r3, lsl #3] 67 LDR r9, [r2, r3, lsl #2]! 68 LDR r10, [r2, r3, lsl #2]! 91 MOV r8, r8, lsl #1 98 MOV r8, r8, lsl #1 99 STR r8, [r2], -r3, lsl #2 106 MOV r5, r8, lsl # [all...] |
H A D | ixheaacd_aac_ld_dec_rearrange.s | 20 ADD r4, r0, r4, lsl #3 21 ADD r5, r0, r5, lsl #3 22 ADD r6, r0, r6, lsl #3 23 ADD r7, r0, r7, lsl #3 24 ADD r8, r0, r8, lsl #3 25 ADD r9, r0, r9, lsl #3 26 ADD r10, r0, r10, lsl #3 27 ADD r11, r0, r11, lsl #3
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H A D | ixheaacd_decorr_filter2.s | 275 MOV r8, r8, lsl #1 287 MOV r3, r3, lsl #1 288 MOV r9, r9, lsl #1 484 MOV r8, r8, lsl #1 494 MOV r3, r3, lsl #1 495 MOV r9, r9, lsl #1 610 LDR r8, [r6, r7, lsl #2] 612 LDR r9, [r10, r7, lsl #2] 617 LDR r8, [r6, r7, lsl #2] 619 LDR r9, [r10, r7, lsl # [all...] |
/external/capstone/suite/MC/AArch64/ |
H A D | neon-mov.s.cs | 4 0x2f,0x24,0x00,0x0f = movi v15.2s, #0x1, lsl #8 5 0x30,0x44,0x00,0x0f = movi v16.2s, #0x1, lsl #16 6 0x3f,0x64,0x00,0x0f = movi v31.2s, #0x1, lsl #24 8 0x20,0x24,0x00,0x4f = movi v0.4s, #0x1, lsl #8 9 0x20,0x44,0x00,0x4f = movi v0.4s, #0x1, lsl #16 10 0x20,0x64,0x00,0x4f = movi v0.4s, #0x1, lsl #24 12 0x20,0xa4,0x00,0x0f = movi v0.4h, #0x1, lsl #8 14 0x20,0xa4,0x00,0x4f = movi v0.8h, #0x1, lsl #8 17 0x20,0x24,0x00,0x2f = mvni v0.2s, #0x1, lsl #8 18 0x20,0x44,0x00,0x2f = mvni v0.2s, #0x1, lsl #1 [all...] |
/external/libvpx/libvpx/build/make/ |
H A D | thumb.pm | 19 # Write additions with shifts, such as "add r10, r11, lsl #8", 20 # in three operand form, "add r10, r10, r11, lsl #8". 21 s/(add\s+)(r\d+),\s*(r\d+),\s*(lsl #\d+)/$1$2, $2, $3, $4/g; 28 # This converts instructions such as "add r12, r12, r5, lsl r4" 29 # into the sequence "lsl r5, r4", "add r12, r12, r5", "lsr r5, r4". 30 s/^(\s*)(add)(\s+)(r\d+),\s*(r\d+),\s*(r\d+),\s*lsl (r\d+)/$1lsl$3$6, $7\n$1$2$3$4, $5, $6\n$1lsr$3$6, $7/g; 44 # This converts "ldrne r4, [src, -pstep, lsl #1]" into 45 # "subne src, src, pstep, lsl #1", "ldrne r4, [src]", 46 # "addne src, src, pstep, lsl # [all...] |
/external/valgrind/none/tests/arm/ |
H A D | v6intThumb.stdout.exp | 2145 adds.w r1, r2, r3, lsl #0 :: rd 0x5859704f rm 0x31415927, rn 0x27181728, c:v-in 0, cpsr 0x00000000 2146 adds.w r1, r2, r3, lsl #1 :: rd 0x7f718777 rm 0x31415927, rn 0x27181728, c:v-in 0, cpsr 0x00000000 2147 adds.w r1, r2, r3, lsl #15 :: rd 0x3cd55927 rm 0x31415927, rn 0x27181728, c:v-in 0, cpsr 0x00000000 2148 adds.w r1, r2, r3, lsl #31 :: rd 0x31415927 rm 0x31415927, rn 0x27181728, c:v-in 0, cpsr 0x00000000 2157 add.w r1, r2, r3, lsl #0 :: rd 0x5859704f rm 0x31415927, rn 0x27181728, c:v-in 0, cpsr 0xc0000000 NZ 2158 add.w r1, r2, r3, lsl #1 :: rd 0x7f718777 rm 0x31415927, rn 0x27181728, c:v-in 0, cpsr 0xc0000000 NZ 2159 add.w r1, r2, r3, lsl #15 :: rd 0x3cd55927 rm 0x31415927, rn 0x27181728, c:v-in 0, cpsr 0xc0000000 NZ 2160 add.w r1, r2, r3, lsl #31 :: rd 0x31415927 rm 0x31415927, rn 0x27181728, c:v-in 0, cpsr 0xc0000000 NZ 2169 adds.w r1, r2, r3, lsl #0 :: rd 0xc859704f rm 0x31415927, rn 0x97181728, c:v-in 0, cpsr 0x80000000 N 2170 adds.w r1, r2, r3, lsl # [all...] |
/external/boringssl/ios-arm/crypto/fipsmodule/ |
H A D | aes-armv4.S | 194 orr r0,r0,r4,lsl#8 196 orr r0,r0,r5,lsl#16 198 orr r0,r0,r6,lsl#24 201 orr r1,r1,r4,lsl#8 203 orr r1,r1,r5,lsl#16 205 orr r1,r1,r6,lsl#24 208 orr r2,r2,r4,lsl#8 210 orr r2,r2,r5,lsl#16 212 orr r2,r2,r6,lsl#24 215 orr r3,r3,r4,lsl# [all...] |
/external/boringssl/linux-arm/crypto/fipsmodule/ |
H A D | aes-armv4.S | 193 orr r0,r0,r4,lsl#8 195 orr r0,r0,r5,lsl#16 197 orr r0,r0,r6,lsl#24 200 orr r1,r1,r4,lsl#8 202 orr r1,r1,r5,lsl#16 204 orr r1,r1,r6,lsl#24 207 orr r2,r2,r4,lsl#8 209 orr r2,r2,r5,lsl#16 211 orr r2,r2,r6,lsl#24 214 orr r3,r3,r4,lsl# [all...] |
/external/boringssl/src/crypto/fipsmodule/aes/asm/ |
H A D | aes-armv4.pl | 223 orr $s0,$s0,$t1,lsl#8 225 orr $s0,$s0,$t2,lsl#16 227 orr $s0,$s0,$t3,lsl#24 230 orr $s1,$s1,$t1,lsl#8 232 orr $s1,$s1,$t2,lsl#16 234 orr $s1,$s1,$t3,lsl#24 237 orr $s2,$s2,$t1,lsl#8 239 orr $s2,$s2,$t2,lsl#16 241 orr $s2,$s2,$t3,lsl#24 244 orr $s3,$s3,$t1,lsl# [all...] |
/external/boringssl/src/crypto/fipsmodule/modes/asm/ |
H A D | ghash-armv4.pl | 209 add $Zhh,$Htbl,$nlo,lsl#4 219 eor $Zll,$Zll,$Zlh,lsl#28 222 eor $Zlh,$Zlh,$Zhl,lsl#28 224 eor $Zhl,$Zhl,$Zhh,lsl#28 229 eor $Zhh,$Zhh,$Tll,lsl#16 232 add $Thh,$Htbl,$nlo,lsl#4 238 eor $Zll,$Zll,$Zlh,lsl#28 240 eor $Zlh,$Zlh,$Zhl,lsl#28 247 eor $Zhl,$Zhl,$Zhh,lsl#28 252 eor $Zhh,$Zhh,$Tll,lsl#1 [all...] |
/external/libvpx/libvpx/vpx_dsp/arm/ |
H A D | vpx_convolve_copy_neon_asm.asm | 34 pld [r0, r1, lsl #1] 44 pld [r0, r1, lsl #1] 46 pld [r0, r1, lsl #1] 55 pld [r0, r1, lsl #1] 57 pld [r0, r1, lsl #1] 66 pld [r0, r1, lsl #1] 68 pld [r0, r1, lsl #1]
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/external/libhevc/common/arm/ |
H A D | ihevc_deblk_chroma_horz.s | 87 ldrle r1,[r3,r1,lsl #2] 94 ldrle r2,[r3,r2,lsl #2] 97 add r1,r1,r4,lsl #1 113 add r2,r2,r4,lsl #1 116 ldr r1,[r3,r1,lsl #2] 126 ldr r2,[r3,r2,lsl #2]
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/external/llvm/test/MC/ARM/ |
H A D | arm-aliases.s | 4 @ Shift-by-zero should canonicalize to no shift at all (lsl #0 encoding) 5 add r1, r2, r3, lsl #0 10 bic r1, r2, r3, lsl #0
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