1; RUN: llvm-mc -triple arm64-apple-darwin -mattr=neon -output-asm-variant=1 -show-encoding -print-imm-hex < %s | FileCheck %s
2
3foo:
4;-----------------------------------------------------------------------------
5; ADD #0 to/from SP/WSP is a MOV
6;-----------------------------------------------------------------------------
7  add x1, sp, #0
8; CHECK: mov x1, sp
9  add sp, x2, #0
10; CHECK: mov sp, x2
11  add w3, wsp, #0
12; CHECK: mov w3, wsp
13  add wsp, w4, #0
14; CHECK: mov wsp, w4
15  mov x5, sp
16; CHECK: mov x5, sp
17  mov sp, x6
18; CHECK: mov sp, x6
19  mov w7, wsp
20; CHECK: mov w7, wsp
21  mov wsp, w8
22; CHECK: mov wsp, w8
23
24;-----------------------------------------------------------------------------
25; ORR Rd, Rn, Rn is a MOV
26;-----------------------------------------------------------------------------
27  orr x2, xzr, x9
28; CHECK: mov x2, x9
29  orr w2, wzr, w9
30; CHECK: mov w2, w9
31  mov x3, x4
32; CHECK: mov x3, x4
33  mov w5, w6
34; CHECK: mov w5, w6
35
36;-----------------------------------------------------------------------------
37; TST Xn, #<imm>
38;-----------------------------------------------------------------------------
39        tst w1, #3
40        tst x1, #3
41        tst w1, w2
42        tst x1, x2
43        ands wzr, w1, w2, lsl #2
44        ands xzr, x1, x2, lsl #3
45        tst w3, w7, lsl #31
46        tst x2, x20, asr #0
47
48; CHECK: tst	w1, #0x3                ; encoding: [0x3f,0x04,0x00,0x72]
49; CHECK: tst	x1, #0x3                ; encoding: [0x3f,0x04,0x40,0xf2]
50; CHECK: tst	w1, w2                  ; encoding: [0x3f,0x00,0x02,0x6a]
51; CHECK: tst	x1, x2                  ; encoding: [0x3f,0x00,0x02,0xea]
52; CHECK: tst	w1, w2, lsl #2          ; encoding: [0x3f,0x08,0x02,0x6a]
53; CHECK: tst	x1, x2, lsl #3          ; encoding: [0x3f,0x0c,0x02,0xea]
54; CHECK: tst	w3, w7, lsl #31         ; encoding: [0x7f,0x7c,0x07,0x6a]
55; CHECK: tst	x2, x20, asr #0         ; encoding: [0x5f,0x00,0x94,0xea]
56
57;-----------------------------------------------------------------------------
58; ADDS to WZR/XZR is a CMN
59;-----------------------------------------------------------------------------
60  cmn w1, #3, lsl #0
61  cmn x2, #4194304
62  cmn w4, w5
63  cmn x6, x7
64  cmn w8, w9, asr #3
65  cmn x2, x3, lsr #4
66  cmn x2, w3, uxtb #1
67  cmn x4, x5, uxtx #1
68
69; CHECK: cmn	w1, #0x3                  ; encoding: [0x3f,0x0c,0x00,0x31]
70; CHECK: cmn	x2, #0x400, lsl #12      ; encoding: [0x5f,0x00,0x50,0xb1]
71; CHECK: cmn	w4, w5                  ; encoding: [0x9f,0x00,0x05,0x2b]
72; CHECK: cmn	x6, x7                  ; encoding: [0xdf,0x00,0x07,0xab]
73; CHECK: cmn	w8, w9, asr #3          ; encoding: [0x1f,0x0d,0x89,0x2b]
74; CHECK: cmn	x2, x3, lsr #4          ; encoding: [0x5f,0x10,0x43,0xab]
75; CHECK: cmn	x2, w3, uxtb #1         ; encoding: [0x5f,0x04,0x23,0xab]
76; CHECK: cmn	x4, x5, uxtx #1         ; encoding: [0x9f,0x64,0x25,0xab]
77
78
79;-----------------------------------------------------------------------------
80; SUBS to WZR/XZR is a CMP
81;-----------------------------------------------------------------------------
82  cmp w1, #1024, lsl #12
83  cmp x2, #1024
84  cmp w4, w5
85  cmp x6, x7
86  cmp w8, w9, asr #3
87  cmp x2, x3, lsr #4
88  cmp x2, w3, uxth #2
89  cmp x4, x5, uxtx
90  cmp wzr, w1
91  cmp x8, w8, uxtw
92  cmp w9, w8, uxtw
93  cmp wsp, w9, lsl #0
94
95; CHECK: cmp	w1, #0x400, lsl #12      ; encoding: [0x3f,0x00,0x50,0x71]
96; CHECK: cmp	x2, #0x400               ; encoding: [0x5f,0x00,0x10,0xf1]
97; CHECK: cmp	w4, w5                  ; encoding: [0x9f,0x00,0x05,0x6b]
98; CHECK: cmp	x6, x7                  ; encoding: [0xdf,0x00,0x07,0xeb]
99; CHECK: cmp	w8, w9, asr #3          ; encoding: [0x1f,0x0d,0x89,0x6b]
100; CHECK: cmp	x2, x3, lsr #4          ; encoding: [0x5f,0x10,0x43,0xeb]
101; CHECK: cmp	x2, w3, uxth #2         ; encoding: [0x5f,0x28,0x23,0xeb]
102; CHECK: cmp	x4, x5, uxtx            ; encoding: [0x9f,0x60,0x25,0xeb]
103; CHECK: cmp	wzr, w1                 ; encoding: [0xff,0x03,0x01,0x6b]
104; CHECK: cmp	x8, w8, uxtw            ; encoding: [0x1f,0x41,0x28,0xeb]
105; CHECK: cmp	w9, w8, uxtw            ; encoding: [0x3f,0x41,0x28,0x6b]
106; CHECK: cmp	wsp, w9                 ; encoding: [0xff,0x43,0x29,0x6b]
107
108
109;-----------------------------------------------------------------------------
110; SUB/SUBS from WZR/XZR is a NEG
111;-----------------------------------------------------------------------------
112
113  neg w0, w1
114; CHECK: neg w0, w1
115  neg w0, w1, lsl #1
116; CHECK: neg w0, w1, lsl #1
117  neg x0, x1
118; CHECK: neg x0, x1
119  neg x0, x1, asr #1
120; CHECK: neg x0, x1, asr #1
121  negs w0, w1
122; CHECK: negs w0, w1
123  negs w0, w1, lsl #1
124; CHECK: negs w0, w1, lsl #1
125  negs x0, x1
126; CHECK: negs x0, x1
127  negs x0, x1, asr #1
128; CHECK: negs x0, x1, asr #1
129
130;-----------------------------------------------------------------------------
131; MOV aliases
132;-----------------------------------------------------------------------------
133
134  mov x0, #281470681743360
135  mov x0, #18446744073709486080
136
137; CHECK: mov x0, #0xffff00000000
138; CHECK: mov x0, #-0x10000
139
140  mov w0, #0xffffffff
141  mov w0, #0xffffff00
142  mov wzr, #0xffffffff
143  mov wzr, #0xffffff00
144
145; CHECK: mov   w0, #-0x1
146; CHECK: mov   w0, #-0x100
147; CHECK: mov   wzr, #-0x1
148; CHECK: mov   wzr, #-0x100
149
150  ; 0 can be encoded by MOVZ in multiple ways, only "lsl #0" is a MOV alias.
151  movz x0, #0
152  movz x0, #0, lsl #16
153  movz x0, #0, lsl #32
154  movz x0, #0, lsl #48
155  movz w0, #0
156  movz w0, #0, lsl #16
157; CHECK: mov x0, #0x0
158; CHECK: movz x0, #0x0, lsl #16
159; CHECK: movz x0, #0x0, lsl #32
160; CHECK: movz x0, #0x0, lsl #48
161; CHECK: mov w0, #0x0
162; CHECK: movz w0, #0x0, lsl #16
163
164  ; Similarly to MOVZ, -1 can be encoded in multiple ways, only one of which is
165  ; "MOV".
166  movn x0, #0
167  movn x0, #0, lsl #16
168  movn x0, #0, lsl #32
169  movn x0, #0, lsl #48
170  movn w0, #0
171  movn w0, #0, lsl #16
172; CHECK: mov x0, #-0x1
173; CHECK: movn x0, #0x0, lsl #16
174; CHECK: movn x0, #0x0, lsl #32
175; CHECK: movn x0, #0x0, lsl #48
176; CHECK: mov w0, #-0x1
177; CHECK: movn w0, #0x0, lsl #16
178
179  ; Two 32-bit immediates are encodable by both MOVN and MOVZ, make sure the MOV
180  ; corresponds to the MOVZ version.
181  movz w0, #0xffff
182  movz w0, #0xffff, lsl #16
183  movn w0, #0xffff
184  movn w0, #0xffff, lsl #16
185; CHECK: mov w0, #0xffff
186; CHECK: mov w0, #-0x10000
187; CHECK: movn w0, #0xffff
188; CHECK: movn w0, #0xffff, lsl #16
189
190  orr x20, xzr, #0xaaaaaaaaaaaaaaaa
191  orr w15, wzr, #0xaaaaaaaa
192; CHECK: mov x20, #-0x5555555555555556
193; CHECK: mov w15, #-0x55555556
194
195  ; ORR is mostly repeating bit sequences and cannot encode -1, so it only
196  ; overlaps with MOVZ or MOVN if the repeat-width is the whole register. In
197  ; both cases MOVZ/MOVN are preferred.
198  orr x3, xzr, #0x1
199  orr w3, wzr, #0x1
200  orr x3, xzr, #0x10000
201  orr w3, wzr, #0x10000
202  orr x3, xzr, #0x700000000
203  orr x3, xzr, #0x3000000000000
204; CHECK: orr x3, xzr, #0x1
205; CHECK: orr w3, wzr, #0x1
206; CHECK: orr x3, xzr, #0x10000
207; CHECK: orr w3, wzr, #0x10000
208; CHECK: orr x3, xzr, #0x700000000
209; CHECK: orr x3, xzr, #0x3000000000000
210
211
212  orr x5, xzr, #0xfffffffffffffff0
213  orr w2, wzr, #0xfffffffe
214  orr x5, xzr, #0xfffffffffcffffff
215  orr w2, wzr, #0xf0ffffff
216  orr x5, xzr, #0xffffff00ffffffff
217  orr x5, xzr, #0x8000ffffffffffff
218; CHECK: orr x5, xzr, #0xfffffffffffffff0
219; CHECK: orr w2, wzr, #0xfffffffe
220; CHECK: orr x5, xzr, #0x8000ffffffffffff
221
222  ; 0xffff is interesting because there are exceptions in the MOVN rules for
223  ; it. Make sure we don't accidentally fall down any of those holes.
224  orr w3, wzr, #0xffff0000
225  orr w3, wzr, #0xffff
226  orr x3, xzr, #0xffff000000000000
227  orr x5, xzr, #0x0000ffffffffffff
228; CHECK: orr w3, wzr, #0xffff0000
229; CHECK: orr w3, wzr, #0xffff
230; CHECK: orr x3, xzr, #0xffff000000000000
231; CHECK: orr x5, xzr, #0xffffffffffff
232
233;-----------------------------------------------------------------------------
234; MVN aliases
235;-----------------------------------------------------------------------------
236
237        mvn w4, w9
238        mvn x2, x3
239        orn w4, wzr, w9
240
241; CHECK: mvn	w4, w9             ; encoding: [0xe4,0x03,0x29,0x2a]
242; CHECK: mvn	x2, x3             ; encoding: [0xe2,0x03,0x23,0xaa]
243; CHECK: mvn	w4, w9             ; encoding: [0xe4,0x03,0x29,0x2a]
244
245        mvn w4, w9, lsl #1
246        mvn x2, x3, lsl #1
247        orn w4, wzr, w9, lsl #1
248
249; CHECK: mvn	w4, w9, lsl #1     ; encoding: [0xe4,0x07,0x29,0x2a]
250; CHECK: mvn	x2, x3, lsl #1     ; encoding: [0xe2,0x07,0x23,0xaa]
251; CHECK: mvn	w4, w9, lsl #1     ; encoding: [0xe4,0x07,0x29,0x2a]
252
253;-----------------------------------------------------------------------------
254; Bitfield aliases
255;-----------------------------------------------------------------------------
256
257  bfi   w0, w0, #1, #4
258  bfi   x0, x0, #1, #4
259  bfi   w0, w0, #0, #2
260  bfi   x0, x0, #0, #2
261  bfxil w0, w0, #2, #3
262  bfxil x0, x0, #2, #3
263  sbfiz w0, w0, #1, #4
264  sbfiz x0, x0, #1, #4
265  sbfx  w0, w0, #2, #3
266  sbfx  x0, x0, #2, #3
267  ubfiz w0, w0, #1, #4
268  ubfiz x0, x0, #1, #4
269  ubfx  w0, w0, #2, #3
270  ubfx  x0, x0, #2, #3
271
272; CHECK: bfi   w0, w0, #1, #4
273; CHECK: bfi   x0, x0, #1, #4
274; CHECK: bfxil w0, w0, #0, #2
275; CHECK: bfxil x0, x0, #0, #2
276; CHECK: bfxil w0, w0, #2, #3
277; CHECK: bfxil x0, x0, #2, #3
278; CHECK: sbfiz w0, w0, #1, #4
279; CHECK: sbfiz x0, x0, #1, #4
280; CHECK: sbfx  w0, w0, #2, #3
281; CHECK: sbfx  x0, x0, #2, #3
282; CHECK: ubfiz w0, w0, #1, #4
283; CHECK: ubfiz x0, x0, #1, #4
284; CHECK: ubfx  w0, w0, #2, #3
285; CHECK: ubfx  x0, x0, #2, #3
286
287;-----------------------------------------------------------------------------
288; Shift (immediate) aliases
289;-----------------------------------------------------------------------------
290
291; CHECK: asr w1, w3, #13
292; CHECK: asr x1, x3, #13
293; CHECK: lsl w0, w0, #1
294; CHECK: lsl x0, x0, #1
295; CHECK: lsr w0, w0, #4
296; CHECK: lsr x0, x0, #4
297
298   sbfm w1, w3, #13, #31
299   sbfm x1, x3, #13, #63
300   ubfm w0, w0, #31, #30
301   ubfm x0, x0, #63, #62
302   ubfm w0, w0, #4, #31
303   ubfm x0, x0, #4, #63
304; CHECK: ror w1, w3, #0x5
305; CHECK: ror x1, x3, #0x5
306   ror w1, w3, #5
307   ror x1, x3, #5
308; CHECK: lsl w1, wzr, #3
309   lsl w1, wzr, #3
310
311;-----------------------------------------------------------------------------
312; Sign/Zero extend aliases
313;-----------------------------------------------------------------------------
314
315  sxtb  w1, w2
316  sxth  w1, w2
317  uxtb  w1, w2
318  uxth  w1, w2
319
320; CHECK: sxtb w1, w2
321; CHECK: sxth w1, w2
322; CHECK: uxtb w1, w2
323; CHECK: uxth w1, w2
324
325  sxtb  x1, w2
326  sxth  x1, w2
327  sxtw  x1, w2
328  uxtb  x1, w2
329  uxth  x1, w2
330  uxtw  x1, w2
331
332; CHECK: sxtb x1, w2
333; CHECK: sxth x1, w2
334; CHECK: sxtw x1, w2
335; CHECK: uxtb w1, w2
336; CHECK: uxth w1, w2
337; CHECK: ubfx x1, x2, #0, #32
338
339;-----------------------------------------------------------------------------
340; Negate with carry
341;-----------------------------------------------------------------------------
342
343  ngc   w1, w2
344  ngc   x1, x2
345  ngcs  w1, w2
346  ngcs  x1, x2
347
348; CHECK: ngc  w1, w2
349; CHECK: ngc  x1, x2
350; CHECK: ngcs w1, w2
351; CHECK: ngcs x1, x2
352
353;-----------------------------------------------------------------------------
354; 6.6.1 Multiply aliases
355;-----------------------------------------------------------------------------
356
357  mneg   w1, w2, w3
358  mneg   x1, x2, x3
359  mul    w1, w2, w3
360  mul    x1, x2, x3
361  smnegl x1, w2, w3
362  umnegl x1, w2, w3
363  smull   x1, w2, w3
364  umull   x1, w2, w3
365
366; CHECK: mneg w1, w2, w3
367; CHECK: mneg x1, x2, x3
368; CHECK: mul w1, w2, w3
369; CHECK: mul x1, x2, x3
370; CHECK: smnegl x1, w2, w3
371; CHECK: umnegl x1, w2, w3
372; CHECK: smull x1, w2, w3
373; CHECK: umull x1, w2, w3
374
375;-----------------------------------------------------------------------------
376; Conditional select aliases
377;-----------------------------------------------------------------------------
378
379  cset   w1, eq
380  cset   x1, eq
381  csetm  w1, ne
382  csetm  x1, ne
383  cinc   w1, w2, lt
384  cinc   x1, x2, lt
385  cinv   w1, w2, mi
386  cinv   x1, x2, mi
387
388; CHECK: cset  w1, eq
389; CHECK: cset  x1, eq
390; CHECK: csetm  w1, ne
391; CHECK: csetm  x1, ne
392; CHECK: cinc  w1, w2, lt
393; CHECK: cinc  x1, x2, lt
394; CHECK: cinv  w1, w2, mi
395; CHECK: cinv  x1, x2, mi
396
397;-----------------------------------------------------------------------------
398; SYS aliases
399;-----------------------------------------------------------------------------
400
401  sys #0, c7, c1, #0
402; CHECK: ic ialluis
403  sys #0, c7, c5, #0
404; CHECK: ic iallu
405  sys #3, c7, c5, #1
406; CHECK: ic ivau
407
408  sys #3, c7, c4, #1
409; CHECK: dc zva
410  sys #0, c7, c6, #1
411; CHECK: dc ivac
412  sys #0, c7, c6, #2
413; CHECK: dc isw
414  sys #3, c7, c10, #1
415; CHECK: dc cvac
416  sys #0, c7, c10, #2
417; CHECK: dc csw
418  sys #3, c7, c11, #1
419; CHECK: dc cvau
420  sys #3, c7, c14, #1
421; CHECK: dc civac
422  sys #0, c7, c14, #2
423; CHECK: dc cisw
424
425  sys #0, c7, c8, #0
426; CHECK: at s1e1r
427  sys #4, c7, c8, #0
428; CHECK: at s1e2r
429  sys #6, c7, c8, #0
430; CHECK: at s1e3r
431  sys #0, c7, c8, #1
432; CHECK: at s1e1w
433  sys #4, c7, c8, #1
434; CHECK: at s1e2w
435  sys #6, c7, c8, #1
436; CHECK: at s1e3w
437  sys #0, c7, c8, #2
438; CHECK: at s1e0r
439  sys #0, c7, c8, #3
440; CHECK: at s1e0w
441  sys #4, c7, c8, #4
442; CHECK: at s12e1r
443  sys #4, c7, c8, #5
444; CHECK: at s12e1w
445  sys #4, c7, c8, #6
446; CHECK: at s12e0r
447  sys #4, c7, c8, #7
448; CHECK: at s12e0w
449
450  sys #0, c8, c3, #0
451; CHECK: tlbi vmalle1is
452  sys #4, c8, c3, #0
453; CHECK: tlbi alle2is
454  sys #6, c8, c3, #0
455; CHECK: tlbi alle3is
456  sys #0, c8, c3, #1
457; CHECK: tlbi vae1is
458  sys #4, c8, c3, #1
459; CHECK: tlbi vae2is
460  sys #6, c8, c3, #1
461; CHECK: tlbi vae3is
462  sys #0, c8, c3, #2
463; CHECK: tlbi aside1is
464  sys #0, c8, c3, #3
465; CHECK: tlbi vaae1is
466  sys #4, c8, c3, #4
467; CHECK: tlbi alle1is
468  sys #0, c8, c3, #5
469; CHECK: tlbi vale1is
470  sys #0, c8, c3, #7
471; CHECK: tlbi vaale1is
472  sys #0, c8, c7, #0
473; CHECK: tlbi vmalle1
474  sys #4, c8, c7, #0
475; CHECK: tlbi alle2
476  sys #4, c8, c3, #5
477; CHECK: tlbi vale2is
478  sys #6, c8, c3, #5
479; CHECK: tlbi vale3is
480  sys #6, c8, c7, #0
481; CHECK: tlbi alle3
482  sys #0, c8, c7, #1
483; CHECK: tlbi vae1
484  sys #4, c8, c7, #1
485; CHECK: tlbi vae2
486  sys #6, c8, c7, #1
487; CHECK: tlbi vae3
488  sys #0, c8, c7, #2
489; CHECK: tlbi aside1
490  sys #0, c8, c7, #3
491; CHECK: tlbi vaae1
492  sys #4, c8, c7, #4
493; CHECK: tlbi alle1
494  sys #0, c8, c7, #5
495; CHECK: tlbi vale1
496  sys #4, c8, c7, #5
497; CHECK: tlbi vale2
498  sys #6, c8, c7, #5
499; CHECK: tlbi vale3
500  sys #0, c8, c7, #7
501; CHECK: tlbi vaale1
502  sys #4, c8, c4, #1
503; CHECK: tlbi ipas2e1
504  sys #4, c8, c4, #5
505; CHECK: tlbi ipas2le1
506  sys #4, c8, c0, #1
507; CHECK: tlbi ipas2e1is
508  sys #4, c8, c0, #5
509; CHECK: tlbi ipas2le1is
510  sys #4, c8, c7, #6
511; CHECK: tlbi vmalls12e1
512  sys #4, c8, c3, #6
513; CHECK: tlbi vmalls12e1is
514
515  ic ialluis
516; CHECK: ic ialluis                 ; encoding: [0x1f,0x71,0x08,0xd5]
517  ic iallu
518; CHECK: ic iallu                   ; encoding: [0x1f,0x75,0x08,0xd5]
519  ic ivau, x0
520; CHECK: ic ivau, x0                ; encoding: [0x20,0x75,0x0b,0xd5]
521
522  dc zva, x0
523; CHECK: dc zva, x0                 ; encoding: [0x20,0x74,0x0b,0xd5]
524  dc ivac, x0
525; CHECK: dc ivac, x0                ; encoding: [0x20,0x76,0x08,0xd5]
526  dc isw, x0
527; CHECK: dc isw, x0                 ; encoding: [0x40,0x76,0x08,0xd5]
528  dc cvac, x0
529; CHECK: dc cvac, x0                ; encoding: [0x20,0x7a,0x0b,0xd5]
530  dc csw, x0
531; CHECK: dc csw, x0                 ; encoding: [0x40,0x7a,0x08,0xd5]
532  dc cvau, x0
533; CHECK: dc cvau, x0                ; encoding: [0x20,0x7b,0x0b,0xd5]
534  dc civac, x0
535; CHECK: dc civac, x0               ; encoding: [0x20,0x7e,0x0b,0xd5]
536  dc cisw, x0
537; CHECK: dc cisw, x0                ; encoding: [0x40,0x7e,0x08,0xd5]
538
539  at s1e1r, x0
540; CHECK: at s1e1r, x0               ; encoding: [0x00,0x78,0x08,0xd5]
541  at s1e2r, x0
542; CHECK: at s1e2r, x0               ; encoding: [0x00,0x78,0x0c,0xd5]
543  at s1e3r, x0
544; CHECK: at s1e3r, x0               ; encoding: [0x00,0x78,0x0e,0xd5]
545  at s1e1w, x0
546; CHECK: at s1e1w, x0               ; encoding: [0x20,0x78,0x08,0xd5]
547  at s1e2w, x0
548; CHECK: at s1e2w, x0               ; encoding: [0x20,0x78,0x0c,0xd5]
549  at s1e3w, x0
550; CHECK: at s1e3w, x0               ; encoding: [0x20,0x78,0x0e,0xd5]
551  at s1e0r, x0
552; CHECK: at s1e0r, x0               ; encoding: [0x40,0x78,0x08,0xd5]
553  at s1e0w, x0
554; CHECK: at s1e0w, x0               ; encoding: [0x60,0x78,0x08,0xd5]
555  at s12e1r, x0
556; CHECK: at s12e1r, x0              ; encoding: [0x80,0x78,0x0c,0xd5]
557  at s12e1w, x0
558; CHECK: at s12e1w, x0              ; encoding: [0xa0,0x78,0x0c,0xd5]
559  at s12e0r, x0
560; CHECK: at s12e0r, x0              ; encoding: [0xc0,0x78,0x0c,0xd5]
561  at s12e0w, x0
562; CHECK: at s12e0w, x0              ; encoding: [0xe0,0x78,0x0c,0xd5]
563
564  tlbi vmalle1is
565; CHECK: tlbi vmalle1is             ; encoding: [0x1f,0x83,0x08,0xd5]
566  tlbi alle2is
567; CHECK: tlbi alle2is               ; encoding: [0x1f,0x83,0x0c,0xd5]
568  tlbi alle3is
569; CHECK: tlbi alle3is               ; encoding: [0x1f,0x83,0x0e,0xd5]
570  tlbi vae1is, x0
571; CHECK: tlbi vae1is, x0            ; encoding: [0x20,0x83,0x08,0xd5]
572  tlbi vae2is, x0
573; CHECK: tlbi vae2is, x0            ; encoding: [0x20,0x83,0x0c,0xd5]
574  tlbi vae3is, x0
575; CHECK: tlbi vae3is, x0            ; encoding: [0x20,0x83,0x0e,0xd5]
576  tlbi aside1is, x0
577; CHECK: tlbi aside1is, x0          ; encoding: [0x40,0x83,0x08,0xd5]
578  tlbi vaae1is, x0
579; CHECK: tlbi vaae1is, x0           ; encoding: [0x60,0x83,0x08,0xd5]
580  tlbi alle1is
581; CHECK: tlbi alle1is               ; encoding: [0x9f,0x83,0x0c,0xd5]
582  tlbi vale1is, x0
583; CHECK: tlbi vale1is, x0           ; encoding: [0xa0,0x83,0x08,0xd5]
584  tlbi vaale1is, x0
585; CHECK: tlbi vaale1is, x0          ; encoding: [0xe0,0x83,0x08,0xd5]
586  tlbi vmalle1
587; CHECK: tlbi vmalle1               ; encoding: [0x1f,0x87,0x08,0xd5]
588  tlbi alle2
589; CHECK: tlbi alle2                 ; encoding: [0x1f,0x87,0x0c,0xd5]
590  tlbi vale2is, x0
591; CHECK: tlbi vale2is, x0           ; encoding: [0xa0,0x83,0x0c,0xd5]
592  tlbi vale3is, x0
593; CHECK: tlbi vale3is, x0           ; encoding: [0xa0,0x83,0x0e,0xd5]
594  tlbi alle3
595; CHECK: tlbi alle3                 ; encoding: [0x1f,0x87,0x0e,0xd5]
596  tlbi vae1, x0
597; CHECK: tlbi vae1, x0              ; encoding: [0x20,0x87,0x08,0xd5]
598  tlbi vae2, x0
599; CHECK: tlbi vae2, x0              ; encoding: [0x20,0x87,0x0c,0xd5]
600  tlbi vae3, x0
601; CHECK: tlbi vae3, x0              ; encoding: [0x20,0x87,0x0e,0xd5]
602  tlbi aside1, x0
603; CHECK: tlbi aside1, x0            ; encoding: [0x40,0x87,0x08,0xd5]
604  tlbi vaae1, x0
605; CHECK: tlbi vaae1, x0             ; encoding: [0x60,0x87,0x08,0xd5]
606  tlbi alle1
607; CHECK: tlbi alle1                 ; encoding: [0x9f,0x87,0x0c,0xd5
608  tlbi vale1, x0
609; CHECK: tlbi vale1, x0             ; encoding: [0xa0,0x87,0x08,0xd5]
610  tlbi vale2, x0
611; CHECK: tlbi vale2, x0             ; encoding: [0xa0,0x87,0x0c,0xd5]
612  tlbi vale3, x0
613; CHECK: tlbi vale3, x0             ; encoding: [0xa0,0x87,0x0e,0xd5]
614  tlbi vaale1, x0
615; CHECK: tlbi vaale1, x0            ; encoding: [0xe0,0x87,0x08,0xd5]
616  tlbi ipas2e1, x0
617; CHECK: tlbi ipas2e1, x0           ; encoding: [0x20,0x84,0x0c,0xd5]
618  tlbi ipas2le1, x0
619; CHECK: tlbi ipas2le1, x0          ; encoding: [0xa0,0x84,0x0c,0xd5]
620  tlbi ipas2e1is, x0
621; CHECK: tlbi ipas2e1is, x0         ; encoding: [0x20,0x80,0x0c,0xd5]
622  tlbi ipas2le1is, x0
623; CHECK: tlbi ipas2le1is, x0        ; encoding: [0xa0,0x80,0x0c,0xd5]
624  tlbi vmalls12e1
625; CHECK: tlbi vmalls12e1            ; encoding: [0xdf,0x87,0x0c,0xd5]
626  tlbi vmalls12e1is
627; CHECK: tlbi vmalls12e1is          ; encoding: [0xdf,0x83,0x0c,0xd5]
628
629;-----------------------------------------------------------------------------
630; 5.8.5 Vector Arithmetic aliases
631;-----------------------------------------------------------------------------
632
633  cmls.8b v0, v2, v1
634  cmls.16b v0, v2, v1
635  cmls.4h v0, v2, v1
636  cmls.8h v0, v2, v1
637  cmls.2s v0, v2, v1
638  cmls.4s v0, v2, v1
639  cmls.2d v0, v2, v1
640; CHECK: cmhs.8b v0, v1, v2
641; CHECK: cmhs.16b v0, v1, v2
642; CHECK: cmhs.4h v0, v1, v2
643; CHECK: cmhs.8h v0, v1, v2
644; CHECK: cmhs.2s v0, v1, v2
645; CHECK: cmhs.4s v0, v1, v2
646; CHECK: cmhs.2d v0, v1, v2
647
648  cmlo.8b v0, v2, v1
649  cmlo.16b v0, v2, v1
650  cmlo.4h v0, v2, v1
651  cmlo.8h v0, v2, v1
652  cmlo.2s v0, v2, v1
653  cmlo.4s v0, v2, v1
654  cmlo.2d v0, v2, v1
655; CHECK: cmhi.8b v0, v1, v2
656; CHECK: cmhi.16b v0, v1, v2
657; CHECK: cmhi.4h v0, v1, v2
658; CHECK: cmhi.8h v0, v1, v2
659; CHECK: cmhi.2s v0, v1, v2
660; CHECK: cmhi.4s v0, v1, v2
661; CHECK: cmhi.2d v0, v1, v2
662
663  cmle.8b v0, v2, v1
664  cmle.16b v0, v2, v1
665  cmle.4h v0, v2, v1
666  cmle.8h  v0, v2, v1
667  cmle.2s v0, v2, v1
668  cmle.4s v0, v2, v1
669  cmle.2d v0, v2, v1
670; CHECK: cmge.8b v0, v1, v2
671; CHECK: cmge.16b v0, v1, v2
672; CHECK: cmge.4h v0, v1, v2
673; CHECK: cmge.8h v0, v1, v2
674; CHECK: cmge.2s v0, v1, v2
675; CHECK: cmge.4s v0, v1, v2
676; CHECK: cmge.2d v0, v1, v2
677
678  cmlt.8b v0, v2, v1
679  cmlt.16b v0, v2, v1
680  cmlt.4h v0, v2, v1
681  cmlt.8h  v0, v2, v1
682  cmlt.2s v0, v2, v1
683  cmlt.4s v0, v2, v1
684  cmlt.2d v0, v2, v1
685; CHECK: cmgt.8b v0, v1, v2
686; CHECK: cmgt.16b v0, v1, v2
687; CHECK: cmgt.4h v0, v1, v2
688; CHECK: cmgt.8h v0, v1, v2
689; CHECK: cmgt.2s v0, v1, v2
690; CHECK: cmgt.4s v0, v1, v2
691; CHECK: cmgt.2d v0, v1, v2
692
693  fcmle.2s v0, v2, v1
694  fcmle.4s v0, v2, v1
695  fcmle.2d v0, v2, v1
696; CHECK: fcmge.2s v0, v1, v2
697; CHECK: fcmge.4s v0, v1, v2
698; CHECK: fcmge.2d v0, v1, v2
699
700  fcmlt.2s v0, v2, v1
701  fcmlt.4s v0, v2, v1
702  fcmlt.2d v0, v2, v1
703; CHECK: fcmgt.2s v0, v1, v2
704; CHECK: fcmgt.4s v0, v1, v2
705; CHECK: fcmgt.2d v0, v1, v2
706
707  facle.2s v0, v2, v1
708  facle.4s v0, v2, v1
709  facle.2d v0, v2, v1
710; CHECK: facge.2s v0, v1, v2
711; CHECK: facge.4s v0, v1, v2
712; CHECK: facge.2d v0, v1, v2
713
714  faclt.2s v0, v2, v1
715  faclt.4s v0, v2, v1
716  faclt.2d v0, v2, v1
717; CHECK: facgt.2s v0, v1, v2
718; CHECK: facgt.4s v0, v1, v2
719; CHECK: facgt.2d v0, v1, v2
720
721;-----------------------------------------------------------------------------
722; 5.8.6 Scalar Arithmetic aliases
723;-----------------------------------------------------------------------------
724
725  cmls d0, d2, d1
726; CHECK: cmhs d0, d1, d2
727
728  cmle d0, d2, d1
729; CHECK: cmge d0, d1, d2
730
731  cmlo d0, d2, d1
732; CHECK: cmhi d0, d1, d2
733
734  cmlt d0, d2, d1
735; CHECK: cmgt d0, d1, d2
736
737  fcmle s0, s2, s1
738  fcmle d0, d2, d1
739; CHECK: fcmge s0, s1, s2
740; CHECK: fcmge d0, d1, d2
741
742  fcmlt s0, s2, s1
743  fcmlt d0, d2, d1
744; CHECK: fcmgt s0, s1, s2
745; CHECK: fcmgt d0, d1, d2
746
747  facle s0, s2, s1
748  facle d0, d2, d1
749; CHECK: facge s0, s1, s2
750; CHECK: facge d0, d1, d2
751
752  faclt s0, s2, s1
753  faclt d0, d2, d1
754; CHECK: facgt s0, s1, s2
755; CHECK: facgt d0, d1, d2
756
757;-----------------------------------------------------------------------------
758; 5.8.14 Vector Shift (immediate)
759;-----------------------------------------------------------------------------
760  sxtl v1.8h, v2.8b
761; CHECK: sshll.8h v1, v2, #0
762  sxtl.8h v1, v2
763; CHECK: sshll.8h v1, v2, #0
764
765  sxtl v1.4s, v2.4h
766; CHECK: sshll.4s v1, v2, #0
767  sxtl.4s v1, v2
768; CHECK: sshll.4s v1, v2, #0
769
770  sxtl v1.2d, v2.2s
771; CHECK: sshll.2d v1, v2, #0
772  sxtl.2d v1, v2
773; CHECK: sshll.2d v1, v2, #0
774
775  sxtl2 v1.8h, v2.16b
776; CHECK: sshll2.8h v1, v2, #0
777  sxtl2.8h v1, v2
778; CHECK: sshll2.8h v1, v2, #0
779
780  sxtl2 v1.4s, v2.8h
781; CHECK: sshll2.4s v1, v2, #0
782  sxtl2.4s v1, v2
783; CHECK: sshll2.4s v1, v2, #0
784
785  sxtl2 v1.2d, v2.4s
786; CHECK: sshll2.2d v1, v2, #0
787  sxtl2.2d v1, v2
788; CHECK: sshll2.2d v1, v2, #0
789
790  uxtl v1.8h, v2.8b
791; CHECK: ushll.8h v1, v2, #0
792  uxtl.8h v1, v2
793; CHECK: ushll.8h v1, v2, #0
794
795  uxtl v1.4s, v2.4h
796; CHECK: ushll.4s v1, v2, #0
797  uxtl.4s v1, v2
798; CHECK: ushll.4s v1, v2, #0
799
800  uxtl v1.2d, v2.2s
801; CHECK: ushll.2d v1, v2, #0
802  uxtl.2d v1, v2
803; CHECK: ushll.2d v1, v2, #0
804
805  uxtl2 v1.8h, v2.16b
806; CHECK: ushll2.8h v1, v2, #0
807  uxtl2.8h v1, v2
808; CHECK: ushll2.8h v1, v2, #0
809
810  uxtl2 v1.4s, v2.8h
811; CHECK: ushll2.4s v1, v2, #0
812  uxtl2.4s v1, v2
813; CHECK: ushll2.4s v1, v2, #0
814
815  uxtl2 v1.2d, v2.4s
816; CHECK: ushll2.2d v1, v2, #0
817  uxtl2.2d v1, v2
818; CHECK: ushll2.2d v1, v2, #0
819
820
821;-----------------------------------------------------------------------------
822; MOVI verbose syntax with shift operand omitted.
823;-----------------------------------------------------------------------------
824  movi v4.16b, #0x00
825  movi v4.16B, #0x01
826  movi v4.8b, #0x02
827  movi v4.8B, #0x03
828  movi v1.2d, #0x000000000000ff
829  movi v2.2D, #0x000000000000ff
830
831; CHECK: movi.16b	v4, #0x0              ; encoding: [0x04,0xe4,0x00,0x4f]
832; CHECK: movi.16b	v4, #0x1              ; encoding: [0x24,0xe4,0x00,0x4f]
833; CHECK: movi.8b	v4, #0x2               ; encoding: [0x44,0xe4,0x00,0x0f]
834; CHECK: movi.8b	v4, #0x3               ; encoding: [0x64,0xe4,0x00,0x0f]
835; CHECK: movi.2d	v1, #0x000000000000ff ; encoding: [0x21,0xe4,0x00,0x6f]
836; CHECK: movi.2d	v2, #0x000000000000ff ; encoding: [0x22,0xe4,0x00,0x6f]
837