assembler_mips64_test.cc revision 2dec927e60395210946e5b9dbaa03111dad2466a
1/* 2 * Copyright (C) 2015 The Android Open Source Project 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17#include "assembler_mips64.h" 18 19#include <inttypes.h> 20#include <map> 21#include <random> 22 23#include "base/bit_utils.h" 24#include "base/stl_util.h" 25#include "utils/assembler_test.h" 26 27#define __ GetAssembler()-> 28 29namespace art { 30 31struct MIPS64CpuRegisterCompare { 32 bool operator()(const mips64::GpuRegister& a, const mips64::GpuRegister& b) const { 33 return a < b; 34 } 35}; 36 37class AssemblerMIPS64Test : public AssemblerTest<mips64::Mips64Assembler, 38 mips64::GpuRegister, 39 mips64::FpuRegister, 40 uint32_t, 41 mips64::VectorRegister> { 42 public: 43 typedef AssemblerTest<mips64::Mips64Assembler, 44 mips64::GpuRegister, 45 mips64::FpuRegister, 46 uint32_t, 47 mips64::VectorRegister> Base; 48 49 AssemblerMIPS64Test() 50 : instruction_set_features_(Mips64InstructionSetFeatures::FromVariant("default", nullptr)) {} 51 52 protected: 53 // Get the typically used name for this architecture, e.g., aarch64, x86-64, ... 54 std::string GetArchitectureString() OVERRIDE { 55 return "mips64"; 56 } 57 58 std::string GetAssemblerCmdName() OVERRIDE { 59 // We assemble and link for MIPS64R6. See GetAssemblerParameters() for details. 60 return "gcc"; 61 } 62 63 std::string GetAssemblerParameters() OVERRIDE { 64 // We assemble and link for MIPS64R6. The reason is that object files produced for MIPS64R6 65 // (and MIPS32R6) with the GNU assembler don't have correct final offsets in PC-relative 66 // branches in the .text section and so they require a relocation pass (there's a relocation 67 // section, .rela.text, that has the needed info to fix up the branches). 68 return " -march=mips64r6 -mmsa -Wa,--no-warn -Wl,-Ttext=0 -Wl,-e0 -nostdlib"; 69 } 70 71 void Pad(std::vector<uint8_t>& data) OVERRIDE { 72 // The GNU linker unconditionally pads the code segment with NOPs to a size that is a multiple 73 // of 16 and there doesn't appear to be a way to suppress this padding. Our assembler doesn't 74 // pad, so, in order for two assembler outputs to match, we need to match the padding as well. 75 // NOP is encoded as four zero bytes on MIPS. 76 size_t pad_size = RoundUp(data.size(), 16u) - data.size(); 77 data.insert(data.end(), pad_size, 0); 78 } 79 80 std::string GetDisassembleParameters() OVERRIDE { 81 return " -D -bbinary -mmips:isa64r6"; 82 } 83 84 mips64::Mips64Assembler* CreateAssembler(ArenaAllocator* arena) OVERRIDE { 85 return new (arena) mips64::Mips64Assembler(arena, instruction_set_features_.get()); 86 } 87 88 void SetUpHelpers() OVERRIDE { 89 if (registers_.size() == 0) { 90 registers_.push_back(new mips64::GpuRegister(mips64::ZERO)); 91 registers_.push_back(new mips64::GpuRegister(mips64::AT)); 92 registers_.push_back(new mips64::GpuRegister(mips64::V0)); 93 registers_.push_back(new mips64::GpuRegister(mips64::V1)); 94 registers_.push_back(new mips64::GpuRegister(mips64::A0)); 95 registers_.push_back(new mips64::GpuRegister(mips64::A1)); 96 registers_.push_back(new mips64::GpuRegister(mips64::A2)); 97 registers_.push_back(new mips64::GpuRegister(mips64::A3)); 98 registers_.push_back(new mips64::GpuRegister(mips64::A4)); 99 registers_.push_back(new mips64::GpuRegister(mips64::A5)); 100 registers_.push_back(new mips64::GpuRegister(mips64::A6)); 101 registers_.push_back(new mips64::GpuRegister(mips64::A7)); 102 registers_.push_back(new mips64::GpuRegister(mips64::T0)); 103 registers_.push_back(new mips64::GpuRegister(mips64::T1)); 104 registers_.push_back(new mips64::GpuRegister(mips64::T2)); 105 registers_.push_back(new mips64::GpuRegister(mips64::T3)); 106 registers_.push_back(new mips64::GpuRegister(mips64::S0)); 107 registers_.push_back(new mips64::GpuRegister(mips64::S1)); 108 registers_.push_back(new mips64::GpuRegister(mips64::S2)); 109 registers_.push_back(new mips64::GpuRegister(mips64::S3)); 110 registers_.push_back(new mips64::GpuRegister(mips64::S4)); 111 registers_.push_back(new mips64::GpuRegister(mips64::S5)); 112 registers_.push_back(new mips64::GpuRegister(mips64::S6)); 113 registers_.push_back(new mips64::GpuRegister(mips64::S7)); 114 registers_.push_back(new mips64::GpuRegister(mips64::T8)); 115 registers_.push_back(new mips64::GpuRegister(mips64::T9)); 116 registers_.push_back(new mips64::GpuRegister(mips64::K0)); 117 registers_.push_back(new mips64::GpuRegister(mips64::K1)); 118 registers_.push_back(new mips64::GpuRegister(mips64::GP)); 119 registers_.push_back(new mips64::GpuRegister(mips64::SP)); 120 registers_.push_back(new mips64::GpuRegister(mips64::S8)); 121 registers_.push_back(new mips64::GpuRegister(mips64::RA)); 122 123 secondary_register_names_.emplace(mips64::GpuRegister(mips64::ZERO), "zero"); 124 secondary_register_names_.emplace(mips64::GpuRegister(mips64::AT), "at"); 125 secondary_register_names_.emplace(mips64::GpuRegister(mips64::V0), "v0"); 126 secondary_register_names_.emplace(mips64::GpuRegister(mips64::V1), "v1"); 127 secondary_register_names_.emplace(mips64::GpuRegister(mips64::A0), "a0"); 128 secondary_register_names_.emplace(mips64::GpuRegister(mips64::A1), "a1"); 129 secondary_register_names_.emplace(mips64::GpuRegister(mips64::A2), "a2"); 130 secondary_register_names_.emplace(mips64::GpuRegister(mips64::A3), "a3"); 131 secondary_register_names_.emplace(mips64::GpuRegister(mips64::A4), "a4"); 132 secondary_register_names_.emplace(mips64::GpuRegister(mips64::A5), "a5"); 133 secondary_register_names_.emplace(mips64::GpuRegister(mips64::A6), "a6"); 134 secondary_register_names_.emplace(mips64::GpuRegister(mips64::A7), "a7"); 135 secondary_register_names_.emplace(mips64::GpuRegister(mips64::T0), "t0"); 136 secondary_register_names_.emplace(mips64::GpuRegister(mips64::T1), "t1"); 137 secondary_register_names_.emplace(mips64::GpuRegister(mips64::T2), "t2"); 138 secondary_register_names_.emplace(mips64::GpuRegister(mips64::T3), "t3"); 139 secondary_register_names_.emplace(mips64::GpuRegister(mips64::S0), "s0"); 140 secondary_register_names_.emplace(mips64::GpuRegister(mips64::S1), "s1"); 141 secondary_register_names_.emplace(mips64::GpuRegister(mips64::S2), "s2"); 142 secondary_register_names_.emplace(mips64::GpuRegister(mips64::S3), "s3"); 143 secondary_register_names_.emplace(mips64::GpuRegister(mips64::S4), "s4"); 144 secondary_register_names_.emplace(mips64::GpuRegister(mips64::S5), "s5"); 145 secondary_register_names_.emplace(mips64::GpuRegister(mips64::S6), "s6"); 146 secondary_register_names_.emplace(mips64::GpuRegister(mips64::S7), "s7"); 147 secondary_register_names_.emplace(mips64::GpuRegister(mips64::T8), "t8"); 148 secondary_register_names_.emplace(mips64::GpuRegister(mips64::T9), "t9"); 149 secondary_register_names_.emplace(mips64::GpuRegister(mips64::K0), "k0"); 150 secondary_register_names_.emplace(mips64::GpuRegister(mips64::K1), "k1"); 151 secondary_register_names_.emplace(mips64::GpuRegister(mips64::GP), "gp"); 152 secondary_register_names_.emplace(mips64::GpuRegister(mips64::SP), "sp"); 153 secondary_register_names_.emplace(mips64::GpuRegister(mips64::S8), "s8"); 154 secondary_register_names_.emplace(mips64::GpuRegister(mips64::RA), "ra"); 155 156 fp_registers_.push_back(new mips64::FpuRegister(mips64::F0)); 157 fp_registers_.push_back(new mips64::FpuRegister(mips64::F1)); 158 fp_registers_.push_back(new mips64::FpuRegister(mips64::F2)); 159 fp_registers_.push_back(new mips64::FpuRegister(mips64::F3)); 160 fp_registers_.push_back(new mips64::FpuRegister(mips64::F4)); 161 fp_registers_.push_back(new mips64::FpuRegister(mips64::F5)); 162 fp_registers_.push_back(new mips64::FpuRegister(mips64::F6)); 163 fp_registers_.push_back(new mips64::FpuRegister(mips64::F7)); 164 fp_registers_.push_back(new mips64::FpuRegister(mips64::F8)); 165 fp_registers_.push_back(new mips64::FpuRegister(mips64::F9)); 166 fp_registers_.push_back(new mips64::FpuRegister(mips64::F10)); 167 fp_registers_.push_back(new mips64::FpuRegister(mips64::F11)); 168 fp_registers_.push_back(new mips64::FpuRegister(mips64::F12)); 169 fp_registers_.push_back(new mips64::FpuRegister(mips64::F13)); 170 fp_registers_.push_back(new mips64::FpuRegister(mips64::F14)); 171 fp_registers_.push_back(new mips64::FpuRegister(mips64::F15)); 172 fp_registers_.push_back(new mips64::FpuRegister(mips64::F16)); 173 fp_registers_.push_back(new mips64::FpuRegister(mips64::F17)); 174 fp_registers_.push_back(new mips64::FpuRegister(mips64::F18)); 175 fp_registers_.push_back(new mips64::FpuRegister(mips64::F19)); 176 fp_registers_.push_back(new mips64::FpuRegister(mips64::F20)); 177 fp_registers_.push_back(new mips64::FpuRegister(mips64::F21)); 178 fp_registers_.push_back(new mips64::FpuRegister(mips64::F22)); 179 fp_registers_.push_back(new mips64::FpuRegister(mips64::F23)); 180 fp_registers_.push_back(new mips64::FpuRegister(mips64::F24)); 181 fp_registers_.push_back(new mips64::FpuRegister(mips64::F25)); 182 fp_registers_.push_back(new mips64::FpuRegister(mips64::F26)); 183 fp_registers_.push_back(new mips64::FpuRegister(mips64::F27)); 184 fp_registers_.push_back(new mips64::FpuRegister(mips64::F28)); 185 fp_registers_.push_back(new mips64::FpuRegister(mips64::F29)); 186 fp_registers_.push_back(new mips64::FpuRegister(mips64::F30)); 187 fp_registers_.push_back(new mips64::FpuRegister(mips64::F31)); 188 189 vec_registers_.push_back(new mips64::VectorRegister(mips64::W0)); 190 vec_registers_.push_back(new mips64::VectorRegister(mips64::W1)); 191 vec_registers_.push_back(new mips64::VectorRegister(mips64::W2)); 192 vec_registers_.push_back(new mips64::VectorRegister(mips64::W3)); 193 vec_registers_.push_back(new mips64::VectorRegister(mips64::W4)); 194 vec_registers_.push_back(new mips64::VectorRegister(mips64::W5)); 195 vec_registers_.push_back(new mips64::VectorRegister(mips64::W6)); 196 vec_registers_.push_back(new mips64::VectorRegister(mips64::W7)); 197 vec_registers_.push_back(new mips64::VectorRegister(mips64::W8)); 198 vec_registers_.push_back(new mips64::VectorRegister(mips64::W9)); 199 vec_registers_.push_back(new mips64::VectorRegister(mips64::W10)); 200 vec_registers_.push_back(new mips64::VectorRegister(mips64::W11)); 201 vec_registers_.push_back(new mips64::VectorRegister(mips64::W12)); 202 vec_registers_.push_back(new mips64::VectorRegister(mips64::W13)); 203 vec_registers_.push_back(new mips64::VectorRegister(mips64::W14)); 204 vec_registers_.push_back(new mips64::VectorRegister(mips64::W15)); 205 vec_registers_.push_back(new mips64::VectorRegister(mips64::W16)); 206 vec_registers_.push_back(new mips64::VectorRegister(mips64::W17)); 207 vec_registers_.push_back(new mips64::VectorRegister(mips64::W18)); 208 vec_registers_.push_back(new mips64::VectorRegister(mips64::W19)); 209 vec_registers_.push_back(new mips64::VectorRegister(mips64::W20)); 210 vec_registers_.push_back(new mips64::VectorRegister(mips64::W21)); 211 vec_registers_.push_back(new mips64::VectorRegister(mips64::W22)); 212 vec_registers_.push_back(new mips64::VectorRegister(mips64::W23)); 213 vec_registers_.push_back(new mips64::VectorRegister(mips64::W24)); 214 vec_registers_.push_back(new mips64::VectorRegister(mips64::W25)); 215 vec_registers_.push_back(new mips64::VectorRegister(mips64::W26)); 216 vec_registers_.push_back(new mips64::VectorRegister(mips64::W27)); 217 vec_registers_.push_back(new mips64::VectorRegister(mips64::W28)); 218 vec_registers_.push_back(new mips64::VectorRegister(mips64::W29)); 219 vec_registers_.push_back(new mips64::VectorRegister(mips64::W30)); 220 vec_registers_.push_back(new mips64::VectorRegister(mips64::W31)); 221 } 222 } 223 224 void TearDown() OVERRIDE { 225 AssemblerTest::TearDown(); 226 STLDeleteElements(®isters_); 227 STLDeleteElements(&fp_registers_); 228 STLDeleteElements(&vec_registers_); 229 } 230 231 std::vector<mips64::GpuRegister*> GetRegisters() OVERRIDE { 232 return registers_; 233 } 234 235 std::vector<mips64::FpuRegister*> GetFPRegisters() OVERRIDE { 236 return fp_registers_; 237 } 238 239 std::vector<mips64::VectorRegister*> GetVectorRegisters() OVERRIDE { 240 return vec_registers_; 241 } 242 243 uint32_t CreateImmediate(int64_t imm_value) OVERRIDE { 244 return imm_value; 245 } 246 247 std::string GetSecondaryRegisterName(const mips64::GpuRegister& reg) OVERRIDE { 248 CHECK(secondary_register_names_.find(reg) != secondary_register_names_.end()); 249 return secondary_register_names_[reg]; 250 } 251 252 std::string RepeatInsn(size_t count, const std::string& insn) { 253 std::string result; 254 for (; count != 0u; --count) { 255 result += insn; 256 } 257 return result; 258 } 259 260 void BranchCondOneRegHelper(void (mips64::Mips64Assembler::*f)(mips64::GpuRegister, 261 mips64::Mips64Label*), 262 const std::string& instr_name) { 263 mips64::Mips64Label label; 264 (Base::GetAssembler()->*f)(mips64::A0, &label); 265 constexpr size_t kAdduCount1 = 63; 266 for (size_t i = 0; i != kAdduCount1; ++i) { 267 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO); 268 } 269 __ Bind(&label); 270 constexpr size_t kAdduCount2 = 64; 271 for (size_t i = 0; i != kAdduCount2; ++i) { 272 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO); 273 } 274 (Base::GetAssembler()->*f)(mips64::A1, &label); 275 276 std::string expected = 277 ".set noreorder\n" + 278 instr_name + " $a0, 1f\n" 279 "nop\n" + 280 RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") + 281 "1:\n" + 282 RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") + 283 instr_name + " $a1, 1b\n" 284 "nop\n"; 285 DriverStr(expected, instr_name); 286 } 287 288 void BranchCondTwoRegsHelper(void (mips64::Mips64Assembler::*f)(mips64::GpuRegister, 289 mips64::GpuRegister, 290 mips64::Mips64Label*), 291 const std::string& instr_name) { 292 mips64::Mips64Label label; 293 (Base::GetAssembler()->*f)(mips64::A0, mips64::A1, &label); 294 constexpr size_t kAdduCount1 = 63; 295 for (size_t i = 0; i != kAdduCount1; ++i) { 296 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO); 297 } 298 __ Bind(&label); 299 constexpr size_t kAdduCount2 = 64; 300 for (size_t i = 0; i != kAdduCount2; ++i) { 301 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO); 302 } 303 (Base::GetAssembler()->*f)(mips64::A2, mips64::A3, &label); 304 305 std::string expected = 306 ".set noreorder\n" + 307 instr_name + " $a0, $a1, 1f\n" 308 "nop\n" + 309 RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") + 310 "1:\n" + 311 RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") + 312 instr_name + " $a2, $a3, 1b\n" 313 "nop\n"; 314 DriverStr(expected, instr_name); 315 } 316 317 private: 318 std::vector<mips64::GpuRegister*> registers_; 319 std::map<mips64::GpuRegister, std::string, MIPS64CpuRegisterCompare> secondary_register_names_; 320 321 std::vector<mips64::FpuRegister*> fp_registers_; 322 std::vector<mips64::VectorRegister*> vec_registers_; 323 324 std::unique_ptr<const Mips64InstructionSetFeatures> instruction_set_features_; 325}; 326 327TEST_F(AssemblerMIPS64Test, Toolchain) { 328 EXPECT_TRUE(CheckTools()); 329} 330 331/////////////////// 332// FP Operations // 333/////////////////// 334 335TEST_F(AssemblerMIPS64Test, AddS) { 336 DriverStr(RepeatFFF(&mips64::Mips64Assembler::AddS, "add.s ${reg1}, ${reg2}, ${reg3}"), "add.s"); 337} 338 339TEST_F(AssemblerMIPS64Test, AddD) { 340 DriverStr(RepeatFFF(&mips64::Mips64Assembler::AddD, "add.d ${reg1}, ${reg2}, ${reg3}"), "add.d"); 341} 342 343TEST_F(AssemblerMIPS64Test, SubS) { 344 DriverStr(RepeatFFF(&mips64::Mips64Assembler::SubS, "sub.s ${reg1}, ${reg2}, ${reg3}"), "sub.s"); 345} 346 347TEST_F(AssemblerMIPS64Test, SubD) { 348 DriverStr(RepeatFFF(&mips64::Mips64Assembler::SubD, "sub.d ${reg1}, ${reg2}, ${reg3}"), "sub.d"); 349} 350 351TEST_F(AssemblerMIPS64Test, MulS) { 352 DriverStr(RepeatFFF(&mips64::Mips64Assembler::MulS, "mul.s ${reg1}, ${reg2}, ${reg3}"), "mul.s"); 353} 354 355TEST_F(AssemblerMIPS64Test, MulD) { 356 DriverStr(RepeatFFF(&mips64::Mips64Assembler::MulD, "mul.d ${reg1}, ${reg2}, ${reg3}"), "mul.d"); 357} 358 359TEST_F(AssemblerMIPS64Test, DivS) { 360 DriverStr(RepeatFFF(&mips64::Mips64Assembler::DivS, "div.s ${reg1}, ${reg2}, ${reg3}"), "div.s"); 361} 362 363TEST_F(AssemblerMIPS64Test, DivD) { 364 DriverStr(RepeatFFF(&mips64::Mips64Assembler::DivD, "div.d ${reg1}, ${reg2}, ${reg3}"), "div.d"); 365} 366 367TEST_F(AssemblerMIPS64Test, SqrtS) { 368 DriverStr(RepeatFF(&mips64::Mips64Assembler::SqrtS, "sqrt.s ${reg1}, ${reg2}"), "sqrt.s"); 369} 370 371TEST_F(AssemblerMIPS64Test, SqrtD) { 372 DriverStr(RepeatFF(&mips64::Mips64Assembler::SqrtD, "sqrt.d ${reg1}, ${reg2}"), "sqrt.d"); 373} 374 375TEST_F(AssemblerMIPS64Test, AbsS) { 376 DriverStr(RepeatFF(&mips64::Mips64Assembler::AbsS, "abs.s ${reg1}, ${reg2}"), "abs.s"); 377} 378 379TEST_F(AssemblerMIPS64Test, AbsD) { 380 DriverStr(RepeatFF(&mips64::Mips64Assembler::AbsD, "abs.d ${reg1}, ${reg2}"), "abs.d"); 381} 382 383TEST_F(AssemblerMIPS64Test, MovS) { 384 DriverStr(RepeatFF(&mips64::Mips64Assembler::MovS, "mov.s ${reg1}, ${reg2}"), "mov.s"); 385} 386 387TEST_F(AssemblerMIPS64Test, MovD) { 388 DriverStr(RepeatFF(&mips64::Mips64Assembler::MovD, "mov.d ${reg1}, ${reg2}"), "mov.d"); 389} 390 391TEST_F(AssemblerMIPS64Test, NegS) { 392 DriverStr(RepeatFF(&mips64::Mips64Assembler::NegS, "neg.s ${reg1}, ${reg2}"), "neg.s"); 393} 394 395TEST_F(AssemblerMIPS64Test, NegD) { 396 DriverStr(RepeatFF(&mips64::Mips64Assembler::NegD, "neg.d ${reg1}, ${reg2}"), "neg.d"); 397} 398 399TEST_F(AssemblerMIPS64Test, RoundLS) { 400 DriverStr(RepeatFF(&mips64::Mips64Assembler::RoundLS, "round.l.s ${reg1}, ${reg2}"), "round.l.s"); 401} 402 403TEST_F(AssemblerMIPS64Test, RoundLD) { 404 DriverStr(RepeatFF(&mips64::Mips64Assembler::RoundLD, "round.l.d ${reg1}, ${reg2}"), "round.l.d"); 405} 406 407TEST_F(AssemblerMIPS64Test, RoundWS) { 408 DriverStr(RepeatFF(&mips64::Mips64Assembler::RoundWS, "round.w.s ${reg1}, ${reg2}"), "round.w.s"); 409} 410 411TEST_F(AssemblerMIPS64Test, RoundWD) { 412 DriverStr(RepeatFF(&mips64::Mips64Assembler::RoundWD, "round.w.d ${reg1}, ${reg2}"), "round.w.d"); 413} 414 415TEST_F(AssemblerMIPS64Test, CeilLS) { 416 DriverStr(RepeatFF(&mips64::Mips64Assembler::CeilLS, "ceil.l.s ${reg1}, ${reg2}"), "ceil.l.s"); 417} 418 419TEST_F(AssemblerMIPS64Test, CeilLD) { 420 DriverStr(RepeatFF(&mips64::Mips64Assembler::CeilLD, "ceil.l.d ${reg1}, ${reg2}"), "ceil.l.d"); 421} 422 423TEST_F(AssemblerMIPS64Test, CeilWS) { 424 DriverStr(RepeatFF(&mips64::Mips64Assembler::CeilWS, "ceil.w.s ${reg1}, ${reg2}"), "ceil.w.s"); 425} 426 427TEST_F(AssemblerMIPS64Test, CeilWD) { 428 DriverStr(RepeatFF(&mips64::Mips64Assembler::CeilWD, "ceil.w.d ${reg1}, ${reg2}"), "ceil.w.d"); 429} 430 431TEST_F(AssemblerMIPS64Test, FloorLS) { 432 DriverStr(RepeatFF(&mips64::Mips64Assembler::FloorLS, "floor.l.s ${reg1}, ${reg2}"), "floor.l.s"); 433} 434 435TEST_F(AssemblerMIPS64Test, FloorLD) { 436 DriverStr(RepeatFF(&mips64::Mips64Assembler::FloorLD, "floor.l.d ${reg1}, ${reg2}"), "floor.l.d"); 437} 438 439TEST_F(AssemblerMIPS64Test, FloorWS) { 440 DriverStr(RepeatFF(&mips64::Mips64Assembler::FloorWS, "floor.w.s ${reg1}, ${reg2}"), "floor.w.s"); 441} 442 443TEST_F(AssemblerMIPS64Test, FloorWD) { 444 DriverStr(RepeatFF(&mips64::Mips64Assembler::FloorWD, "floor.w.d ${reg1}, ${reg2}"), "floor.w.d"); 445} 446 447TEST_F(AssemblerMIPS64Test, SelS) { 448 DriverStr(RepeatFFF(&mips64::Mips64Assembler::SelS, "sel.s ${reg1}, ${reg2}, ${reg3}"), "sel.s"); 449} 450 451TEST_F(AssemblerMIPS64Test, SelD) { 452 DriverStr(RepeatFFF(&mips64::Mips64Assembler::SelD, "sel.d ${reg1}, ${reg2}, ${reg3}"), "sel.d"); 453} 454 455TEST_F(AssemblerMIPS64Test, SeleqzS) { 456 DriverStr(RepeatFFF(&mips64::Mips64Assembler::SeleqzS, "seleqz.s ${reg1}, ${reg2}, ${reg3}"), 457 "seleqz.s"); 458} 459 460TEST_F(AssemblerMIPS64Test, SeleqzD) { 461 DriverStr(RepeatFFF(&mips64::Mips64Assembler::SeleqzD, "seleqz.d ${reg1}, ${reg2}, ${reg3}"), 462 "seleqz.d"); 463} 464 465TEST_F(AssemblerMIPS64Test, SelnezS) { 466 DriverStr(RepeatFFF(&mips64::Mips64Assembler::SelnezS, "selnez.s ${reg1}, ${reg2}, ${reg3}"), 467 "selnez.s"); 468} 469 470TEST_F(AssemblerMIPS64Test, SelnezD) { 471 DriverStr(RepeatFFF(&mips64::Mips64Assembler::SelnezD, "selnez.d ${reg1}, ${reg2}, ${reg3}"), 472 "selnez.d"); 473} 474 475TEST_F(AssemblerMIPS64Test, RintS) { 476 DriverStr(RepeatFF(&mips64::Mips64Assembler::RintS, "rint.s ${reg1}, ${reg2}"), "rint.s"); 477} 478 479TEST_F(AssemblerMIPS64Test, RintD) { 480 DriverStr(RepeatFF(&mips64::Mips64Assembler::RintD, "rint.d ${reg1}, ${reg2}"), "rint.d"); 481} 482 483TEST_F(AssemblerMIPS64Test, ClassS) { 484 DriverStr(RepeatFF(&mips64::Mips64Assembler::ClassS, "class.s ${reg1}, ${reg2}"), "class.s"); 485} 486 487TEST_F(AssemblerMIPS64Test, ClassD) { 488 DriverStr(RepeatFF(&mips64::Mips64Assembler::ClassD, "class.d ${reg1}, ${reg2}"), "class.d"); 489} 490 491TEST_F(AssemblerMIPS64Test, MinS) { 492 DriverStr(RepeatFFF(&mips64::Mips64Assembler::MinS, "min.s ${reg1}, ${reg2}, ${reg3}"), "min.s"); 493} 494 495TEST_F(AssemblerMIPS64Test, MinD) { 496 DriverStr(RepeatFFF(&mips64::Mips64Assembler::MinD, "min.d ${reg1}, ${reg2}, ${reg3}"), "min.d"); 497} 498 499TEST_F(AssemblerMIPS64Test, MaxS) { 500 DriverStr(RepeatFFF(&mips64::Mips64Assembler::MaxS, "max.s ${reg1}, ${reg2}, ${reg3}"), "max.s"); 501} 502 503TEST_F(AssemblerMIPS64Test, MaxD) { 504 DriverStr(RepeatFFF(&mips64::Mips64Assembler::MaxD, "max.d ${reg1}, ${reg2}, ${reg3}"), "max.d"); 505} 506 507TEST_F(AssemblerMIPS64Test, CmpUnS) { 508 DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpUnS, "cmp.un.s ${reg1}, ${reg2}, ${reg3}"), 509 "cmp.un.s"); 510} 511 512TEST_F(AssemblerMIPS64Test, CmpEqS) { 513 DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpEqS, "cmp.eq.s ${reg1}, ${reg2}, ${reg3}"), 514 "cmp.eq.s"); 515} 516 517TEST_F(AssemblerMIPS64Test, CmpUeqS) { 518 DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpUeqS, "cmp.ueq.s ${reg1}, ${reg2}, ${reg3}"), 519 "cmp.ueq.s"); 520} 521 522TEST_F(AssemblerMIPS64Test, CmpLtS) { 523 DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpLtS, "cmp.lt.s ${reg1}, ${reg2}, ${reg3}"), 524 "cmp.lt.s"); 525} 526 527TEST_F(AssemblerMIPS64Test, CmpUltS) { 528 DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpUltS, "cmp.ult.s ${reg1}, ${reg2}, ${reg3}"), 529 "cmp.ult.s"); 530} 531 532TEST_F(AssemblerMIPS64Test, CmpLeS) { 533 DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpLeS, "cmp.le.s ${reg1}, ${reg2}, ${reg3}"), 534 "cmp.le.s"); 535} 536 537TEST_F(AssemblerMIPS64Test, CmpUleS) { 538 DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpUleS, "cmp.ule.s ${reg1}, ${reg2}, ${reg3}"), 539 "cmp.ule.s"); 540} 541 542TEST_F(AssemblerMIPS64Test, CmpOrS) { 543 DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpOrS, "cmp.or.s ${reg1}, ${reg2}, ${reg3}"), 544 "cmp.or.s"); 545} 546 547TEST_F(AssemblerMIPS64Test, CmpUneS) { 548 DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpUneS, "cmp.une.s ${reg1}, ${reg2}, ${reg3}"), 549 "cmp.une.s"); 550} 551 552TEST_F(AssemblerMIPS64Test, CmpNeS) { 553 DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpNeS, "cmp.ne.s ${reg1}, ${reg2}, ${reg3}"), 554 "cmp.ne.s"); 555} 556 557TEST_F(AssemblerMIPS64Test, CmpUnD) { 558 DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpUnD, "cmp.un.d ${reg1}, ${reg2}, ${reg3}"), 559 "cmp.un.d"); 560} 561 562TEST_F(AssemblerMIPS64Test, CmpEqD) { 563 DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpEqD, "cmp.eq.d ${reg1}, ${reg2}, ${reg3}"), 564 "cmp.eq.d"); 565} 566 567TEST_F(AssemblerMIPS64Test, CmpUeqD) { 568 DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpUeqD, "cmp.ueq.d ${reg1}, ${reg2}, ${reg3}"), 569 "cmp.ueq.d"); 570} 571 572TEST_F(AssemblerMIPS64Test, CmpLtD) { 573 DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpLtD, "cmp.lt.d ${reg1}, ${reg2}, ${reg3}"), 574 "cmp.lt.d"); 575} 576 577TEST_F(AssemblerMIPS64Test, CmpUltD) { 578 DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpUltD, "cmp.ult.d ${reg1}, ${reg2}, ${reg3}"), 579 "cmp.ult.d"); 580} 581 582TEST_F(AssemblerMIPS64Test, CmpLeD) { 583 DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpLeD, "cmp.le.d ${reg1}, ${reg2}, ${reg3}"), 584 "cmp.le.d"); 585} 586 587TEST_F(AssemblerMIPS64Test, CmpUleD) { 588 DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpUleD, "cmp.ule.d ${reg1}, ${reg2}, ${reg3}"), 589 "cmp.ule.d"); 590} 591 592TEST_F(AssemblerMIPS64Test, CmpOrD) { 593 DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpOrD, "cmp.or.d ${reg1}, ${reg2}, ${reg3}"), 594 "cmp.or.d"); 595} 596 597TEST_F(AssemblerMIPS64Test, CmpUneD) { 598 DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpUneD, "cmp.une.d ${reg1}, ${reg2}, ${reg3}"), 599 "cmp.une.d"); 600} 601 602TEST_F(AssemblerMIPS64Test, CmpNeD) { 603 DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpNeD, "cmp.ne.d ${reg1}, ${reg2}, ${reg3}"), 604 "cmp.ne.d"); 605} 606 607TEST_F(AssemblerMIPS64Test, CvtDL) { 608 DriverStr(RepeatFF(&mips64::Mips64Assembler::Cvtdl, "cvt.d.l ${reg1}, ${reg2}"), "cvt.d.l"); 609} 610 611TEST_F(AssemblerMIPS64Test, CvtDS) { 612 DriverStr(RepeatFF(&mips64::Mips64Assembler::Cvtds, "cvt.d.s ${reg1}, ${reg2}"), "cvt.d.s"); 613} 614 615TEST_F(AssemblerMIPS64Test, CvtDW) { 616 DriverStr(RepeatFF(&mips64::Mips64Assembler::Cvtdw, "cvt.d.w ${reg1}, ${reg2}"), "cvt.d.w"); 617} 618 619TEST_F(AssemblerMIPS64Test, CvtSL) { 620 DriverStr(RepeatFF(&mips64::Mips64Assembler::Cvtsl, "cvt.s.l ${reg1}, ${reg2}"), "cvt.s.l"); 621} 622 623TEST_F(AssemblerMIPS64Test, CvtSD) { 624 DriverStr(RepeatFF(&mips64::Mips64Assembler::Cvtsd, "cvt.s.d ${reg1}, ${reg2}"), "cvt.s.d"); 625} 626 627TEST_F(AssemblerMIPS64Test, CvtSW) { 628 DriverStr(RepeatFF(&mips64::Mips64Assembler::Cvtsw, "cvt.s.w ${reg1}, ${reg2}"), "cvt.s.w"); 629} 630 631TEST_F(AssemblerMIPS64Test, TruncWS) { 632 DriverStr(RepeatFF(&mips64::Mips64Assembler::TruncWS, "trunc.w.s ${reg1}, ${reg2}"), "trunc.w.s"); 633} 634 635TEST_F(AssemblerMIPS64Test, TruncWD) { 636 DriverStr(RepeatFF(&mips64::Mips64Assembler::TruncWD, "trunc.w.d ${reg1}, ${reg2}"), "trunc.w.d"); 637} 638 639TEST_F(AssemblerMIPS64Test, TruncLS) { 640 DriverStr(RepeatFF(&mips64::Mips64Assembler::TruncLS, "trunc.l.s ${reg1}, ${reg2}"), "trunc.l.s"); 641} 642 643TEST_F(AssemblerMIPS64Test, TruncLD) { 644 DriverStr(RepeatFF(&mips64::Mips64Assembler::TruncLD, "trunc.l.d ${reg1}, ${reg2}"), "trunc.l.d"); 645} 646 647TEST_F(AssemblerMIPS64Test, Mfc1) { 648 DriverStr(RepeatRF(&mips64::Mips64Assembler::Mfc1, "mfc1 ${reg1}, ${reg2}"), "Mfc1"); 649} 650 651TEST_F(AssemblerMIPS64Test, Mfhc1) { 652 DriverStr(RepeatRF(&mips64::Mips64Assembler::Mfhc1, "mfhc1 ${reg1}, ${reg2}"), "Mfhc1"); 653} 654 655TEST_F(AssemblerMIPS64Test, Mtc1) { 656 DriverStr(RepeatRF(&mips64::Mips64Assembler::Mtc1, "mtc1 ${reg1}, ${reg2}"), "Mtc1"); 657} 658 659TEST_F(AssemblerMIPS64Test, Mthc1) { 660 DriverStr(RepeatRF(&mips64::Mips64Assembler::Mthc1, "mthc1 ${reg1}, ${reg2}"), "Mthc1"); 661} 662 663TEST_F(AssemblerMIPS64Test, Dmfc1) { 664 DriverStr(RepeatRF(&mips64::Mips64Assembler::Dmfc1, "dmfc1 ${reg1}, ${reg2}"), "Dmfc1"); 665} 666 667TEST_F(AssemblerMIPS64Test, Dmtc1) { 668 DriverStr(RepeatRF(&mips64::Mips64Assembler::Dmtc1, "dmtc1 ${reg1}, ${reg2}"), "Dmtc1"); 669} 670 671TEST_F(AssemblerMIPS64Test, Lwc1) { 672 DriverStr(RepeatFRIb(&mips64::Mips64Assembler::Lwc1, -16, "lwc1 ${reg1}, {imm}(${reg2})"), 673 "lwc1"); 674} 675 676TEST_F(AssemblerMIPS64Test, Ldc1) { 677 DriverStr(RepeatFRIb(&mips64::Mips64Assembler::Ldc1, -16, "ldc1 ${reg1}, {imm}(${reg2})"), 678 "ldc1"); 679} 680 681TEST_F(AssemblerMIPS64Test, Swc1) { 682 DriverStr(RepeatFRIb(&mips64::Mips64Assembler::Swc1, -16, "swc1 ${reg1}, {imm}(${reg2})"), 683 "swc1"); 684} 685 686TEST_F(AssemblerMIPS64Test, Sdc1) { 687 DriverStr(RepeatFRIb(&mips64::Mips64Assembler::Sdc1, -16, "sdc1 ${reg1}, {imm}(${reg2})"), 688 "sdc1"); 689} 690 691//////////////// 692// CALL / JMP // 693//////////////// 694 695TEST_F(AssemblerMIPS64Test, Jalr) { 696 DriverStr(".set noreorder\n" + 697 RepeatRRNoDupes(&mips64::Mips64Assembler::Jalr, "jalr ${reg1}, ${reg2}"), "jalr"); 698} 699 700TEST_F(AssemblerMIPS64Test, Balc) { 701 mips64::Mips64Label label1, label2; 702 __ Balc(&label1); 703 constexpr size_t kAdduCount1 = 63; 704 for (size_t i = 0; i != kAdduCount1; ++i) { 705 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO); 706 } 707 __ Bind(&label1); 708 __ Balc(&label2); 709 constexpr size_t kAdduCount2 = 64; 710 for (size_t i = 0; i != kAdduCount2; ++i) { 711 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO); 712 } 713 __ Bind(&label2); 714 __ Balc(&label1); 715 716 std::string expected = 717 ".set noreorder\n" 718 "balc 1f\n" + 719 RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") + 720 "1:\n" 721 "balc 2f\n" + 722 RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") + 723 "2:\n" 724 "balc 1b\n"; 725 DriverStr(expected, "Balc"); 726} 727 728TEST_F(AssemblerMIPS64Test, LongBalc) { 729 constexpr uint32_t kNopCount1 = (1u << 25) + 1; 730 constexpr uint32_t kNopCount2 = (1u << 25) + 1; 731 constexpr uint32_t kRequiredCapacity = (kNopCount1 + kNopCount2 + 6u) * 4u; 732 ASSERT_LT(__ GetBuffer()->Capacity(), kRequiredCapacity); 733 __ GetBuffer()->ExtendCapacity(kRequiredCapacity); 734 mips64::Mips64Label label1, label2; 735 __ Balc(&label1); 736 for (uint32_t i = 0; i != kNopCount1; ++i) { 737 __ Nop(); 738 } 739 __ Bind(&label1); 740 __ Balc(&label2); 741 for (uint32_t i = 0; i != kNopCount2; ++i) { 742 __ Nop(); 743 } 744 __ Bind(&label2); 745 __ Balc(&label1); 746 747 uint32_t offset_forward1 = 2 + kNopCount1; // 2: account for auipc and jialc. 748 offset_forward1 <<= 2; 749 offset_forward1 += (offset_forward1 & 0x8000) << 1; // Account for sign extension in jialc. 750 751 uint32_t offset_forward2 = 2 + kNopCount2; // 2: account for auipc and jialc. 752 offset_forward2 <<= 2; 753 offset_forward2 += (offset_forward2 & 0x8000) << 1; // Account for sign extension in jialc. 754 755 uint32_t offset_back = -(2 + kNopCount2); // 2: account for auipc and jialc. 756 offset_back <<= 2; 757 offset_back += (offset_back & 0x8000) << 1; // Account for sign extension in jialc. 758 759 // Note, we're using the ".fill" directive to tell the assembler to generate many NOPs 760 // instead of generating them ourselves in the source code. This saves a few minutes 761 // of test time. 762 std::ostringstream oss; 763 oss << 764 ".set noreorder\n" 765 "auipc $at, 0x" << std::hex << High16Bits(offset_forward1) << "\n" 766 "jialc $at, 0x" << std::hex << Low16Bits(offset_forward1) << "\n" 767 ".fill 0x" << std::hex << kNopCount1 << " , 4, 0\n" 768 "1:\n" 769 "auipc $at, 0x" << std::hex << High16Bits(offset_forward2) << "\n" 770 "jialc $at, 0x" << std::hex << Low16Bits(offset_forward2) << "\n" 771 ".fill 0x" << std::hex << kNopCount2 << " , 4, 0\n" 772 "2:\n" 773 "auipc $at, 0x" << std::hex << High16Bits(offset_back) << "\n" 774 "jialc $at, 0x" << std::hex << Low16Bits(offset_back) << "\n"; 775 std::string expected = oss.str(); 776 DriverStr(expected, "LongBalc"); 777} 778 779TEST_F(AssemblerMIPS64Test, Bc) { 780 mips64::Mips64Label label1, label2; 781 __ Bc(&label1); 782 constexpr size_t kAdduCount1 = 63; 783 for (size_t i = 0; i != kAdduCount1; ++i) { 784 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO); 785 } 786 __ Bind(&label1); 787 __ Bc(&label2); 788 constexpr size_t kAdduCount2 = 64; 789 for (size_t i = 0; i != kAdduCount2; ++i) { 790 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO); 791 } 792 __ Bind(&label2); 793 __ Bc(&label1); 794 795 std::string expected = 796 ".set noreorder\n" 797 "bc 1f\n" + 798 RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") + 799 "1:\n" 800 "bc 2f\n" + 801 RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") + 802 "2:\n" 803 "bc 1b\n"; 804 DriverStr(expected, "Bc"); 805} 806 807TEST_F(AssemblerMIPS64Test, Beqzc) { 808 BranchCondOneRegHelper(&mips64::Mips64Assembler::Beqzc, "Beqzc"); 809} 810 811TEST_F(AssemblerMIPS64Test, Bnezc) { 812 BranchCondOneRegHelper(&mips64::Mips64Assembler::Bnezc, "Bnezc"); 813} 814 815TEST_F(AssemblerMIPS64Test, Bltzc) { 816 BranchCondOneRegHelper(&mips64::Mips64Assembler::Bltzc, "Bltzc"); 817} 818 819TEST_F(AssemblerMIPS64Test, Bgezc) { 820 BranchCondOneRegHelper(&mips64::Mips64Assembler::Bgezc, "Bgezc"); 821} 822 823TEST_F(AssemblerMIPS64Test, Blezc) { 824 BranchCondOneRegHelper(&mips64::Mips64Assembler::Blezc, "Blezc"); 825} 826 827TEST_F(AssemblerMIPS64Test, Bgtzc) { 828 BranchCondOneRegHelper(&mips64::Mips64Assembler::Bgtzc, "Bgtzc"); 829} 830 831TEST_F(AssemblerMIPS64Test, Beqc) { 832 BranchCondTwoRegsHelper(&mips64::Mips64Assembler::Beqc, "Beqc"); 833} 834 835TEST_F(AssemblerMIPS64Test, Bnec) { 836 BranchCondTwoRegsHelper(&mips64::Mips64Assembler::Bnec, "Bnec"); 837} 838 839TEST_F(AssemblerMIPS64Test, Bltc) { 840 BranchCondTwoRegsHelper(&mips64::Mips64Assembler::Bltc, "Bltc"); 841} 842 843TEST_F(AssemblerMIPS64Test, Bgec) { 844 BranchCondTwoRegsHelper(&mips64::Mips64Assembler::Bgec, "Bgec"); 845} 846 847TEST_F(AssemblerMIPS64Test, Bltuc) { 848 BranchCondTwoRegsHelper(&mips64::Mips64Assembler::Bltuc, "Bltuc"); 849} 850 851TEST_F(AssemblerMIPS64Test, Bgeuc) { 852 BranchCondTwoRegsHelper(&mips64::Mips64Assembler::Bgeuc, "Bgeuc"); 853} 854 855TEST_F(AssemblerMIPS64Test, Bc1eqz) { 856 mips64::Mips64Label label; 857 __ Bc1eqz(mips64::F0, &label); 858 constexpr size_t kAdduCount1 = 63; 859 for (size_t i = 0; i != kAdduCount1; ++i) { 860 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO); 861 } 862 __ Bind(&label); 863 constexpr size_t kAdduCount2 = 64; 864 for (size_t i = 0; i != kAdduCount2; ++i) { 865 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO); 866 } 867 __ Bc1eqz(mips64::F31, &label); 868 869 std::string expected = 870 ".set noreorder\n" 871 "bc1eqz $f0, 1f\n" 872 "nop\n" + 873 RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") + 874 "1:\n" + 875 RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") + 876 "bc1eqz $f31, 1b\n" 877 "nop\n"; 878 DriverStr(expected, "Bc1eqz"); 879} 880 881TEST_F(AssemblerMIPS64Test, Bc1nez) { 882 mips64::Mips64Label label; 883 __ Bc1nez(mips64::F0, &label); 884 constexpr size_t kAdduCount1 = 63; 885 for (size_t i = 0; i != kAdduCount1; ++i) { 886 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO); 887 } 888 __ Bind(&label); 889 constexpr size_t kAdduCount2 = 64; 890 for (size_t i = 0; i != kAdduCount2; ++i) { 891 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO); 892 } 893 __ Bc1nez(mips64::F31, &label); 894 895 std::string expected = 896 ".set noreorder\n" 897 "bc1nez $f0, 1f\n" 898 "nop\n" + 899 RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") + 900 "1:\n" + 901 RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") + 902 "bc1nez $f31, 1b\n" 903 "nop\n"; 904 DriverStr(expected, "Bc1nez"); 905} 906 907TEST_F(AssemblerMIPS64Test, LongBeqc) { 908 mips64::Mips64Label label; 909 __ Beqc(mips64::A0, mips64::A1, &label); 910 constexpr uint32_t kAdduCount1 = (1u << 15) + 1; 911 for (uint32_t i = 0; i != kAdduCount1; ++i) { 912 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO); 913 } 914 __ Bind(&label); 915 constexpr uint32_t kAdduCount2 = (1u << 15) + 1; 916 for (uint32_t i = 0; i != kAdduCount2; ++i) { 917 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO); 918 } 919 __ Beqc(mips64::A2, mips64::A3, &label); 920 921 uint32_t offset_forward = 2 + kAdduCount1; // 2: account for auipc and jic. 922 offset_forward <<= 2; 923 offset_forward += (offset_forward & 0x8000) << 1; // Account for sign extension in jic. 924 925 uint32_t offset_back = -(kAdduCount2 + 1); // 1: account for bnec. 926 offset_back <<= 2; 927 offset_back += (offset_back & 0x8000) << 1; // Account for sign extension in jic. 928 929 std::ostringstream oss; 930 oss << 931 ".set noreorder\n" 932 "bnec $a0, $a1, 1f\n" 933 "auipc $at, 0x" << std::hex << High16Bits(offset_forward) << "\n" 934 "jic $at, 0x" << std::hex << Low16Bits(offset_forward) << "\n" 935 "1:\n" << 936 RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") << 937 "2:\n" << 938 RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") << 939 "bnec $a2, $a3, 3f\n" 940 "auipc $at, 0x" << std::hex << High16Bits(offset_back) << "\n" 941 "jic $at, 0x" << std::hex << Low16Bits(offset_back) << "\n" 942 "3:\n"; 943 std::string expected = oss.str(); 944 DriverStr(expected, "LongBeqc"); 945} 946 947////////// 948// MISC // 949////////// 950 951TEST_F(AssemblerMIPS64Test, Lwpc) { 952 // Lwpc() takes an unsigned 19-bit immediate, while the GNU assembler needs a signed offset, 953 // hence the sign extension from bit 18 with `imm - ((imm & 0x40000) << 1)`. 954 // The GNU assembler also wants the offset to be a multiple of 4, which it will shift right 955 // by 2 positions when encoding, hence `<< 2` to compensate for that shift. 956 // We capture the value of the immediate with `.set imm, {imm}` because the value is needed 957 // twice for the sign extension, but `{imm}` is substituted only once. 958 const char* code = ".set imm, {imm}\nlw ${reg}, ((imm - ((imm & 0x40000) << 1)) << 2)($pc)"; 959 DriverStr(RepeatRIb(&mips64::Mips64Assembler::Lwpc, 19, code), "Lwpc"); 960} 961 962TEST_F(AssemblerMIPS64Test, Lwupc) { 963 // The comment for the Lwpc test applies here as well. 964 const char* code = ".set imm, {imm}\nlwu ${reg}, ((imm - ((imm & 0x40000) << 1)) << 2)($pc)"; 965 DriverStr(RepeatRIb(&mips64::Mips64Assembler::Lwupc, 19, code), "Lwupc"); 966} 967 968TEST_F(AssemblerMIPS64Test, Ldpc) { 969 // The comment for the Lwpc test applies here as well. 970 const char* code = ".set imm, {imm}\nld ${reg}, ((imm - ((imm & 0x20000) << 1)) << 3)($pc)"; 971 DriverStr(RepeatRIb(&mips64::Mips64Assembler::Ldpc, 18, code), "Ldpc"); 972} 973 974TEST_F(AssemblerMIPS64Test, Auipc) { 975 DriverStr(RepeatRIb(&mips64::Mips64Assembler::Auipc, 16, "auipc ${reg}, {imm}"), "Auipc"); 976} 977 978TEST_F(AssemblerMIPS64Test, Addiupc) { 979 // The comment from the Lwpc() test applies to this Addiupc() test as well. 980 const char* code = ".set imm, {imm}\naddiupc ${reg}, (imm - ((imm & 0x40000) << 1)) << 2"; 981 DriverStr(RepeatRIb(&mips64::Mips64Assembler::Addiupc, 19, code), "Addiupc"); 982} 983 984TEST_F(AssemblerMIPS64Test, LoadFarthestNearLabelAddress) { 985 mips64::Mips64Label label; 986 __ LoadLabelAddress(mips64::V0, &label); 987 constexpr uint32_t kAdduCount = 0x3FFDE; 988 for (uint32_t i = 0; i != kAdduCount; ++i) { 989 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO); 990 } 991 __ Bind(&label); 992 993 std::string expected = 994 "lapc $v0, 1f\n" + 995 RepeatInsn(kAdduCount, "addu $zero, $zero, $zero\n") + 996 "1:\n"; 997 DriverStr(expected, "LoadFarthestNearLabelAddress"); 998 EXPECT_EQ(__ GetLabelLocation(&label), (1 + kAdduCount) * 4); 999} 1000 1001TEST_F(AssemblerMIPS64Test, LoadNearestFarLabelAddress) { 1002 mips64::Mips64Label label; 1003 __ LoadLabelAddress(mips64::V0, &label); 1004 constexpr uint32_t kAdduCount = 0x3FFDF; 1005 for (uint32_t i = 0; i != kAdduCount; ++i) { 1006 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO); 1007 } 1008 __ Bind(&label); 1009 1010 std::string expected = 1011 "1:\n" 1012 "auipc $at, %hi(2f - 1b)\n" 1013 "daddiu $v0, $at, %lo(2f - 1b)\n" + 1014 RepeatInsn(kAdduCount, "addu $zero, $zero, $zero\n") + 1015 "2:\n"; 1016 DriverStr(expected, "LoadNearestFarLabelAddress"); 1017 EXPECT_EQ(__ GetLabelLocation(&label), (2 + kAdduCount) * 4); 1018} 1019 1020TEST_F(AssemblerMIPS64Test, LoadFarthestNearLiteral) { 1021 mips64::Literal* literal = __ NewLiteral<uint32_t>(0x12345678); 1022 __ LoadLiteral(mips64::V0, mips64::kLoadWord, literal); 1023 constexpr uint32_t kAdduCount = 0x3FFDE; 1024 for (uint32_t i = 0; i != kAdduCount; ++i) { 1025 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO); 1026 } 1027 1028 std::string expected = 1029 "lwpc $v0, 1f\n" + 1030 RepeatInsn(kAdduCount, "addu $zero, $zero, $zero\n") + 1031 "1:\n" 1032 ".word 0x12345678\n"; 1033 DriverStr(expected, "LoadFarthestNearLiteral"); 1034 EXPECT_EQ(__ GetLabelLocation(literal->GetLabel()), (1 + kAdduCount) * 4); 1035} 1036 1037TEST_F(AssemblerMIPS64Test, LoadNearestFarLiteral) { 1038 mips64::Literal* literal = __ NewLiteral<uint32_t>(0x12345678); 1039 __ LoadLiteral(mips64::V0, mips64::kLoadWord, literal); 1040 constexpr uint32_t kAdduCount = 0x3FFDF; 1041 for (uint32_t i = 0; i != kAdduCount; ++i) { 1042 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO); 1043 } 1044 1045 std::string expected = 1046 "1:\n" 1047 "auipc $at, %hi(2f - 1b)\n" 1048 "lw $v0, %lo(2f - 1b)($at)\n" + 1049 RepeatInsn(kAdduCount, "addu $zero, $zero, $zero\n") + 1050 "2:\n" 1051 ".word 0x12345678\n"; 1052 DriverStr(expected, "LoadNearestFarLiteral"); 1053 EXPECT_EQ(__ GetLabelLocation(literal->GetLabel()), (2 + kAdduCount) * 4); 1054} 1055 1056TEST_F(AssemblerMIPS64Test, LoadFarthestNearLiteralUnsigned) { 1057 mips64::Literal* literal = __ NewLiteral<uint32_t>(0x12345678); 1058 __ LoadLiteral(mips64::V0, mips64::kLoadUnsignedWord, literal); 1059 constexpr uint32_t kAdduCount = 0x3FFDE; 1060 for (uint32_t i = 0; i != kAdduCount; ++i) { 1061 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO); 1062 } 1063 1064 std::string expected = 1065 "lwupc $v0, 1f\n" + 1066 RepeatInsn(kAdduCount, "addu $zero, $zero, $zero\n") + 1067 "1:\n" 1068 ".word 0x12345678\n"; 1069 DriverStr(expected, "LoadFarthestNearLiteralUnsigned"); 1070 EXPECT_EQ(__ GetLabelLocation(literal->GetLabel()), (1 + kAdduCount) * 4); 1071} 1072 1073TEST_F(AssemblerMIPS64Test, LoadNearestFarLiteralUnsigned) { 1074 mips64::Literal* literal = __ NewLiteral<uint32_t>(0x12345678); 1075 __ LoadLiteral(mips64::V0, mips64::kLoadUnsignedWord, literal); 1076 constexpr uint32_t kAdduCount = 0x3FFDF; 1077 for (uint32_t i = 0; i != kAdduCount; ++i) { 1078 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO); 1079 } 1080 1081 std::string expected = 1082 "1:\n" 1083 "auipc $at, %hi(2f - 1b)\n" 1084 "lwu $v0, %lo(2f - 1b)($at)\n" + 1085 RepeatInsn(kAdduCount, "addu $zero, $zero, $zero\n") + 1086 "2:\n" 1087 ".word 0x12345678\n"; 1088 DriverStr(expected, "LoadNearestFarLiteralUnsigned"); 1089 EXPECT_EQ(__ GetLabelLocation(literal->GetLabel()), (2 + kAdduCount) * 4); 1090} 1091 1092TEST_F(AssemblerMIPS64Test, LoadFarthestNearLiteralLong) { 1093 mips64::Literal* literal = __ NewLiteral<uint64_t>(UINT64_C(0x0123456789ABCDEF)); 1094 __ LoadLiteral(mips64::V0, mips64::kLoadDoubleword, literal); 1095 constexpr uint32_t kAdduCount = 0x3FFDD; 1096 for (uint32_t i = 0; i != kAdduCount; ++i) { 1097 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO); 1098 } 1099 1100 std::string expected = 1101 "ldpc $v0, 1f\n" + 1102 RepeatInsn(kAdduCount, "addu $zero, $zero, $zero\n") + 1103 "1:\n" 1104 ".dword 0x0123456789ABCDEF\n"; 1105 DriverStr(expected, "LoadFarthestNearLiteralLong"); 1106 EXPECT_EQ(__ GetLabelLocation(literal->GetLabel()), (1 + kAdduCount) * 4); 1107} 1108 1109TEST_F(AssemblerMIPS64Test, LoadNearestFarLiteralLong) { 1110 mips64::Literal* literal = __ NewLiteral<uint64_t>(UINT64_C(0x0123456789ABCDEF)); 1111 __ LoadLiteral(mips64::V0, mips64::kLoadDoubleword, literal); 1112 constexpr uint32_t kAdduCount = 0x3FFDE; 1113 for (uint32_t i = 0; i != kAdduCount; ++i) { 1114 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO); 1115 } 1116 1117 std::string expected = 1118 "1:\n" 1119 "auipc $at, %hi(2f - 1b)\n" 1120 "ld $v0, %lo(2f - 1b)($at)\n" + 1121 RepeatInsn(kAdduCount, "addu $zero, $zero, $zero\n") + 1122 "2:\n" 1123 ".dword 0x0123456789ABCDEF\n"; 1124 DriverStr(expected, "LoadNearestFarLiteralLong"); 1125 EXPECT_EQ(__ GetLabelLocation(literal->GetLabel()), (2 + kAdduCount) * 4); 1126} 1127 1128TEST_F(AssemblerMIPS64Test, LongLiteralAlignmentNop) { 1129 mips64::Literal* literal1 = __ NewLiteral<uint64_t>(UINT64_C(0x0123456789ABCDEF)); 1130 mips64::Literal* literal2 = __ NewLiteral<uint64_t>(UINT64_C(0x5555555555555555)); 1131 mips64::Literal* literal3 = __ NewLiteral<uint64_t>(UINT64_C(0xAAAAAAAAAAAAAAAA)); 1132 __ LoadLiteral(mips64::A1, mips64::kLoadDoubleword, literal1); 1133 __ LoadLiteral(mips64::A2, mips64::kLoadDoubleword, literal2); 1134 __ LoadLiteral(mips64::A3, mips64::kLoadDoubleword, literal3); 1135 __ LoadLabelAddress(mips64::V0, literal1->GetLabel()); 1136 __ LoadLabelAddress(mips64::V1, literal2->GetLabel()); 1137 // A nop will be inserted here before the 64-bit literals. 1138 1139 std::string expected = 1140 "ldpc $a1, 1f\n" 1141 // The GNU assembler incorrectly requires the ldpc instruction to be located 1142 // at an address that's a multiple of 8. TODO: Remove this workaround if/when 1143 // the assembler is fixed. 1144 // "ldpc $a2, 2f\n" 1145 ".word 0xECD80004\n" 1146 "ldpc $a3, 3f\n" 1147 "lapc $v0, 1f\n" 1148 "lapc $v1, 2f\n" 1149 "nop\n" 1150 "1:\n" 1151 ".dword 0x0123456789ABCDEF\n" 1152 "2:\n" 1153 ".dword 0x5555555555555555\n" 1154 "3:\n" 1155 ".dword 0xAAAAAAAAAAAAAAAA\n"; 1156 DriverStr(expected, "LongLiteralAlignmentNop"); 1157 EXPECT_EQ(__ GetLabelLocation(literal1->GetLabel()), 6 * 4u); 1158 EXPECT_EQ(__ GetLabelLocation(literal2->GetLabel()), 8 * 4u); 1159 EXPECT_EQ(__ GetLabelLocation(literal3->GetLabel()), 10 * 4u); 1160} 1161 1162TEST_F(AssemblerMIPS64Test, LongLiteralAlignmentNoNop) { 1163 mips64::Literal* literal1 = __ NewLiteral<uint64_t>(UINT64_C(0x0123456789ABCDEF)); 1164 mips64::Literal* literal2 = __ NewLiteral<uint64_t>(UINT64_C(0x5555555555555555)); 1165 __ LoadLiteral(mips64::A1, mips64::kLoadDoubleword, literal1); 1166 __ LoadLiteral(mips64::A2, mips64::kLoadDoubleword, literal2); 1167 __ LoadLabelAddress(mips64::V0, literal1->GetLabel()); 1168 __ LoadLabelAddress(mips64::V1, literal2->GetLabel()); 1169 1170 std::string expected = 1171 "ldpc $a1, 1f\n" 1172 // The GNU assembler incorrectly requires the ldpc instruction to be located 1173 // at an address that's a multiple of 8. TODO: Remove this workaround if/when 1174 // the assembler is fixed. 1175 // "ldpc $a2, 2f\n" 1176 ".word 0xECD80003\n" 1177 "lapc $v0, 1f\n" 1178 "lapc $v1, 2f\n" 1179 "1:\n" 1180 ".dword 0x0123456789ABCDEF\n" 1181 "2:\n" 1182 ".dword 0x5555555555555555\n"; 1183 DriverStr(expected, "LongLiteralAlignmentNoNop"); 1184 EXPECT_EQ(__ GetLabelLocation(literal1->GetLabel()), 4 * 4u); 1185 EXPECT_EQ(__ GetLabelLocation(literal2->GetLabel()), 6 * 4u); 1186} 1187 1188TEST_F(AssemblerMIPS64Test, FarLongLiteralAlignmentNop) { 1189 mips64::Literal* literal = __ NewLiteral<uint64_t>(UINT64_C(0x0123456789ABCDEF)); 1190 __ LoadLiteral(mips64::V0, mips64::kLoadDoubleword, literal); 1191 __ LoadLabelAddress(mips64::V1, literal->GetLabel()); 1192 constexpr uint32_t kAdduCount = 0x3FFDF; 1193 for (uint32_t i = 0; i != kAdduCount; ++i) { 1194 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO); 1195 } 1196 // A nop will be inserted here before the 64-bit literal. 1197 1198 std::string expected = 1199 "1:\n" 1200 "auipc $at, %hi(3f - 1b)\n" 1201 "ld $v0, %lo(3f - 1b)($at)\n" 1202 "2:\n" 1203 "auipc $at, %hi(3f - 2b)\n" 1204 "daddiu $v1, $at, %lo(3f - 2b)\n" + 1205 RepeatInsn(kAdduCount, "addu $zero, $zero, $zero\n") + 1206 "nop\n" 1207 "3:\n" 1208 ".dword 0x0123456789ABCDEF\n"; 1209 DriverStr(expected, "FarLongLiteralAlignmentNop"); 1210 EXPECT_EQ(__ GetLabelLocation(literal->GetLabel()), (5 + kAdduCount) * 4); 1211} 1212 1213TEST_F(AssemblerMIPS64Test, Addu) { 1214 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Addu, "addu ${reg1}, ${reg2}, ${reg3}"), "addu"); 1215} 1216 1217TEST_F(AssemblerMIPS64Test, Addiu) { 1218 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Addiu, -16, "addiu ${reg1}, ${reg2}, {imm}"), 1219 "addiu"); 1220} 1221 1222TEST_F(AssemblerMIPS64Test, Daddu) { 1223 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Daddu, "daddu ${reg1}, ${reg2}, ${reg3}"), "daddu"); 1224} 1225 1226TEST_F(AssemblerMIPS64Test, Daddiu) { 1227 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Daddiu, -16, "daddiu ${reg1}, ${reg2}, {imm}"), 1228 "daddiu"); 1229} 1230 1231TEST_F(AssemblerMIPS64Test, Subu) { 1232 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Subu, "subu ${reg1}, ${reg2}, ${reg3}"), "subu"); 1233} 1234 1235TEST_F(AssemblerMIPS64Test, Dsubu) { 1236 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Dsubu, "dsubu ${reg1}, ${reg2}, ${reg3}"), "dsubu"); 1237} 1238 1239TEST_F(AssemblerMIPS64Test, MulR6) { 1240 DriverStr(RepeatRRR(&mips64::Mips64Assembler::MulR6, "mul ${reg1}, ${reg2}, ${reg3}"), "mulR6"); 1241} 1242 1243TEST_F(AssemblerMIPS64Test, DivR6) { 1244 DriverStr(RepeatRRR(&mips64::Mips64Assembler::DivR6, "div ${reg1}, ${reg2}, ${reg3}"), "divR6"); 1245} 1246 1247TEST_F(AssemblerMIPS64Test, ModR6) { 1248 DriverStr(RepeatRRR(&mips64::Mips64Assembler::ModR6, "mod ${reg1}, ${reg2}, ${reg3}"), "modR6"); 1249} 1250 1251TEST_F(AssemblerMIPS64Test, DivuR6) { 1252 DriverStr(RepeatRRR(&mips64::Mips64Assembler::DivuR6, "divu ${reg1}, ${reg2}, ${reg3}"), 1253 "divuR6"); 1254} 1255 1256TEST_F(AssemblerMIPS64Test, ModuR6) { 1257 DriverStr(RepeatRRR(&mips64::Mips64Assembler::ModuR6, "modu ${reg1}, ${reg2}, ${reg3}"), 1258 "moduR6"); 1259} 1260 1261TEST_F(AssemblerMIPS64Test, Dmul) { 1262 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Dmul, "dmul ${reg1}, ${reg2}, ${reg3}"), "dmul"); 1263} 1264 1265TEST_F(AssemblerMIPS64Test, Ddiv) { 1266 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Ddiv, "ddiv ${reg1}, ${reg2}, ${reg3}"), "ddiv"); 1267} 1268 1269TEST_F(AssemblerMIPS64Test, Dmod) { 1270 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Dmod, "dmod ${reg1}, ${reg2}, ${reg3}"), "dmod"); 1271} 1272 1273TEST_F(AssemblerMIPS64Test, Ddivu) { 1274 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Ddivu, "ddivu ${reg1}, ${reg2}, ${reg3}"), "ddivu"); 1275} 1276 1277TEST_F(AssemblerMIPS64Test, Dmodu) { 1278 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Dmodu, "dmodu ${reg1}, ${reg2}, ${reg3}"), "dmodu"); 1279} 1280 1281TEST_F(AssemblerMIPS64Test, And) { 1282 DriverStr(RepeatRRR(&mips64::Mips64Assembler::And, "and ${reg1}, ${reg2}, ${reg3}"), "and"); 1283} 1284 1285TEST_F(AssemblerMIPS64Test, Andi) { 1286 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Andi, 16, "andi ${reg1}, ${reg2}, {imm}"), "andi"); 1287} 1288 1289TEST_F(AssemblerMIPS64Test, Or) { 1290 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Or, "or ${reg1}, ${reg2}, ${reg3}"), "or"); 1291} 1292 1293TEST_F(AssemblerMIPS64Test, Ori) { 1294 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Ori, 16, "ori ${reg1}, ${reg2}, {imm}"), "ori"); 1295} 1296 1297TEST_F(AssemblerMIPS64Test, Xor) { 1298 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Xor, "xor ${reg1}, ${reg2}, ${reg3}"), "xor"); 1299} 1300 1301TEST_F(AssemblerMIPS64Test, Xori) { 1302 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Xori, 16, "xori ${reg1}, ${reg2}, {imm}"), "xori"); 1303} 1304 1305TEST_F(AssemblerMIPS64Test, Nor) { 1306 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Nor, "nor ${reg1}, ${reg2}, ${reg3}"), "nor"); 1307} 1308 1309TEST_F(AssemblerMIPS64Test, Lb) { 1310 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Lb, -16, "lb ${reg1}, {imm}(${reg2})"), "lb"); 1311} 1312 1313TEST_F(AssemblerMIPS64Test, Lh) { 1314 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Lh, -16, "lh ${reg1}, {imm}(${reg2})"), "lh"); 1315} 1316 1317TEST_F(AssemblerMIPS64Test, Lw) { 1318 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Lw, -16, "lw ${reg1}, {imm}(${reg2})"), "lw"); 1319} 1320 1321TEST_F(AssemblerMIPS64Test, Ld) { 1322 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Ld, -16, "ld ${reg1}, {imm}(${reg2})"), "ld"); 1323} 1324 1325TEST_F(AssemblerMIPS64Test, Lbu) { 1326 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Lbu, -16, "lbu ${reg1}, {imm}(${reg2})"), "lbu"); 1327} 1328 1329TEST_F(AssemblerMIPS64Test, Lhu) { 1330 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Lhu, -16, "lhu ${reg1}, {imm}(${reg2})"), "lhu"); 1331} 1332 1333TEST_F(AssemblerMIPS64Test, Lwu) { 1334 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Lwu, -16, "lwu ${reg1}, {imm}(${reg2})"), "lwu"); 1335} 1336 1337TEST_F(AssemblerMIPS64Test, Lui) { 1338 DriverStr(RepeatRIb(&mips64::Mips64Assembler::Lui, 16, "lui ${reg}, {imm}"), "lui"); 1339} 1340 1341TEST_F(AssemblerMIPS64Test, Daui) { 1342 std::vector<mips64::GpuRegister*> reg1_registers = GetRegisters(); 1343 std::vector<mips64::GpuRegister*> reg2_registers = GetRegisters(); 1344 reg2_registers.erase(reg2_registers.begin()); // reg2 can't be ZERO, remove it. 1345 std::vector<int64_t> imms = CreateImmediateValuesBits(/* imm_bits */ 16, /* as_uint */ true); 1346 WarnOnCombinations(reg1_registers.size() * reg2_registers.size() * imms.size()); 1347 std::ostringstream expected; 1348 for (mips64::GpuRegister* reg1 : reg1_registers) { 1349 for (mips64::GpuRegister* reg2 : reg2_registers) { 1350 for (int64_t imm : imms) { 1351 __ Daui(*reg1, *reg2, imm); 1352 expected << "daui $" << *reg1 << ", $" << *reg2 << ", " << imm << "\n"; 1353 } 1354 } 1355 } 1356 DriverStr(expected.str(), "daui"); 1357} 1358 1359TEST_F(AssemblerMIPS64Test, Dahi) { 1360 DriverStr(RepeatRIb(&mips64::Mips64Assembler::Dahi, 16, "dahi ${reg}, ${reg}, {imm}"), "dahi"); 1361} 1362 1363TEST_F(AssemblerMIPS64Test, Dati) { 1364 DriverStr(RepeatRIb(&mips64::Mips64Assembler::Dati, 16, "dati ${reg}, ${reg}, {imm}"), "dati"); 1365} 1366 1367TEST_F(AssemblerMIPS64Test, Sb) { 1368 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Sb, -16, "sb ${reg1}, {imm}(${reg2})"), "sb"); 1369} 1370 1371TEST_F(AssemblerMIPS64Test, Sh) { 1372 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Sh, -16, "sh ${reg1}, {imm}(${reg2})"), "sh"); 1373} 1374 1375TEST_F(AssemblerMIPS64Test, Sw) { 1376 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Sw, -16, "sw ${reg1}, {imm}(${reg2})"), "sw"); 1377} 1378 1379TEST_F(AssemblerMIPS64Test, Sd) { 1380 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Sd, -16, "sd ${reg1}, {imm}(${reg2})"), "sd"); 1381} 1382 1383TEST_F(AssemblerMIPS64Test, Slt) { 1384 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Slt, "slt ${reg1}, ${reg2}, ${reg3}"), "slt"); 1385} 1386 1387TEST_F(AssemblerMIPS64Test, Sltu) { 1388 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Sltu, "sltu ${reg1}, ${reg2}, ${reg3}"), "sltu"); 1389} 1390 1391TEST_F(AssemblerMIPS64Test, Slti) { 1392 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Slti, -16, "slti ${reg1}, ${reg2}, {imm}"), 1393 "slti"); 1394} 1395 1396TEST_F(AssemblerMIPS64Test, Sltiu) { 1397 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Sltiu, -16, "sltiu ${reg1}, ${reg2}, {imm}"), 1398 "sltiu"); 1399} 1400 1401TEST_F(AssemblerMIPS64Test, Move) { 1402 DriverStr(RepeatRR(&mips64::Mips64Assembler::Move, "or ${reg1}, ${reg2}, $zero"), "move"); 1403} 1404 1405TEST_F(AssemblerMIPS64Test, Clear) { 1406 DriverStr(RepeatR(&mips64::Mips64Assembler::Clear, "or ${reg}, $zero, $zero"), "clear"); 1407} 1408 1409TEST_F(AssemblerMIPS64Test, Not) { 1410 DriverStr(RepeatRR(&mips64::Mips64Assembler::Not, "nor ${reg1}, ${reg2}, $zero"), "not"); 1411} 1412 1413TEST_F(AssemblerMIPS64Test, Bitswap) { 1414 DriverStr(RepeatRR(&mips64::Mips64Assembler::Bitswap, "bitswap ${reg1}, ${reg2}"), "bitswap"); 1415} 1416 1417TEST_F(AssemblerMIPS64Test, Dbitswap) { 1418 DriverStr(RepeatRR(&mips64::Mips64Assembler::Dbitswap, "dbitswap ${reg1}, ${reg2}"), "dbitswap"); 1419} 1420 1421TEST_F(AssemblerMIPS64Test, Seb) { 1422 DriverStr(RepeatRR(&mips64::Mips64Assembler::Seb, "seb ${reg1}, ${reg2}"), "seb"); 1423} 1424 1425TEST_F(AssemblerMIPS64Test, Seh) { 1426 DriverStr(RepeatRR(&mips64::Mips64Assembler::Seh, "seh ${reg1}, ${reg2}"), "seh"); 1427} 1428 1429TEST_F(AssemblerMIPS64Test, Dsbh) { 1430 DriverStr(RepeatRR(&mips64::Mips64Assembler::Dsbh, "dsbh ${reg1}, ${reg2}"), "dsbh"); 1431} 1432 1433TEST_F(AssemblerMIPS64Test, Dshd) { 1434 DriverStr(RepeatRR(&mips64::Mips64Assembler::Dshd, "dshd ${reg1}, ${reg2}"), "dshd"); 1435} 1436 1437TEST_F(AssemblerMIPS64Test, Dext) { 1438 std::vector<mips64::GpuRegister*> reg1_registers = GetRegisters(); 1439 std::vector<mips64::GpuRegister*> reg2_registers = GetRegisters(); 1440 WarnOnCombinations(reg1_registers.size() * reg2_registers.size() * 33 * 16); 1441 std::ostringstream expected; 1442 for (mips64::GpuRegister* reg1 : reg1_registers) { 1443 for (mips64::GpuRegister* reg2 : reg2_registers) { 1444 for (int32_t pos = 0; pos < 32; pos++) { 1445 for (int32_t size = 1; size <= 32; size++) { 1446 __ Dext(*reg1, *reg2, pos, size); 1447 expected << "dext $" << *reg1 << ", $" << *reg2 << ", " << pos << ", " << size << "\n"; 1448 } 1449 } 1450 } 1451 } 1452 1453 DriverStr(expected.str(), "Dext"); 1454} 1455 1456TEST_F(AssemblerMIPS64Test, Dinsu) { 1457 std::vector<mips64::GpuRegister*> reg1_registers = GetRegisters(); 1458 std::vector<mips64::GpuRegister*> reg2_registers = GetRegisters(); 1459 WarnOnCombinations(reg1_registers.size() * reg2_registers.size() * 33 * 16); 1460 std::ostringstream expected; 1461 for (mips64::GpuRegister* reg1 : reg1_registers) { 1462 for (mips64::GpuRegister* reg2 : reg2_registers) { 1463 for (int32_t pos = 32; pos < 64; pos++) { 1464 for (int32_t size = 1; pos + size <= 64; size++) { 1465 __ Dinsu(*reg1, *reg2, pos, size); 1466 expected << "dinsu $" << *reg1 << ", $" << *reg2 << ", " << pos << ", " << size << "\n"; 1467 } 1468 } 1469 } 1470 } 1471 1472 DriverStr(expected.str(), "Dinsu"); 1473} 1474 1475TEST_F(AssemblerMIPS64Test, Lsa) { 1476 DriverStr(RepeatRRRIb(&mips64::Mips64Assembler::Lsa, 1477 2, 1478 "lsa ${reg1}, ${reg2}, ${reg3}, {imm}", 1479 1), 1480 "lsa"); 1481} 1482 1483TEST_F(AssemblerMIPS64Test, Dlsa) { 1484 DriverStr(RepeatRRRIb(&mips64::Mips64Assembler::Dlsa, 1485 2, 1486 "dlsa ${reg1}, ${reg2}, ${reg3}, {imm}", 1487 1), 1488 "dlsa"); 1489} 1490 1491TEST_F(AssemblerMIPS64Test, Wsbh) { 1492 DriverStr(RepeatRR(&mips64::Mips64Assembler::Wsbh, "wsbh ${reg1}, ${reg2}"), "wsbh"); 1493} 1494 1495TEST_F(AssemblerMIPS64Test, Sll) { 1496 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Sll, 5, "sll ${reg1}, ${reg2}, {imm}"), "sll"); 1497} 1498 1499TEST_F(AssemblerMIPS64Test, Srl) { 1500 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Srl, 5, "srl ${reg1}, ${reg2}, {imm}"), "srl"); 1501} 1502 1503TEST_F(AssemblerMIPS64Test, Rotr) { 1504 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Rotr, 5, "rotr ${reg1}, ${reg2}, {imm}"), "rotr"); 1505} 1506 1507TEST_F(AssemblerMIPS64Test, Sra) { 1508 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Sra, 5, "sra ${reg1}, ${reg2}, {imm}"), "sra"); 1509} 1510 1511TEST_F(AssemblerMIPS64Test, Sllv) { 1512 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Sllv, "sllv ${reg1}, ${reg2}, ${reg3}"), "sllv"); 1513} 1514 1515TEST_F(AssemblerMIPS64Test, Srlv) { 1516 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Srlv, "srlv ${reg1}, ${reg2}, ${reg3}"), "srlv"); 1517} 1518 1519TEST_F(AssemblerMIPS64Test, Rotrv) { 1520 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Rotrv, "rotrv ${reg1}, ${reg2}, ${reg3}"), "rotrv"); 1521} 1522 1523TEST_F(AssemblerMIPS64Test, Srav) { 1524 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Srav, "srav ${reg1}, ${reg2}, ${reg3}"), "srav"); 1525} 1526 1527TEST_F(AssemblerMIPS64Test, Dsll) { 1528 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Dsll, 5, "dsll ${reg1}, ${reg2}, {imm}"), "dsll"); 1529} 1530 1531TEST_F(AssemblerMIPS64Test, Dsrl) { 1532 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Dsrl, 5, "dsrl ${reg1}, ${reg2}, {imm}"), "dsrl"); 1533} 1534 1535TEST_F(AssemblerMIPS64Test, Drotr) { 1536 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Drotr, 5, "drotr ${reg1}, ${reg2}, {imm}"), 1537 "drotr"); 1538} 1539 1540TEST_F(AssemblerMIPS64Test, Dsra) { 1541 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Dsra, 5, "dsra ${reg1}, ${reg2}, {imm}"), "dsra"); 1542} 1543 1544TEST_F(AssemblerMIPS64Test, Dsll32) { 1545 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Dsll32, 5, "dsll32 ${reg1}, ${reg2}, {imm}"), 1546 "dsll32"); 1547} 1548 1549TEST_F(AssemblerMIPS64Test, Dsrl32) { 1550 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Dsrl32, 5, "dsrl32 ${reg1}, ${reg2}, {imm}"), 1551 "dsrl32"); 1552} 1553 1554TEST_F(AssemblerMIPS64Test, Drotr32) { 1555 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Drotr32, 5, "drotr32 ${reg1}, ${reg2}, {imm}"), 1556 "drotr32"); 1557} 1558 1559TEST_F(AssemblerMIPS64Test, Dsra32) { 1560 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Dsra32, 5, "dsra32 ${reg1}, ${reg2}, {imm}"), 1561 "dsra32"); 1562} 1563 1564TEST_F(AssemblerMIPS64Test, Dsllv) { 1565 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Dsllv, "dsllv ${reg1}, ${reg2}, ${reg3}"), "dsllv"); 1566} 1567 1568TEST_F(AssemblerMIPS64Test, Dsrlv) { 1569 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Dsrlv, "dsrlv ${reg1}, ${reg2}, ${reg3}"), "dsrlv"); 1570} 1571 1572TEST_F(AssemblerMIPS64Test, Dsrav) { 1573 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Dsrav, "dsrav ${reg1}, ${reg2}, ${reg3}"), "dsrav"); 1574} 1575 1576TEST_F(AssemblerMIPS64Test, Sc) { 1577 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Sc, -9, "sc ${reg1}, {imm}(${reg2})"), "sc"); 1578} 1579 1580TEST_F(AssemblerMIPS64Test, Scd) { 1581 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Scd, -9, "scd ${reg1}, {imm}(${reg2})"), "scd"); 1582} 1583 1584TEST_F(AssemblerMIPS64Test, Ll) { 1585 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Ll, -9, "ll ${reg1}, {imm}(${reg2})"), "ll"); 1586} 1587 1588TEST_F(AssemblerMIPS64Test, Lld) { 1589 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Lld, -9, "lld ${reg1}, {imm}(${reg2})"), "lld"); 1590} 1591 1592TEST_F(AssemblerMIPS64Test, Seleqz) { 1593 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Seleqz, "seleqz ${reg1}, ${reg2}, ${reg3}"), 1594 "seleqz"); 1595} 1596 1597TEST_F(AssemblerMIPS64Test, Selnez) { 1598 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Selnez, "selnez ${reg1}, ${reg2}, ${reg3}"), 1599 "selnez"); 1600} 1601 1602TEST_F(AssemblerMIPS64Test, Clz) { 1603 DriverStr(RepeatRR(&mips64::Mips64Assembler::Clz, "clz ${reg1}, ${reg2}"), "clz"); 1604} 1605 1606TEST_F(AssemblerMIPS64Test, Clo) { 1607 DriverStr(RepeatRR(&mips64::Mips64Assembler::Clo, "clo ${reg1}, ${reg2}"), "clo"); 1608} 1609 1610TEST_F(AssemblerMIPS64Test, Dclz) { 1611 DriverStr(RepeatRR(&mips64::Mips64Assembler::Dclz, "dclz ${reg1}, ${reg2}"), "dclz"); 1612} 1613 1614TEST_F(AssemblerMIPS64Test, Dclo) { 1615 DriverStr(RepeatRR(&mips64::Mips64Assembler::Dclo, "dclo ${reg1}, ${reg2}"), "dclo"); 1616} 1617 1618TEST_F(AssemblerMIPS64Test, LoadFromOffset) { 1619 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A0, 0); 1620 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 0); 1621 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 1); 1622 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 256); 1623 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 1000); 1624 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 0x7FFF); 1625 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 0x8000); 1626 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 0x8001); 1627 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 0x10000); 1628 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 0x12345678); 1629 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, -256); 1630 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, -32768); 1631 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 0xABCDEF00); 1632 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 0x7FFFFFFE); 1633 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 0x7FFFFFFF); 1634 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 0x80000000); 1635 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 0x80000001); 1636 1637 __ LoadFromOffset(mips64::kLoadUnsignedByte, mips64::A0, mips64::A0, 0); 1638 __ LoadFromOffset(mips64::kLoadUnsignedByte, mips64::A0, mips64::A1, 0); 1639 __ LoadFromOffset(mips64::kLoadUnsignedByte, mips64::A0, mips64::A1, 1); 1640 __ LoadFromOffset(mips64::kLoadUnsignedByte, mips64::A0, mips64::A1, 256); 1641 __ LoadFromOffset(mips64::kLoadUnsignedByte, mips64::A0, mips64::A1, 1000); 1642 __ LoadFromOffset(mips64::kLoadUnsignedByte, mips64::A0, mips64::A1, 0x7FFF); 1643 __ LoadFromOffset(mips64::kLoadUnsignedByte, mips64::A0, mips64::A1, 0x8000); 1644 __ LoadFromOffset(mips64::kLoadUnsignedByte, mips64::A0, mips64::A1, 0x8001); 1645 __ LoadFromOffset(mips64::kLoadUnsignedByte, mips64::A0, mips64::A1, 0x10000); 1646 __ LoadFromOffset(mips64::kLoadUnsignedByte, mips64::A0, mips64::A1, 0x12345678); 1647 __ LoadFromOffset(mips64::kLoadUnsignedByte, mips64::A0, mips64::A1, -256); 1648 __ LoadFromOffset(mips64::kLoadUnsignedByte, mips64::A0, mips64::A1, -32768); 1649 __ LoadFromOffset(mips64::kLoadUnsignedByte, mips64::A0, mips64::A1, 0xABCDEF00); 1650 __ LoadFromOffset(mips64::kLoadUnsignedByte, mips64::A0, mips64::A1, 0x7FFFFFFE); 1651 __ LoadFromOffset(mips64::kLoadUnsignedByte, mips64::A0, mips64::A1, 0x7FFFFFFF); 1652 __ LoadFromOffset(mips64::kLoadUnsignedByte, mips64::A0, mips64::A1, 0x80000000); 1653 __ LoadFromOffset(mips64::kLoadUnsignedByte, mips64::A0, mips64::A1, 0x80000001); 1654 1655 __ LoadFromOffset(mips64::kLoadSignedHalfword, mips64::A0, mips64::A0, 0); 1656 __ LoadFromOffset(mips64::kLoadSignedHalfword, mips64::A0, mips64::A1, 0); 1657 __ LoadFromOffset(mips64::kLoadSignedHalfword, mips64::A0, mips64::A1, 2); 1658 __ LoadFromOffset(mips64::kLoadSignedHalfword, mips64::A0, mips64::A1, 256); 1659 __ LoadFromOffset(mips64::kLoadSignedHalfword, mips64::A0, mips64::A1, 1000); 1660 __ LoadFromOffset(mips64::kLoadSignedHalfword, mips64::A0, mips64::A1, 0x7FFE); 1661 __ LoadFromOffset(mips64::kLoadSignedHalfword, mips64::A0, mips64::A1, 0x8000); 1662 __ LoadFromOffset(mips64::kLoadSignedHalfword, mips64::A0, mips64::A1, 0x8002); 1663 __ LoadFromOffset(mips64::kLoadSignedHalfword, mips64::A0, mips64::A1, 0x10000); 1664 __ LoadFromOffset(mips64::kLoadSignedHalfword, mips64::A0, mips64::A1, 0x12345678); 1665 __ LoadFromOffset(mips64::kLoadSignedHalfword, mips64::A0, mips64::A1, -256); 1666 __ LoadFromOffset(mips64::kLoadSignedHalfword, mips64::A0, mips64::A1, -32768); 1667 __ LoadFromOffset(mips64::kLoadSignedHalfword, mips64::A0, mips64::A1, 0xABCDEF00); 1668 __ LoadFromOffset(mips64::kLoadSignedHalfword, mips64::A0, mips64::A1, 0x7FFFFFFC); 1669 __ LoadFromOffset(mips64::kLoadSignedHalfword, mips64::A0, mips64::A1, 0x7FFFFFFE); 1670 __ LoadFromOffset(mips64::kLoadSignedHalfword, mips64::A0, mips64::A1, 0x80000000); 1671 __ LoadFromOffset(mips64::kLoadSignedHalfword, mips64::A0, mips64::A1, 0x80000002); 1672 1673 __ LoadFromOffset(mips64::kLoadUnsignedHalfword, mips64::A0, mips64::A0, 0); 1674 __ LoadFromOffset(mips64::kLoadUnsignedHalfword, mips64::A0, mips64::A1, 0); 1675 __ LoadFromOffset(mips64::kLoadUnsignedHalfword, mips64::A0, mips64::A1, 2); 1676 __ LoadFromOffset(mips64::kLoadUnsignedHalfword, mips64::A0, mips64::A1, 256); 1677 __ LoadFromOffset(mips64::kLoadUnsignedHalfword, mips64::A0, mips64::A1, 1000); 1678 __ LoadFromOffset(mips64::kLoadUnsignedHalfword, mips64::A0, mips64::A1, 0x7FFE); 1679 __ LoadFromOffset(mips64::kLoadUnsignedHalfword, mips64::A0, mips64::A1, 0x8000); 1680 __ LoadFromOffset(mips64::kLoadUnsignedHalfword, mips64::A0, mips64::A1, 0x8002); 1681 __ LoadFromOffset(mips64::kLoadUnsignedHalfword, mips64::A0, mips64::A1, 0x10000); 1682 __ LoadFromOffset(mips64::kLoadUnsignedHalfword, mips64::A0, mips64::A1, 0x12345678); 1683 __ LoadFromOffset(mips64::kLoadUnsignedHalfword, mips64::A0, mips64::A1, -256); 1684 __ LoadFromOffset(mips64::kLoadUnsignedHalfword, mips64::A0, mips64::A1, -32768); 1685 __ LoadFromOffset(mips64::kLoadUnsignedHalfword, mips64::A0, mips64::A1, 0xABCDEF00); 1686 __ LoadFromOffset(mips64::kLoadUnsignedHalfword, mips64::A0, mips64::A1, 0x7FFFFFFC); 1687 __ LoadFromOffset(mips64::kLoadUnsignedHalfword, mips64::A0, mips64::A1, 0x7FFFFFFE); 1688 __ LoadFromOffset(mips64::kLoadUnsignedHalfword, mips64::A0, mips64::A1, 0x80000000); 1689 __ LoadFromOffset(mips64::kLoadUnsignedHalfword, mips64::A0, mips64::A1, 0x80000002); 1690 1691 __ LoadFromOffset(mips64::kLoadWord, mips64::A0, mips64::A0, 0); 1692 __ LoadFromOffset(mips64::kLoadWord, mips64::A0, mips64::A1, 0); 1693 __ LoadFromOffset(mips64::kLoadWord, mips64::A0, mips64::A1, 4); 1694 __ LoadFromOffset(mips64::kLoadWord, mips64::A0, mips64::A1, 256); 1695 __ LoadFromOffset(mips64::kLoadWord, mips64::A0, mips64::A1, 1000); 1696 __ LoadFromOffset(mips64::kLoadWord, mips64::A0, mips64::A1, 0x7FFC); 1697 __ LoadFromOffset(mips64::kLoadWord, mips64::A0, mips64::A1, 0x8000); 1698 __ LoadFromOffset(mips64::kLoadWord, mips64::A0, mips64::A1, 0x8004); 1699 __ LoadFromOffset(mips64::kLoadWord, mips64::A0, mips64::A1, 0x10000); 1700 __ LoadFromOffset(mips64::kLoadWord, mips64::A0, mips64::A1, 0x12345678); 1701 __ LoadFromOffset(mips64::kLoadWord, mips64::A0, mips64::A1, -256); 1702 __ LoadFromOffset(mips64::kLoadWord, mips64::A0, mips64::A1, -32768); 1703 __ LoadFromOffset(mips64::kLoadWord, mips64::A0, mips64::A1, 0xABCDEF00); 1704 __ LoadFromOffset(mips64::kLoadWord, mips64::A0, mips64::A1, 0x7FFFFFF8); 1705 __ LoadFromOffset(mips64::kLoadWord, mips64::A0, mips64::A1, 0x7FFFFFFC); 1706 __ LoadFromOffset(mips64::kLoadWord, mips64::A0, mips64::A1, 0x80000000); 1707 __ LoadFromOffset(mips64::kLoadWord, mips64::A0, mips64::A1, 0x80000004); 1708 1709 __ LoadFromOffset(mips64::kLoadUnsignedWord, mips64::A0, mips64::A0, 0); 1710 __ LoadFromOffset(mips64::kLoadUnsignedWord, mips64::A0, mips64::A1, 0); 1711 __ LoadFromOffset(mips64::kLoadUnsignedWord, mips64::A0, mips64::A1, 4); 1712 __ LoadFromOffset(mips64::kLoadUnsignedWord, mips64::A0, mips64::A1, 256); 1713 __ LoadFromOffset(mips64::kLoadUnsignedWord, mips64::A0, mips64::A1, 1000); 1714 __ LoadFromOffset(mips64::kLoadUnsignedWord, mips64::A0, mips64::A1, 0x7FFC); 1715 __ LoadFromOffset(mips64::kLoadUnsignedWord, mips64::A0, mips64::A1, 0x8000); 1716 __ LoadFromOffset(mips64::kLoadUnsignedWord, mips64::A0, mips64::A1, 0x8004); 1717 __ LoadFromOffset(mips64::kLoadUnsignedWord, mips64::A0, mips64::A1, 0x10000); 1718 __ LoadFromOffset(mips64::kLoadUnsignedWord, mips64::A0, mips64::A1, 0x12345678); 1719 __ LoadFromOffset(mips64::kLoadUnsignedWord, mips64::A0, mips64::A1, -256); 1720 __ LoadFromOffset(mips64::kLoadUnsignedWord, mips64::A0, mips64::A1, -32768); 1721 __ LoadFromOffset(mips64::kLoadUnsignedWord, mips64::A0, mips64::A1, 0xABCDEF00); 1722 __ LoadFromOffset(mips64::kLoadUnsignedWord, mips64::A0, mips64::A1, 0x7FFFFFF8); 1723 __ LoadFromOffset(mips64::kLoadUnsignedWord, mips64::A0, mips64::A1, 0x7FFFFFFC); 1724 __ LoadFromOffset(mips64::kLoadUnsignedWord, mips64::A0, mips64::A1, 0x80000000); 1725 __ LoadFromOffset(mips64::kLoadUnsignedWord, mips64::A0, mips64::A1, 0x80000004); 1726 1727 __ LoadFromOffset(mips64::kLoadDoubleword, mips64::A0, mips64::A0, 0); 1728 __ LoadFromOffset(mips64::kLoadDoubleword, mips64::A0, mips64::A1, 0); 1729 __ LoadFromOffset(mips64::kLoadDoubleword, mips64::A0, mips64::A1, 4); 1730 __ LoadFromOffset(mips64::kLoadDoubleword, mips64::A0, mips64::A1, 256); 1731 __ LoadFromOffset(mips64::kLoadDoubleword, mips64::A0, mips64::A1, 1000); 1732 __ LoadFromOffset(mips64::kLoadDoubleword, mips64::A0, mips64::A1, 0x7FFC); 1733 __ LoadFromOffset(mips64::kLoadDoubleword, mips64::A0, mips64::A1, 0x8000); 1734 __ LoadFromOffset(mips64::kLoadDoubleword, mips64::A0, mips64::A1, 0x8004); 1735 __ LoadFromOffset(mips64::kLoadDoubleword, mips64::A0, mips64::A1, 0x10000); 1736 __ LoadFromOffset(mips64::kLoadDoubleword, mips64::A0, mips64::A1, 0x27FFC); 1737 __ LoadFromOffset(mips64::kLoadDoubleword, mips64::A0, mips64::A1, 0x12345678); 1738 __ LoadFromOffset(mips64::kLoadDoubleword, mips64::A0, mips64::A1, -256); 1739 __ LoadFromOffset(mips64::kLoadDoubleword, mips64::A0, mips64::A1, -32768); 1740 __ LoadFromOffset(mips64::kLoadDoubleword, mips64::A0, mips64::A1, 0xABCDEF00); 1741 __ LoadFromOffset(mips64::kLoadDoubleword, mips64::A0, mips64::A1, 0x7FFFFFF8); 1742 __ LoadFromOffset(mips64::kLoadDoubleword, mips64::A0, mips64::A1, 0x7FFFFFFC); 1743 __ LoadFromOffset(mips64::kLoadDoubleword, mips64::A0, mips64::A1, 0x80000000); 1744 __ LoadFromOffset(mips64::kLoadDoubleword, mips64::A0, mips64::A1, 0x80000004); 1745 1746 const char* expected = 1747 "lb $a0, 0($a0)\n" 1748 "lb $a0, 0($a1)\n" 1749 "lb $a0, 1($a1)\n" 1750 "lb $a0, 256($a1)\n" 1751 "lb $a0, 1000($a1)\n" 1752 "lb $a0, 0x7FFF($a1)\n" 1753 "daddiu $at, $a1, 0x7FF8\n" 1754 "lb $a0, 8($at)\n" 1755 "daddiu $at, $a1, 32760\n" 1756 "lb $a0, 9($at)\n" 1757 "daui $at, $a1, 1\n" 1758 "lb $a0, 0($at)\n" 1759 "daui $at, $a1, 0x1234\n" 1760 "lb $a0, 0x5678($at)\n" 1761 "lb $a0, -256($a1)\n" 1762 "lb $a0, -32768($a1)\n" 1763 "daui $at, $a1, 0xABCE\n" 1764 "lb $a0, -4352($at)\n" 1765 "daui $at, $a1, 32768\n" 1766 "dahi $at, $at, 1\n" 1767 "lb $a0, -2($at)\n" 1768 "daui $at, $a1, 32768\n" 1769 "dahi $at, $at, 1\n" 1770 "lb $a0, -1($at)\n" 1771 "daui $at, $a1, 32768\n" 1772 "lb $a0, 0($at)\n" 1773 "daui $at, $a1, 32768\n" 1774 "lb $a0, 1($at)\n" 1775 1776 "lbu $a0, 0($a0)\n" 1777 "lbu $a0, 0($a1)\n" 1778 "lbu $a0, 1($a1)\n" 1779 "lbu $a0, 256($a1)\n" 1780 "lbu $a0, 1000($a1)\n" 1781 "lbu $a0, 0x7FFF($a1)\n" 1782 "daddiu $at, $a1, 0x7FF8\n" 1783 "lbu $a0, 8($at)\n" 1784 "daddiu $at, $a1, 32760\n" 1785 "lbu $a0, 9($at)\n" 1786 "daui $at, $a1, 1\n" 1787 "lbu $a0, 0($at)\n" 1788 "daui $at, $a1, 0x1234\n" 1789 "lbu $a0, 0x5678($at)\n" 1790 "lbu $a0, -256($a1)\n" 1791 "lbu $a0, -32768($a1)\n" 1792 "daui $at, $a1, 0xABCE\n" 1793 "lbu $a0, -4352($at)\n" 1794 "daui $at, $a1, 32768\n" 1795 "dahi $at, $at, 1\n" 1796 "lbu $a0, -2($at)\n" 1797 "daui $at, $a1, 32768\n" 1798 "dahi $at, $at, 1\n" 1799 "lbu $a0, -1($at)\n" 1800 "daui $at, $a1, 32768\n" 1801 "lbu $a0, 0($at)\n" 1802 "daui $at, $a1, 32768\n" 1803 "lbu $a0, 1($at)\n" 1804 1805 "lh $a0, 0($a0)\n" 1806 "lh $a0, 0($a1)\n" 1807 "lh $a0, 2($a1)\n" 1808 "lh $a0, 256($a1)\n" 1809 "lh $a0, 1000($a1)\n" 1810 "lh $a0, 0x7FFE($a1)\n" 1811 "daddiu $at, $a1, 0x7FF8\n" 1812 "lh $a0, 8($at)\n" 1813 "daddiu $at, $a1, 32760\n" 1814 "lh $a0, 10($at)\n" 1815 "daui $at, $a1, 1\n" 1816 "lh $a0, 0($at)\n" 1817 "daui $at, $a1, 0x1234\n" 1818 "lh $a0, 0x5678($at)\n" 1819 "lh $a0, -256($a1)\n" 1820 "lh $a0, -32768($a1)\n" 1821 "daui $at, $a1, 0xABCE\n" 1822 "lh $a0, -4352($at)\n" 1823 "daui $at, $a1, 32768\n" 1824 "dahi $at, $at, 1\n" 1825 "lh $a0, -4($at)\n" 1826 "daui $at, $a1, 32768\n" 1827 "dahi $at, $at, 1\n" 1828 "lh $a0, -2($at)\n" 1829 "daui $at, $a1, 32768\n" 1830 "lh $a0, 0($at)\n" 1831 "daui $at, $a1, 32768\n" 1832 "lh $a0, 2($at)\n" 1833 1834 "lhu $a0, 0($a0)\n" 1835 "lhu $a0, 0($a1)\n" 1836 "lhu $a0, 2($a1)\n" 1837 "lhu $a0, 256($a1)\n" 1838 "lhu $a0, 1000($a1)\n" 1839 "lhu $a0, 0x7FFE($a1)\n" 1840 "daddiu $at, $a1, 0x7FF8\n" 1841 "lhu $a0, 8($at)\n" 1842 "daddiu $at, $a1, 32760\n" 1843 "lhu $a0, 10($at)\n" 1844 "daui $at, $a1, 1\n" 1845 "lhu $a0, 0($at)\n" 1846 "daui $at, $a1, 0x1234\n" 1847 "lhu $a0, 0x5678($at)\n" 1848 "lhu $a0, -256($a1)\n" 1849 "lhu $a0, -32768($a1)\n" 1850 "daui $at, $a1, 0xABCE\n" 1851 "lhu $a0, -4352($at)\n" 1852 "daui $at, $a1, 32768\n" 1853 "dahi $at, $at, 1\n" 1854 "lhu $a0, -4($at)\n" 1855 "daui $at, $a1, 32768\n" 1856 "dahi $at, $at, 1\n" 1857 "lhu $a0, -2($at)\n" 1858 "daui $at, $a1, 32768\n" 1859 "lhu $a0, 0($at)\n" 1860 "daui $at, $a1, 32768\n" 1861 "lhu $a0, 2($at)\n" 1862 1863 "lw $a0, 0($a0)\n" 1864 "lw $a0, 0($a1)\n" 1865 "lw $a0, 4($a1)\n" 1866 "lw $a0, 256($a1)\n" 1867 "lw $a0, 1000($a1)\n" 1868 "lw $a0, 0x7FFC($a1)\n" 1869 "daddiu $at, $a1, 0x7FF8\n" 1870 "lw $a0, 8($at)\n" 1871 "daddiu $at, $a1, 32760\n" 1872 "lw $a0, 12($at)\n" 1873 "daui $at, $a1, 1\n" 1874 "lw $a0, 0($at)\n" 1875 "daui $at, $a1, 0x1234\n" 1876 "lw $a0, 0x5678($at)\n" 1877 "lw $a0, -256($a1)\n" 1878 "lw $a0, -32768($a1)\n" 1879 "daui $at, $a1, 0xABCE\n" 1880 "lw $a0, -4352($at)\n" 1881 "daui $at, $a1, 32768\n" 1882 "dahi $at, $at, 1\n" 1883 "lw $a0, -8($at)\n" 1884 "daui $at, $a1, 32768\n" 1885 "dahi $at, $at, 1\n" 1886 "lw $a0, -4($at)\n" 1887 "daui $at, $a1, 32768\n" 1888 "lw $a0, 0($at)\n" 1889 "daui $at, $a1, 32768\n" 1890 "lw $a0, 4($at)\n" 1891 1892 "lwu $a0, 0($a0)\n" 1893 "lwu $a0, 0($a1)\n" 1894 "lwu $a0, 4($a1)\n" 1895 "lwu $a0, 256($a1)\n" 1896 "lwu $a0, 1000($a1)\n" 1897 "lwu $a0, 0x7FFC($a1)\n" 1898 "daddiu $at, $a1, 0x7FF8\n" 1899 "lwu $a0, 8($at)\n" 1900 "daddiu $at, $a1, 32760\n" 1901 "lwu $a0, 12($at)\n" 1902 "daui $at, $a1, 1\n" 1903 "lwu $a0, 0($at)\n" 1904 "daui $at, $a1, 0x1234\n" 1905 "lwu $a0, 0x5678($at)\n" 1906 "lwu $a0, -256($a1)\n" 1907 "lwu $a0, -32768($a1)\n" 1908 "daui $at, $a1, 0xABCE\n" 1909 "lwu $a0, -4352($at)\n" 1910 "daui $at, $a1, 32768\n" 1911 "dahi $at, $at, 1\n" 1912 "lwu $a0, -8($at)\n" 1913 "daui $at, $a1, 32768\n" 1914 "dahi $at, $at, 1\n" 1915 "lwu $a0, -4($at)\n" 1916 "daui $at, $a1, 32768\n" 1917 "lwu $a0, 0($at)\n" 1918 "daui $at, $a1, 32768\n" 1919 "lwu $a0, 4($at)\n" 1920 1921 "ld $a0, 0($a0)\n" 1922 "ld $a0, 0($a1)\n" 1923 "lwu $a0, 4($a1)\n" 1924 "lwu $t3, 8($a1)\n" 1925 "dinsu $a0, $t3, 32, 32\n" 1926 "ld $a0, 256($a1)\n" 1927 "ld $a0, 1000($a1)\n" 1928 "daddiu $at, $a1, 32760\n" 1929 "lwu $a0, 4($at)\n" 1930 "lwu $t3, 8($at)\n" 1931 "dinsu $a0, $t3, 32, 32\n" 1932 "daddiu $at, $a1, 32760\n" 1933 "ld $a0, 8($at)\n" 1934 "daddiu $at, $a1, 32760\n" 1935 "lwu $a0, 12($at)\n" 1936 "lwu $t3, 16($at)\n" 1937 "dinsu $a0, $t3, 32, 32\n" 1938 "daui $at, $a1, 1\n" 1939 "ld $a0, 0($at)\n" 1940 "daui $at, $a1, 2\n" 1941 "daddiu $at, $at, 8\n" 1942 "lwu $a0, 0x7ff4($at)\n" 1943 "lwu $t3, 0x7ff8($at)\n" 1944 "dinsu $a0, $t3, 32, 32\n" 1945 "daui $at, $a1, 0x1234\n" 1946 "ld $a0, 0x5678($at)\n" 1947 "ld $a0, -256($a1)\n" 1948 "ld $a0, -32768($a1)\n" 1949 "daui $at, $a1, 0xABCE\n" 1950 "ld $a0, -4352($at)\n" 1951 "daui $at, $a1, 32768\n" 1952 "dahi $at, $at, 1\n" 1953 "ld $a0, -8($at)\n" 1954 "daui $at, $a1, 32768\n" 1955 "dahi $at, $at, 1\n" 1956 "lwu $a0, -4($at)\n" 1957 "lwu $t3, 0($at)\n" 1958 "dinsu $a0, $t3, 32, 32\n" 1959 "daui $at, $a1, 32768\n" 1960 "ld $a0, 0($at)\n" 1961 "daui $at, $a1, 32768\n" 1962 "lwu $a0, 4($at)\n" 1963 "lwu $t3, 8($at)\n" 1964 "dinsu $a0, $t3, 32, 32\n"; 1965 DriverStr(expected, "LoadFromOffset"); 1966} 1967 1968TEST_F(AssemblerMIPS64Test, LoadFpuFromOffset) { 1969 __ LoadFpuFromOffset(mips64::kLoadWord, mips64::F0, mips64::A0, 0); 1970 __ LoadFpuFromOffset(mips64::kLoadWord, mips64::F0, mips64::A0, 4); 1971 __ LoadFpuFromOffset(mips64::kLoadWord, mips64::F0, mips64::A0, 256); 1972 __ LoadFpuFromOffset(mips64::kLoadWord, mips64::F0, mips64::A0, 0x7FFC); 1973 __ LoadFpuFromOffset(mips64::kLoadWord, mips64::F0, mips64::A0, 0x8000); 1974 __ LoadFpuFromOffset(mips64::kLoadWord, mips64::F0, mips64::A0, 0x8004); 1975 __ LoadFpuFromOffset(mips64::kLoadWord, mips64::F0, mips64::A0, 0x10000); 1976 __ LoadFpuFromOffset(mips64::kLoadWord, mips64::F0, mips64::A0, 0x12345678); 1977 __ LoadFpuFromOffset(mips64::kLoadWord, mips64::F0, mips64::A0, -256); 1978 __ LoadFpuFromOffset(mips64::kLoadWord, mips64::F0, mips64::A0, -32768); 1979 __ LoadFpuFromOffset(mips64::kLoadWord, mips64::F0, mips64::A0, 0xABCDEF00); 1980 1981 __ LoadFpuFromOffset(mips64::kLoadDoubleword, mips64::F0, mips64::A0, 0); 1982 __ LoadFpuFromOffset(mips64::kLoadDoubleword, mips64::F0, mips64::A0, 4); 1983 __ LoadFpuFromOffset(mips64::kLoadDoubleword, mips64::F0, mips64::A0, 256); 1984 __ LoadFpuFromOffset(mips64::kLoadDoubleword, mips64::F0, mips64::A0, 0x7FFC); 1985 __ LoadFpuFromOffset(mips64::kLoadDoubleword, mips64::F0, mips64::A0, 0x8000); 1986 __ LoadFpuFromOffset(mips64::kLoadDoubleword, mips64::F0, mips64::A0, 0x8004); 1987 __ LoadFpuFromOffset(mips64::kLoadDoubleword, mips64::F0, mips64::A0, 0x10000); 1988 __ LoadFpuFromOffset(mips64::kLoadDoubleword, mips64::F0, mips64::A0, 0x12345678); 1989 __ LoadFpuFromOffset(mips64::kLoadDoubleword, mips64::F0, mips64::A0, -256); 1990 __ LoadFpuFromOffset(mips64::kLoadDoubleword, mips64::F0, mips64::A0, -32768); 1991 __ LoadFpuFromOffset(mips64::kLoadDoubleword, mips64::F0, mips64::A0, 0xABCDEF00); 1992 1993 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 0); 1994 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 1); 1995 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 2); 1996 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 4); 1997 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 8); 1998 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 511); 1999 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 512); 2000 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 513); 2001 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 514); 2002 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 516); 2003 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 1022); 2004 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 1024); 2005 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 1025); 2006 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 1026); 2007 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 1028); 2008 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 2044); 2009 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 2048); 2010 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 2049); 2011 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 2050); 2012 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 2052); 2013 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 4088); 2014 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 4096); 2015 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 4097); 2016 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 4098); 2017 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 4100); 2018 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 4104); 2019 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 0x7FFC); 2020 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 0x8000); 2021 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 0x10000); 2022 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 0x12345678); 2023 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 0x12350078); 2024 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, -256); 2025 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, -511); 2026 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, -513); 2027 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, -1022); 2028 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, -1026); 2029 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, -2044); 2030 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, -2052); 2031 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, -4096); 2032 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, -4104); 2033 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, -32768); 2034 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 0xABCDEF00); 2035 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 0x7FFFABCD); 2036 2037 const char* expected = 2038 "lwc1 $f0, 0($a0)\n" 2039 "lwc1 $f0, 4($a0)\n" 2040 "lwc1 $f0, 256($a0)\n" 2041 "lwc1 $f0, 0x7FFC($a0)\n" 2042 "daddiu $at, $a0, 32760 # 0x7FF8\n" 2043 "lwc1 $f0, 8($at)\n" 2044 "daddiu $at, $a0, 32760 # 0x7FF8\n" 2045 "lwc1 $f0, 12($at)\n" 2046 "daui $at, $a0, 1\n" 2047 "lwc1 $f0, 0($at)\n" 2048 "daui $at, $a0, 4660 # 0x1234\n" 2049 "lwc1 $f0, 22136($at) # 0x5678\n" 2050 "lwc1 $f0, -256($a0)\n" 2051 "lwc1 $f0, -32768($a0)\n" 2052 "daui $at, $a0, 0xABCE\n" 2053 "lwc1 $f0, -0x1100($at) # 0xEF00\n" 2054 2055 "ldc1 $f0, 0($a0)\n" 2056 "lwc1 $f0, 4($a0)\n" 2057 "lw $t3, 8($a0)\n" 2058 "mthc1 $t3, $f0\n" 2059 "ldc1 $f0, 256($a0)\n" 2060 "daddiu $at, $a0, 32760 # 0x7FF8\n" 2061 "lwc1 $f0, 4($at)\n" 2062 "lw $t3, 8($at)\n" 2063 "mthc1 $t3, $f0\n" 2064 "daddiu $at, $a0, 32760 # 0x7FF8\n" 2065 "ldc1 $f0, 8($at)\n" 2066 "daddiu $at, $a0, 32760 # 0x7FF8\n" 2067 "lwc1 $f0, 12($at)\n" 2068 "lw $t3, 16($at)\n" 2069 "mthc1 $t3, $f0\n" 2070 "daui $at, $a0, 1\n" 2071 "ldc1 $f0, 0($at)\n" 2072 "daui $at, $a0, 4660 # 0x1234\n" 2073 "ldc1 $f0, 22136($at) # 0x5678\n" 2074 "ldc1 $f0, -256($a0)\n" 2075 "ldc1 $f0, -32768($a0)\n" 2076 "daui $at, $a0, 0xABCE\n" 2077 "ldc1 $f0, -0x1100($at) # 0xEF00\n" 2078 2079 "ld.d $w0, 0($a0)\n" 2080 "ld.b $w0, 1($a0)\n" 2081 "ld.h $w0, 2($a0)\n" 2082 "ld.w $w0, 4($a0)\n" 2083 "ld.d $w0, 8($a0)\n" 2084 "ld.b $w0, 511($a0)\n" 2085 "ld.d $w0, 512($a0)\n" 2086 "daddiu $at, $a0, 513\n" 2087 "ld.b $w0, 0($at)\n" 2088 "ld.h $w0, 514($a0)\n" 2089 "ld.w $w0, 516($a0)\n" 2090 "ld.h $w0, 1022($a0)\n" 2091 "ld.d $w0, 1024($a0)\n" 2092 "daddiu $at, $a0, 1025\n" 2093 "ld.b $w0, 0($at)\n" 2094 "daddiu $at, $a0, 1026\n" 2095 "ld.h $w0, 0($at)\n" 2096 "ld.w $w0, 1028($a0)\n" 2097 "ld.w $w0, 2044($a0)\n" 2098 "ld.d $w0, 2048($a0)\n" 2099 "daddiu $at, $a0, 2049\n" 2100 "ld.b $w0, 0($at)\n" 2101 "daddiu $at, $a0, 2050\n" 2102 "ld.h $w0, 0($at)\n" 2103 "daddiu $at, $a0, 2052\n" 2104 "ld.w $w0, 0($at)\n" 2105 "ld.d $w0, 4088($a0)\n" 2106 "daddiu $at, $a0, 4096\n" 2107 "ld.d $w0, 0($at)\n" 2108 "daddiu $at, $a0, 4097\n" 2109 "ld.b $w0, 0($at)\n" 2110 "daddiu $at, $a0, 4098\n" 2111 "ld.h $w0, 0($at)\n" 2112 "daddiu $at, $a0, 4100\n" 2113 "ld.w $w0, 0($at)\n" 2114 "daddiu $at, $a0, 4104\n" 2115 "ld.d $w0, 0($at)\n" 2116 "daddiu $at, $a0, 0x7FFC\n" 2117 "ld.w $w0, 0($at)\n" 2118 "daddiu $at, $a0, 0x7FF8\n" 2119 "ld.d $w0, 8($at)\n" 2120 "daui $at, $a0, 0x1\n" 2121 "ld.d $w0, 0($at)\n" 2122 "daui $at, $a0, 0x1234\n" 2123 "daddiu $at, $at, 0x6000\n" 2124 "ld.d $w0, -2440($at) # 0xF678\n" 2125 "daui $at, $a0, 0x1235\n" 2126 "ld.d $w0, 0x78($at)\n" 2127 "ld.d $w0, -256($a0)\n" 2128 "ld.b $w0, -511($a0)\n" 2129 "daddiu $at, $a0, -513\n" 2130 "ld.b $w0, 0($at)\n" 2131 "ld.h $w0, -1022($a0)\n" 2132 "daddiu $at, $a0, -1026\n" 2133 "ld.h $w0, 0($at)\n" 2134 "ld.w $w0, -2044($a0)\n" 2135 "daddiu $at, $a0, -2052\n" 2136 "ld.w $w0, 0($at)\n" 2137 "ld.d $w0, -4096($a0)\n" 2138 "daddiu $at, $a0, -4104\n" 2139 "ld.d $w0, 0($at)\n" 2140 "daddiu $at, $a0, -32768\n" 2141 "ld.d $w0, 0($at)\n" 2142 "daui $at, $a0, 0xABCE\n" 2143 "daddiu $at, $at, -8192 # 0xE000\n" 2144 "ld.d $w0, 0xF00($at)\n" 2145 "daui $at, $a0, 0x8000\n" 2146 "dahi $at, $at, 1\n" 2147 "daddiu $at, $at, -21504 # 0xAC00\n" 2148 "ld.b $w0, -51($at) # 0xFFCD\n"; 2149 DriverStr(expected, "LoadFpuFromOffset"); 2150} 2151 2152TEST_F(AssemblerMIPS64Test, StoreToOffset) { 2153 __ StoreToOffset(mips64::kStoreByte, mips64::A0, mips64::A0, 0); 2154 __ StoreToOffset(mips64::kStoreByte, mips64::A0, mips64::A1, 0); 2155 __ StoreToOffset(mips64::kStoreByte, mips64::A0, mips64::A1, 1); 2156 __ StoreToOffset(mips64::kStoreByte, mips64::A0, mips64::A1, 256); 2157 __ StoreToOffset(mips64::kStoreByte, mips64::A0, mips64::A1, 1000); 2158 __ StoreToOffset(mips64::kStoreByte, mips64::A0, mips64::A1, 0x7FFF); 2159 __ StoreToOffset(mips64::kStoreByte, mips64::A0, mips64::A1, 0x8000); 2160 __ StoreToOffset(mips64::kStoreByte, mips64::A0, mips64::A1, 0x8001); 2161 __ StoreToOffset(mips64::kStoreByte, mips64::A0, mips64::A1, 0x10000); 2162 __ StoreToOffset(mips64::kStoreByte, mips64::A0, mips64::A1, 0x12345678); 2163 __ StoreToOffset(mips64::kStoreByte, mips64::A0, mips64::A1, -256); 2164 __ StoreToOffset(mips64::kStoreByte, mips64::A0, mips64::A1, -32768); 2165 __ StoreToOffset(mips64::kStoreByte, mips64::A0, mips64::A1, 0xABCDEF00); 2166 2167 __ StoreToOffset(mips64::kStoreHalfword, mips64::A0, mips64::A0, 0); 2168 __ StoreToOffset(mips64::kStoreHalfword, mips64::A0, mips64::A1, 0); 2169 __ StoreToOffset(mips64::kStoreHalfword, mips64::A0, mips64::A1, 2); 2170 __ StoreToOffset(mips64::kStoreHalfword, mips64::A0, mips64::A1, 256); 2171 __ StoreToOffset(mips64::kStoreHalfword, mips64::A0, mips64::A1, 1000); 2172 __ StoreToOffset(mips64::kStoreHalfword, mips64::A0, mips64::A1, 0x7FFE); 2173 __ StoreToOffset(mips64::kStoreHalfword, mips64::A0, mips64::A1, 0x8000); 2174 __ StoreToOffset(mips64::kStoreHalfword, mips64::A0, mips64::A1, 0x8002); 2175 __ StoreToOffset(mips64::kStoreHalfword, mips64::A0, mips64::A1, 0x10000); 2176 __ StoreToOffset(mips64::kStoreHalfword, mips64::A0, mips64::A1, 0x12345678); 2177 __ StoreToOffset(mips64::kStoreHalfword, mips64::A0, mips64::A1, -256); 2178 __ StoreToOffset(mips64::kStoreHalfword, mips64::A0, mips64::A1, -32768); 2179 __ StoreToOffset(mips64::kStoreHalfword, mips64::A0, mips64::A1, 0xABCDEF00); 2180 2181 __ StoreToOffset(mips64::kStoreWord, mips64::A0, mips64::A0, 0); 2182 __ StoreToOffset(mips64::kStoreWord, mips64::A0, mips64::A1, 0); 2183 __ StoreToOffset(mips64::kStoreWord, mips64::A0, mips64::A1, 4); 2184 __ StoreToOffset(mips64::kStoreWord, mips64::A0, mips64::A1, 256); 2185 __ StoreToOffset(mips64::kStoreWord, mips64::A0, mips64::A1, 1000); 2186 __ StoreToOffset(mips64::kStoreWord, mips64::A0, mips64::A1, 0x7FFC); 2187 __ StoreToOffset(mips64::kStoreWord, mips64::A0, mips64::A1, 0x8000); 2188 __ StoreToOffset(mips64::kStoreWord, mips64::A0, mips64::A1, 0x8004); 2189 __ StoreToOffset(mips64::kStoreWord, mips64::A0, mips64::A1, 0x10000); 2190 __ StoreToOffset(mips64::kStoreWord, mips64::A0, mips64::A1, 0x12345678); 2191 __ StoreToOffset(mips64::kStoreWord, mips64::A0, mips64::A1, -256); 2192 __ StoreToOffset(mips64::kStoreWord, mips64::A0, mips64::A1, -32768); 2193 __ StoreToOffset(mips64::kStoreWord, mips64::A0, mips64::A1, 0xABCDEF00); 2194 2195 __ StoreToOffset(mips64::kStoreDoubleword, mips64::A0, mips64::A0, 0); 2196 __ StoreToOffset(mips64::kStoreDoubleword, mips64::A0, mips64::A1, 0); 2197 __ StoreToOffset(mips64::kStoreDoubleword, mips64::A0, mips64::A1, 4); 2198 __ StoreToOffset(mips64::kStoreDoubleword, mips64::A0, mips64::A1, 256); 2199 __ StoreToOffset(mips64::kStoreDoubleword, mips64::A0, mips64::A1, 1000); 2200 __ StoreToOffset(mips64::kStoreDoubleword, mips64::A0, mips64::A1, 0x7FFC); 2201 __ StoreToOffset(mips64::kStoreDoubleword, mips64::A0, mips64::A1, 0x8000); 2202 __ StoreToOffset(mips64::kStoreDoubleword, mips64::A0, mips64::A1, 0x8004); 2203 __ StoreToOffset(mips64::kStoreDoubleword, mips64::A0, mips64::A1, 0x10000); 2204 __ StoreToOffset(mips64::kStoreDoubleword, mips64::A0, mips64::A1, 0x12345678); 2205 __ StoreToOffset(mips64::kStoreDoubleword, mips64::A0, mips64::A1, -256); 2206 __ StoreToOffset(mips64::kStoreDoubleword, mips64::A0, mips64::A1, -32768); 2207 __ StoreToOffset(mips64::kStoreDoubleword, mips64::A0, mips64::A1, 0xABCDEF00); 2208 __ StoreToOffset(mips64::kStoreDoubleword, mips64::A0, mips64::A1, 0x7FFFFFF8); 2209 __ StoreToOffset(mips64::kStoreDoubleword, mips64::A0, mips64::A1, 0x7FFFFFFC); 2210 __ StoreToOffset(mips64::kStoreDoubleword, mips64::A0, mips64::A1, 0x80000000); 2211 __ StoreToOffset(mips64::kStoreDoubleword, mips64::A0, mips64::A1, 0x80000004); 2212 2213 const char* expected = 2214 "sb $a0, 0($a0)\n" 2215 "sb $a0, 0($a1)\n" 2216 "sb $a0, 1($a1)\n" 2217 "sb $a0, 256($a1)\n" 2218 "sb $a0, 1000($a1)\n" 2219 "sb $a0, 0x7FFF($a1)\n" 2220 "daddiu $at, $a1, 0x7FF8\n" 2221 "sb $a0, 8($at)\n" 2222 "daddiu $at, $a1, 0x7FF8\n" 2223 "sb $a0, 9($at)\n" 2224 "daui $at, $a1, 1\n" 2225 "sb $a0, 0($at)\n" 2226 "daui $at, $a1, 4660 # 0x1234\n" 2227 "sb $a0, 22136($at) # 0x5678\n" 2228 "sb $a0, -256($a1)\n" 2229 "sb $a0, -32768($a1)\n" 2230 "daui $at, $a1, 43982 # 0xABCE\n" 2231 "sb $a0, -4352($at) # 0xEF00\n" 2232 2233 "sh $a0, 0($a0)\n" 2234 "sh $a0, 0($a1)\n" 2235 "sh $a0, 2($a1)\n" 2236 "sh $a0, 256($a1)\n" 2237 "sh $a0, 1000($a1)\n" 2238 "sh $a0, 0x7FFE($a1)\n" 2239 "daddiu $at, $a1, 0x7FF8\n" 2240 "sh $a0, 8($at)\n" 2241 "daddiu $at, $a1, 0x7FF8\n" 2242 "sh $a0, 10($at)\n" 2243 "daui $at, $a1, 1\n" 2244 "sh $a0, 0($at)\n" 2245 "daui $at, $a1, 4660 # 0x1234\n" 2246 "sh $a0, 22136($at) # 0x5678\n" 2247 "sh $a0, -256($a1)\n" 2248 "sh $a0, -32768($a1)\n" 2249 "daui $at, $a1, 43982 # 0xABCE\n" 2250 "sh $a0, -4352($at) # 0xEF00\n" 2251 2252 "sw $a0, 0($a0)\n" 2253 "sw $a0, 0($a1)\n" 2254 "sw $a0, 4($a1)\n" 2255 "sw $a0, 256($a1)\n" 2256 "sw $a0, 1000($a1)\n" 2257 "sw $a0, 0x7FFC($a1)\n" 2258 "daddiu $at, $a1, 0x7FF8\n" 2259 "sw $a0, 8($at)\n" 2260 "daddiu $at, $a1, 0x7FF8\n" 2261 "sw $a0, 12($at)\n" 2262 "daui $at, $a1, 1\n" 2263 "sw $a0, 0($at)\n" 2264 "daui $at, $a1, 4660 # 0x1234\n" 2265 "sw $a0, 22136($at) # 0x5678\n" 2266 "sw $a0, -256($a1)\n" 2267 "sw $a0, -32768($a1)\n" 2268 "daui $at, $a1, 43982 # 0xABCE\n" 2269 "sw $a0, -4352($at) # 0xEF00\n" 2270 2271 "sd $a0, 0($a0)\n" 2272 "sd $a0, 0($a1)\n" 2273 "sw $a0, 4($a1)\n" 2274 "dsrl32 $t3, $a0, 0\n" 2275 "sw $t3, 8($a1)\n" 2276 "sd $a0, 256($a1)\n" 2277 "sd $a0, 1000($a1)\n" 2278 "daddiu $at, $a1, 0x7FF8\n" 2279 "sw $a0, 4($at)\n" 2280 "dsrl32 $t3, $a0, 0\n" 2281 "sw $t3, 8($at)\n" 2282 "daddiu $at, $a1, 32760 # 0x7FF8\n" 2283 "sd $a0, 8($at)\n" 2284 "daddiu $at, $a1, 32760 # 0x7FF8\n" 2285 "sw $a0, 12($at)\n" 2286 "dsrl32 $t3, $a0, 0\n" 2287 "sw $t3, 16($at)\n" 2288 "daui $at, $a1, 1\n" 2289 "sd $a0, 0($at)\n" 2290 "daui $at, $a1, 4660 # 0x1234\n" 2291 "sd $a0, 22136($at) # 0x5678\n" 2292 "sd $a0, -256($a1)\n" 2293 "sd $a0, -32768($a1)\n" 2294 "daui $at, $a1, 0xABCE\n" 2295 "sd $a0, -0x1100($at)\n" 2296 "daui $at, $a1, 0x8000\n" 2297 "dahi $at, $at, 1\n" 2298 "sd $a0, -8($at)\n" 2299 "daui $at, $a1, 0x8000\n" 2300 "dahi $at, $at, 1\n" 2301 "sw $a0, -4($at) # 0xFFFC\n" 2302 "dsrl32 $t3, $a0, 0\n" 2303 "sw $t3, 0($at) # 0x0\n" 2304 "daui $at, $a1, 0x8000\n" 2305 "sd $a0, 0($at) # 0x0\n" 2306 "daui $at, $a1, 0x8000\n" 2307 "sw $a0, 4($at) # 0x4\n" 2308 "dsrl32 $t3, $a0, 0\n" 2309 "sw $t3, 8($at) # 0x8\n"; 2310 DriverStr(expected, "StoreToOffset"); 2311} 2312 2313TEST_F(AssemblerMIPS64Test, StoreFpuToOffset) { 2314 __ StoreFpuToOffset(mips64::kStoreWord, mips64::F0, mips64::A0, 0); 2315 __ StoreFpuToOffset(mips64::kStoreWord, mips64::F0, mips64::A0, 4); 2316 __ StoreFpuToOffset(mips64::kStoreWord, mips64::F0, mips64::A0, 256); 2317 __ StoreFpuToOffset(mips64::kStoreWord, mips64::F0, mips64::A0, 0x7FFC); 2318 __ StoreFpuToOffset(mips64::kStoreWord, mips64::F0, mips64::A0, 0x8000); 2319 __ StoreFpuToOffset(mips64::kStoreWord, mips64::F0, mips64::A0, 0x8004); 2320 __ StoreFpuToOffset(mips64::kStoreWord, mips64::F0, mips64::A0, 0x10000); 2321 __ StoreFpuToOffset(mips64::kStoreWord, mips64::F0, mips64::A0, 0x12345678); 2322 __ StoreFpuToOffset(mips64::kStoreWord, mips64::F0, mips64::A0, -256); 2323 __ StoreFpuToOffset(mips64::kStoreWord, mips64::F0, mips64::A0, -32768); 2324 __ StoreFpuToOffset(mips64::kStoreWord, mips64::F0, mips64::A0, 0xABCDEF00); 2325 2326 __ StoreFpuToOffset(mips64::kStoreDoubleword, mips64::F0, mips64::A0, 0); 2327 __ StoreFpuToOffset(mips64::kStoreDoubleword, mips64::F0, mips64::A0, 4); 2328 __ StoreFpuToOffset(mips64::kStoreDoubleword, mips64::F0, mips64::A0, 256); 2329 __ StoreFpuToOffset(mips64::kStoreDoubleword, mips64::F0, mips64::A0, 0x7FFC); 2330 __ StoreFpuToOffset(mips64::kStoreDoubleword, mips64::F0, mips64::A0, 0x8000); 2331 __ StoreFpuToOffset(mips64::kStoreDoubleword, mips64::F0, mips64::A0, 0x8004); 2332 __ StoreFpuToOffset(mips64::kStoreDoubleword, mips64::F0, mips64::A0, 0x10000); 2333 __ StoreFpuToOffset(mips64::kStoreDoubleword, mips64::F0, mips64::A0, 0x12345678); 2334 __ StoreFpuToOffset(mips64::kStoreDoubleword, mips64::F0, mips64::A0, -256); 2335 __ StoreFpuToOffset(mips64::kStoreDoubleword, mips64::F0, mips64::A0, -32768); 2336 __ StoreFpuToOffset(mips64::kStoreDoubleword, mips64::F0, mips64::A0, 0xABCDEF00); 2337 2338 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 0); 2339 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 1); 2340 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 2); 2341 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 4); 2342 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 8); 2343 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 511); 2344 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 512); 2345 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 513); 2346 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 514); 2347 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 516); 2348 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 1022); 2349 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 1024); 2350 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 1025); 2351 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 1026); 2352 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 1028); 2353 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 2044); 2354 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 2048); 2355 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 2049); 2356 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 2050); 2357 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 2052); 2358 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 4088); 2359 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 4096); 2360 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 4097); 2361 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 4098); 2362 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 4100); 2363 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 4104); 2364 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 0x7FFC); 2365 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 0x8000); 2366 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 0x10000); 2367 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 0x12345678); 2368 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 0x12350078); 2369 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, -256); 2370 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, -511); 2371 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, -513); 2372 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, -1022); 2373 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, -1026); 2374 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, -2044); 2375 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, -2052); 2376 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, -4096); 2377 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, -4104); 2378 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, -32768); 2379 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 0xABCDEF00); 2380 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 0x7FFFABCD); 2381 2382 const char* expected = 2383 "swc1 $f0, 0($a0)\n" 2384 "swc1 $f0, 4($a0)\n" 2385 "swc1 $f0, 256($a0)\n" 2386 "swc1 $f0, 0x7FFC($a0)\n" 2387 "daddiu $at, $a0, 32760 # 0x7FF8\n" 2388 "swc1 $f0, 8($at)\n" 2389 "daddiu $at, $a0, 32760 # 0x7FF8\n" 2390 "swc1 $f0, 12($at)\n" 2391 "daui $at, $a0, 1\n" 2392 "swc1 $f0, 0($at)\n" 2393 "daui $at, $a0, 4660 # 0x1234\n" 2394 "swc1 $f0, 22136($at) # 0x5678\n" 2395 "swc1 $f0, -256($a0)\n" 2396 "swc1 $f0, -32768($a0)\n" 2397 "daui $at, $a0, 0xABCE\n" 2398 "swc1 $f0, -0x1100($at)\n" 2399 2400 "sdc1 $f0, 0($a0)\n" 2401 "mfhc1 $t3, $f0\n" 2402 "swc1 $f0, 4($a0)\n" 2403 "sw $t3, 8($a0)\n" 2404 "sdc1 $f0, 256($a0)\n" 2405 "daddiu $at, $a0, 32760 # 0x7FF8\n" 2406 "mfhc1 $t3, $f0\n" 2407 "swc1 $f0, 4($at)\n" 2408 "sw $t3, 8($at)\n" 2409 "daddiu $at, $a0, 32760 # 0x7FF8\n" 2410 "sdc1 $f0, 8($at)\n" 2411 "daddiu $at, $a0, 32760 # 0x7FF8\n" 2412 "mfhc1 $t3, $f0\n" 2413 "swc1 $f0, 12($at)\n" 2414 "sw $t3, 16($at)\n" 2415 "daui $at, $a0, 1\n" 2416 "sdc1 $f0, 0($at)\n" 2417 "daui $at, $a0, 4660 # 0x1234\n" 2418 "sdc1 $f0, 22136($at) # 0x5678\n" 2419 "sdc1 $f0, -256($a0)\n" 2420 "sdc1 $f0, -32768($a0)\n" 2421 "daui $at, $a0, 0xABCE\n" 2422 "sdc1 $f0, -0x1100($at)\n" 2423 2424 "st.d $w0, 0($a0)\n" 2425 "st.b $w0, 1($a0)\n" 2426 "st.h $w0, 2($a0)\n" 2427 "st.w $w0, 4($a0)\n" 2428 "st.d $w0, 8($a0)\n" 2429 "st.b $w0, 511($a0)\n" 2430 "st.d $w0, 512($a0)\n" 2431 "daddiu $at, $a0, 513\n" 2432 "st.b $w0, 0($at)\n" 2433 "st.h $w0, 514($a0)\n" 2434 "st.w $w0, 516($a0)\n" 2435 "st.h $w0, 1022($a0)\n" 2436 "st.d $w0, 1024($a0)\n" 2437 "daddiu $at, $a0, 1025\n" 2438 "st.b $w0, 0($at)\n" 2439 "daddiu $at, $a0, 1026\n" 2440 "st.h $w0, 0($at)\n" 2441 "st.w $w0, 1028($a0)\n" 2442 "st.w $w0, 2044($a0)\n" 2443 "st.d $w0, 2048($a0)\n" 2444 "daddiu $at, $a0, 2049\n" 2445 "st.b $w0, 0($at)\n" 2446 "daddiu $at, $a0, 2050\n" 2447 "st.h $w0, 0($at)\n" 2448 "daddiu $at, $a0, 2052\n" 2449 "st.w $w0, 0($at)\n" 2450 "st.d $w0, 4088($a0)\n" 2451 "daddiu $at, $a0, 4096\n" 2452 "st.d $w0, 0($at)\n" 2453 "daddiu $at, $a0, 4097\n" 2454 "st.b $w0, 0($at)\n" 2455 "daddiu $at, $a0, 4098\n" 2456 "st.h $w0, 0($at)\n" 2457 "daddiu $at, $a0, 4100\n" 2458 "st.w $w0, 0($at)\n" 2459 "daddiu $at, $a0, 4104\n" 2460 "st.d $w0, 0($at)\n" 2461 "daddiu $at, $a0, 0x7FFC\n" 2462 "st.w $w0, 0($at)\n" 2463 "daddiu $at, $a0, 0x7FF8\n" 2464 "st.d $w0, 8($at)\n" 2465 "daui $at, $a0, 0x1\n" 2466 "st.d $w0, 0($at)\n" 2467 "daui $at, $a0, 0x1234\n" 2468 "daddiu $at, $at, 0x6000\n" 2469 "st.d $w0, -2440($at) # 0xF678\n" 2470 "daui $at, $a0, 0x1235\n" 2471 "st.d $w0, 0x78($at)\n" 2472 "st.d $w0, -256($a0)\n" 2473 "st.b $w0, -511($a0)\n" 2474 "daddiu $at, $a0, -513\n" 2475 "st.b $w0, 0($at)\n" 2476 "st.h $w0, -1022($a0)\n" 2477 "daddiu $at, $a0, -1026\n" 2478 "st.h $w0, 0($at)\n" 2479 "st.w $w0, -2044($a0)\n" 2480 "daddiu $at, $a0, -2052\n" 2481 "st.w $w0, 0($at)\n" 2482 "st.d $w0, -4096($a0)\n" 2483 "daddiu $at, $a0, -4104\n" 2484 "st.d $w0, 0($at)\n" 2485 "daddiu $at, $a0, -32768\n" 2486 "st.d $w0, 0($at)\n" 2487 "daui $at, $a0, 0xABCE\n" 2488 "daddiu $at, $at, -8192 # 0xE000\n" 2489 "st.d $w0, 0xF00($at)\n" 2490 "daui $at, $a0, 0x8000\n" 2491 "dahi $at, $at, 1\n" 2492 "daddiu $at, $at, -21504 # 0xAC00\n" 2493 "st.b $w0, -51($at) # 0xFFCD\n"; 2494 DriverStr(expected, "StoreFpuToOffset"); 2495} 2496 2497TEST_F(AssemblerMIPS64Test, StoreConstToOffset) { 2498 __ StoreConstToOffset(mips64::kStoreByte, 0xFF, mips64::A1, +0, mips64::T8); 2499 __ StoreConstToOffset(mips64::kStoreHalfword, 0xFFFF, mips64::A1, +0, mips64::T8); 2500 __ StoreConstToOffset(mips64::kStoreWord, 0x12345678, mips64::A1, +0, mips64::T8); 2501 __ StoreConstToOffset(mips64::kStoreDoubleword, 0x123456789ABCDEF0, mips64::A1, +0, mips64::T8); 2502 2503 __ StoreConstToOffset(mips64::kStoreByte, 0, mips64::A1, +0, mips64::T8); 2504 __ StoreConstToOffset(mips64::kStoreHalfword, 0, mips64::A1, +0, mips64::T8); 2505 __ StoreConstToOffset(mips64::kStoreWord, 0, mips64::A1, +0, mips64::T8); 2506 __ StoreConstToOffset(mips64::kStoreDoubleword, 0, mips64::A1, +0, mips64::T8); 2507 2508 __ StoreConstToOffset(mips64::kStoreDoubleword, 0x1234567812345678, mips64::A1, +0, mips64::T8); 2509 __ StoreConstToOffset(mips64::kStoreDoubleword, 0x1234567800000000, mips64::A1, +0, mips64::T8); 2510 __ StoreConstToOffset(mips64::kStoreDoubleword, 0x0000000012345678, mips64::A1, +0, mips64::T8); 2511 2512 __ StoreConstToOffset(mips64::kStoreWord, 0, mips64::T8, +0, mips64::T8); 2513 __ StoreConstToOffset(mips64::kStoreWord, 0x12345678, mips64::T8, +0, mips64::T8); 2514 2515 __ StoreConstToOffset(mips64::kStoreWord, 0, mips64::A1, -0xFFF0, mips64::T8); 2516 __ StoreConstToOffset(mips64::kStoreWord, 0x12345678, mips64::A1, +0xFFF0, mips64::T8); 2517 2518 __ StoreConstToOffset(mips64::kStoreWord, 0, mips64::T8, -0xFFF0, mips64::T8); 2519 __ StoreConstToOffset(mips64::kStoreWord, 0x12345678, mips64::T8, +0xFFF0, mips64::T8); 2520 2521 const char* expected = 2522 "ori $t8, $zero, 0xFF\n" 2523 "sb $t8, 0($a1)\n" 2524 "ori $t8, $zero, 0xFFFF\n" 2525 "sh $t8, 0($a1)\n" 2526 "lui $t8, 0x1234\n" 2527 "ori $t8, $t8,0x5678\n" 2528 "sw $t8, 0($a1)\n" 2529 "lui $t8, 0x9abc\n" 2530 "ori $t8, $t8,0xdef0\n" 2531 "dahi $t8, $t8, 0x5679\n" 2532 "dati $t8, $t8, 0x1234\n" 2533 "sd $t8, 0($a1)\n" 2534 "sb $zero, 0($a1)\n" 2535 "sh $zero, 0($a1)\n" 2536 "sw $zero, 0($a1)\n" 2537 "sd $zero, 0($a1)\n" 2538 "lui $t8, 0x1234\n" 2539 "ori $t8, $t8,0x5678\n" 2540 "dins $t8, $t8, 0x20, 0x20\n" 2541 "sd $t8, 0($a1)\n" 2542 "lui $t8, 0x246\n" 2543 "ori $t8, $t8, 0x8acf\n" 2544 "dsll32 $t8, $t8, 0x3\n" 2545 "sd $t8, 0($a1)\n" 2546 "lui $t8, 0x1234\n" 2547 "ori $t8, $t8, 0x5678\n" 2548 "sd $t8, 0($a1)\n" 2549 "sw $zero, 0($t8)\n" 2550 "lui $at,0x1234\n" 2551 "ori $at, $at, 0x5678\n" 2552 "sw $at, 0($t8)\n" 2553 "daddiu $at, $a1, -32760 # 0x8008\n" 2554 "sw $zero, -32760($at) # 0x8008\n" 2555 "daddiu $at, $a1, 32760 # 0x7FF8\n" 2556 "lui $t8, 4660 # 0x1234\n" 2557 "ori $t8, $t8, 22136 # 0x5678\n" 2558 "sw $t8, 32760($at) # 0x7FF8\n" 2559 "daddiu $at, $t8, -32760 # 0x8008\n" 2560 "sw $zero, -32760($at) # 0x8008\n" 2561 "daddiu $at, $t8, 32760 # 0x7FF8\n" 2562 "lui $t8, 4660 # 0x1234\n" 2563 "ori $t8, $t8, 22136 # 0x5678\n" 2564 "sw $t8, 32760($at) # 0x7FF8\n"; 2565 DriverStr(expected, "StoreConstToOffset"); 2566} 2567////////////////////////////// 2568// Loading/adding Constants // 2569////////////////////////////// 2570 2571TEST_F(AssemblerMIPS64Test, LoadConst32) { 2572 // IsUint<16>(value) 2573 __ LoadConst32(mips64::V0, 0); 2574 __ LoadConst32(mips64::V0, 65535); 2575 // IsInt<16>(value) 2576 __ LoadConst32(mips64::V0, -1); 2577 __ LoadConst32(mips64::V0, -32768); 2578 // Everything else 2579 __ LoadConst32(mips64::V0, 65536); 2580 __ LoadConst32(mips64::V0, 65537); 2581 __ LoadConst32(mips64::V0, 2147483647); 2582 __ LoadConst32(mips64::V0, -32769); 2583 __ LoadConst32(mips64::V0, -65536); 2584 __ LoadConst32(mips64::V0, -65537); 2585 __ LoadConst32(mips64::V0, -2147483647); 2586 __ LoadConst32(mips64::V0, -2147483648); 2587 2588 const char* expected = 2589 // IsUint<16>(value) 2590 "ori $v0, $zero, 0\n" // __ LoadConst32(mips64::V0, 0); 2591 "ori $v0, $zero, 65535\n" // __ LoadConst32(mips64::V0, 65535); 2592 // IsInt<16>(value) 2593 "addiu $v0, $zero, -1\n" // __ LoadConst32(mips64::V0, -1); 2594 "addiu $v0, $zero, -32768\n" // __ LoadConst32(mips64::V0, -32768); 2595 // Everything else 2596 "lui $v0, 1\n" // __ LoadConst32(mips64::V0, 65536); 2597 "lui $v0, 1\n" // __ LoadConst32(mips64::V0, 65537); 2598 "ori $v0, 1\n" // " 2599 "lui $v0, 32767\n" // __ LoadConst32(mips64::V0, 2147483647); 2600 "ori $v0, 65535\n" // " 2601 "lui $v0, 65535\n" // __ LoadConst32(mips64::V0, -32769); 2602 "ori $v0, 32767\n" // " 2603 "lui $v0, 65535\n" // __ LoadConst32(mips64::V0, -65536); 2604 "lui $v0, 65534\n" // __ LoadConst32(mips64::V0, -65537); 2605 "ori $v0, 65535\n" // " 2606 "lui $v0, 32768\n" // __ LoadConst32(mips64::V0, -2147483647); 2607 "ori $v0, 1\n" // " 2608 "lui $v0, 32768\n"; // __ LoadConst32(mips64::V0, -2147483648); 2609 DriverStr(expected, "LoadConst32"); 2610} 2611 2612TEST_F(AssemblerMIPS64Test, Addiu32) { 2613 __ Addiu32(mips64::A1, mips64::A2, -0x8000); 2614 __ Addiu32(mips64::A1, mips64::A2, +0); 2615 __ Addiu32(mips64::A1, mips64::A2, +0x7FFF); 2616 __ Addiu32(mips64::A1, mips64::A2, -0x8001); 2617 __ Addiu32(mips64::A1, mips64::A2, +0x8000); 2618 __ Addiu32(mips64::A1, mips64::A2, -0x10000); 2619 __ Addiu32(mips64::A1, mips64::A2, +0x10000); 2620 __ Addiu32(mips64::A1, mips64::A2, +0x12345678); 2621 2622 const char* expected = 2623 "addiu $a1, $a2, -0x8000\n" 2624 "addiu $a1, $a2, 0\n" 2625 "addiu $a1, $a2, 0x7FFF\n" 2626 "aui $a1, $a2, 0xFFFF\n" 2627 "addiu $a1, $a1, 0x7FFF\n" 2628 "aui $a1, $a2, 1\n" 2629 "addiu $a1, $a1, -0x8000\n" 2630 "aui $a1, $a2, 0xFFFF\n" 2631 "aui $a1, $a2, 1\n" 2632 "aui $a1, $a2, 0x1234\n" 2633 "addiu $a1, $a1, 0x5678\n"; 2634 DriverStr(expected, "Addiu32"); 2635} 2636 2637static uint64_t SignExtend16To64(uint16_t n) { 2638 return static_cast<int16_t>(n); 2639} 2640 2641// The art::mips64::Mips64Assembler::LoadConst64() method uses a template 2642// to minimize the number of instructions needed to load a 64-bit constant 2643// value into a register. The template calls various methods which emit 2644// MIPS machine instructions. This struct (class) uses the same template 2645// but overrides the definitions of the methods which emit MIPS instructions 2646// to use methods which simulate the operation of the corresponding MIPS 2647// instructions. After invoking LoadConst64() the target register should 2648// contain the same 64-bit value as was input to LoadConst64(). If the 2649// simulated register doesn't contain the correct value then there is probably 2650// an error in the template function. 2651struct LoadConst64Tester { 2652 LoadConst64Tester() { 2653 // Initialize all of the registers for simulation to zero. 2654 for (int r = 0; r < 32; r++) { 2655 regs_[r] = 0; 2656 } 2657 // Clear all of the path flags. 2658 loadconst64_paths_ = art::mips64::kLoadConst64PathZero; 2659 } 2660 void Addiu(mips64::GpuRegister rd, mips64::GpuRegister rs, uint16_t c) { 2661 regs_[rd] = static_cast<int32_t>(regs_[rs] + SignExtend16To64(c)); 2662 } 2663 void Daddiu(mips64::GpuRegister rd, mips64::GpuRegister rs, uint16_t c) { 2664 regs_[rd] = regs_[rs] + SignExtend16To64(c); 2665 } 2666 void Dahi(mips64::GpuRegister rd, uint16_t c) { 2667 regs_[rd] += SignExtend16To64(c) << 32; 2668 } 2669 void Dati(mips64::GpuRegister rd, uint16_t c) { 2670 regs_[rd] += SignExtend16To64(c) << 48; 2671 } 2672 void Dinsu(mips64::GpuRegister rt, mips64::GpuRegister rs, int pos, int size) { 2673 CHECK(IsUint<5>(pos - 32)) << pos; 2674 CHECK(IsUint<5>(size - 1)) << size; 2675 CHECK(IsUint<5>(pos + size - 33)) << pos << " + " << size; 2676 uint64_t src_mask = (UINT64_C(1) << size) - 1; 2677 uint64_t dsk_mask = ~(src_mask << pos); 2678 2679 regs_[rt] = (regs_[rt] & dsk_mask) | ((regs_[rs] & src_mask) << pos); 2680 } 2681 void Dsll(mips64::GpuRegister rd, mips64::GpuRegister rt, int shamt) { 2682 regs_[rd] = regs_[rt] << (shamt & 0x1f); 2683 } 2684 void Dsll32(mips64::GpuRegister rd, mips64::GpuRegister rt, int shamt) { 2685 regs_[rd] = regs_[rt] << (32 + (shamt & 0x1f)); 2686 } 2687 void Dsrl(mips64::GpuRegister rd, mips64::GpuRegister rt, int shamt) { 2688 regs_[rd] = regs_[rt] >> (shamt & 0x1f); 2689 } 2690 void Dsrl32(mips64::GpuRegister rd, mips64::GpuRegister rt, int shamt) { 2691 regs_[rd] = regs_[rt] >> (32 + (shamt & 0x1f)); 2692 } 2693 void Lui(mips64::GpuRegister rd, uint16_t c) { 2694 regs_[rd] = SignExtend16To64(c) << 16; 2695 } 2696 void Ori(mips64::GpuRegister rd, mips64::GpuRegister rs, uint16_t c) { 2697 regs_[rd] = regs_[rs] | c; 2698 } 2699 void LoadConst32(mips64::GpuRegister rd, int32_t c) { 2700 CHECK_NE(rd, 0); 2701 mips64::TemplateLoadConst32<LoadConst64Tester>(this, rd, c); 2702 CHECK_EQ(regs_[rd], static_cast<uint64_t>(c)); 2703 } 2704 void LoadConst64(mips64::GpuRegister rd, int64_t c) { 2705 CHECK_NE(rd, 0); 2706 mips64::TemplateLoadConst64<LoadConst64Tester>(this, rd, c); 2707 CHECK_EQ(regs_[rd], static_cast<uint64_t>(c)); 2708 } 2709 uint64_t regs_[32]; 2710 2711 // Getter function for loadconst64_paths_. 2712 int GetPathsCovered() { 2713 return loadconst64_paths_; 2714 } 2715 2716 void RecordLoadConst64Path(int value) { 2717 loadconst64_paths_ |= value; 2718 } 2719 2720 private: 2721 // This variable holds a bitmask to tell us which paths were taken 2722 // through the template function which loads 64-bit values. 2723 int loadconst64_paths_; 2724}; 2725 2726TEST_F(AssemblerMIPS64Test, LoadConst64) { 2727 const uint16_t imms[] = { 2728 0, 1, 2, 3, 4, 0x33, 0x66, 0x55, 0x99, 0xaa, 0xcc, 0xff, 0x5500, 0x5555, 2729 0x7ffc, 0x7ffd, 0x7ffe, 0x7fff, 0x8000, 0x8001, 0x8002, 0x8003, 0x8004, 2730 0xaaaa, 0xfffc, 0xfffd, 0xfffe, 0xffff 2731 }; 2732 unsigned d0, d1, d2, d3; 2733 LoadConst64Tester tester; 2734 2735 union { 2736 int64_t v64; 2737 uint16_t v16[4]; 2738 } u; 2739 2740 for (d3 = 0; d3 < sizeof imms / sizeof imms[0]; d3++) { 2741 u.v16[3] = imms[d3]; 2742 2743 for (d2 = 0; d2 < sizeof imms / sizeof imms[0]; d2++) { 2744 u.v16[2] = imms[d2]; 2745 2746 for (d1 = 0; d1 < sizeof imms / sizeof imms[0]; d1++) { 2747 u.v16[1] = imms[d1]; 2748 2749 for (d0 = 0; d0 < sizeof imms / sizeof imms[0]; d0++) { 2750 u.v16[0] = imms[d0]; 2751 2752 tester.LoadConst64(mips64::V0, u.v64); 2753 } 2754 } 2755 } 2756 } 2757 2758 // Verify that we tested all paths through the "load 64-bit value" 2759 // function template. 2760 EXPECT_EQ(tester.GetPathsCovered(), art::mips64::kLoadConst64PathAllPaths); 2761} 2762 2763// MSA instructions. 2764 2765TEST_F(AssemblerMIPS64Test, AndV) { 2766 DriverStr(RepeatVVV(&mips64::Mips64Assembler::AndV, "and.v ${reg1}, ${reg2}, ${reg3}"), "and.v"); 2767} 2768 2769TEST_F(AssemblerMIPS64Test, OrV) { 2770 DriverStr(RepeatVVV(&mips64::Mips64Assembler::OrV, "or.v ${reg1}, ${reg2}, ${reg3}"), "or.v"); 2771} 2772 2773TEST_F(AssemblerMIPS64Test, NorV) { 2774 DriverStr(RepeatVVV(&mips64::Mips64Assembler::NorV, "nor.v ${reg1}, ${reg2}, ${reg3}"), "nor.v"); 2775} 2776 2777TEST_F(AssemblerMIPS64Test, XorV) { 2778 DriverStr(RepeatVVV(&mips64::Mips64Assembler::XorV, "xor.v ${reg1}, ${reg2}, ${reg3}"), "xor.v"); 2779} 2780 2781TEST_F(AssemblerMIPS64Test, AddvB) { 2782 DriverStr(RepeatVVV(&mips64::Mips64Assembler::AddvB, "addv.b ${reg1}, ${reg2}, ${reg3}"), 2783 "addv.b"); 2784} 2785 2786TEST_F(AssemblerMIPS64Test, AddvH) { 2787 DriverStr(RepeatVVV(&mips64::Mips64Assembler::AddvH, "addv.h ${reg1}, ${reg2}, ${reg3}"), 2788 "addv.h"); 2789} 2790 2791TEST_F(AssemblerMIPS64Test, AddvW) { 2792 DriverStr(RepeatVVV(&mips64::Mips64Assembler::AddvW, "addv.w ${reg1}, ${reg2}, ${reg3}"), 2793 "addv.w"); 2794} 2795 2796TEST_F(AssemblerMIPS64Test, AddvD) { 2797 DriverStr(RepeatVVV(&mips64::Mips64Assembler::AddvD, "addv.d ${reg1}, ${reg2}, ${reg3}"), 2798 "addv.d"); 2799} 2800 2801TEST_F(AssemblerMIPS64Test, SubvB) { 2802 DriverStr(RepeatVVV(&mips64::Mips64Assembler::SubvB, "subv.b ${reg1}, ${reg2}, ${reg3}"), 2803 "subv.b"); 2804} 2805 2806TEST_F(AssemblerMIPS64Test, SubvH) { 2807 DriverStr(RepeatVVV(&mips64::Mips64Assembler::SubvH, "subv.h ${reg1}, ${reg2}, ${reg3}"), 2808 "subv.h"); 2809} 2810 2811TEST_F(AssemblerMIPS64Test, SubvW) { 2812 DriverStr(RepeatVVV(&mips64::Mips64Assembler::SubvW, "subv.w ${reg1}, ${reg2}, ${reg3}"), 2813 "subv.w"); 2814} 2815 2816TEST_F(AssemblerMIPS64Test, SubvD) { 2817 DriverStr(RepeatVVV(&mips64::Mips64Assembler::SubvD, "subv.d ${reg1}, ${reg2}, ${reg3}"), 2818 "subv.d"); 2819} 2820 2821TEST_F(AssemblerMIPS64Test, MulvB) { 2822 DriverStr(RepeatVVV(&mips64::Mips64Assembler::MulvB, "mulv.b ${reg1}, ${reg2}, ${reg3}"), 2823 "mulv.b"); 2824} 2825 2826TEST_F(AssemblerMIPS64Test, MulvH) { 2827 DriverStr(RepeatVVV(&mips64::Mips64Assembler::MulvH, "mulv.h ${reg1}, ${reg2}, ${reg3}"), 2828 "mulv.h"); 2829} 2830 2831TEST_F(AssemblerMIPS64Test, MulvW) { 2832 DriverStr(RepeatVVV(&mips64::Mips64Assembler::MulvW, "mulv.w ${reg1}, ${reg2}, ${reg3}"), 2833 "mulv.w"); 2834} 2835 2836TEST_F(AssemblerMIPS64Test, MulvD) { 2837 DriverStr(RepeatVVV(&mips64::Mips64Assembler::MulvD, "mulv.d ${reg1}, ${reg2}, ${reg3}"), 2838 "mulv.d"); 2839} 2840 2841TEST_F(AssemblerMIPS64Test, Div_sB) { 2842 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Div_sB, "div_s.b ${reg1}, ${reg2}, ${reg3}"), 2843 "div_s.b"); 2844} 2845 2846TEST_F(AssemblerMIPS64Test, Div_sH) { 2847 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Div_sH, "div_s.h ${reg1}, ${reg2}, ${reg3}"), 2848 "div_s.h"); 2849} 2850 2851TEST_F(AssemblerMIPS64Test, Div_sW) { 2852 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Div_sW, "div_s.w ${reg1}, ${reg2}, ${reg3}"), 2853 "div_s.w"); 2854} 2855 2856TEST_F(AssemblerMIPS64Test, Div_sD) { 2857 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Div_sD, "div_s.d ${reg1}, ${reg2}, ${reg3}"), 2858 "div_s.d"); 2859} 2860 2861TEST_F(AssemblerMIPS64Test, Div_uB) { 2862 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Div_uB, "div_u.b ${reg1}, ${reg2}, ${reg3}"), 2863 "div_u.b"); 2864} 2865 2866TEST_F(AssemblerMIPS64Test, Div_uH) { 2867 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Div_uH, "div_u.h ${reg1}, ${reg2}, ${reg3}"), 2868 "div_u.h"); 2869} 2870 2871TEST_F(AssemblerMIPS64Test, Div_uW) { 2872 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Div_uW, "div_u.w ${reg1}, ${reg2}, ${reg3}"), 2873 "div_u.w"); 2874} 2875 2876TEST_F(AssemblerMIPS64Test, Div_uD) { 2877 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Div_uD, "div_u.d ${reg1}, ${reg2}, ${reg3}"), 2878 "div_u.d"); 2879} 2880 2881TEST_F(AssemblerMIPS64Test, Mod_sB) { 2882 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Mod_sB, "mod_s.b ${reg1}, ${reg2}, ${reg3}"), 2883 "mod_s.b"); 2884} 2885 2886TEST_F(AssemblerMIPS64Test, Mod_sH) { 2887 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Mod_sH, "mod_s.h ${reg1}, ${reg2}, ${reg3}"), 2888 "mod_s.h"); 2889} 2890 2891TEST_F(AssemblerMIPS64Test, Mod_sW) { 2892 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Mod_sW, "mod_s.w ${reg1}, ${reg2}, ${reg3}"), 2893 "mod_s.w"); 2894} 2895 2896TEST_F(AssemblerMIPS64Test, Mod_sD) { 2897 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Mod_sD, "mod_s.d ${reg1}, ${reg2}, ${reg3}"), 2898 "mod_s.d"); 2899} 2900 2901TEST_F(AssemblerMIPS64Test, Mod_uB) { 2902 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Mod_uB, "mod_u.b ${reg1}, ${reg2}, ${reg3}"), 2903 "mod_u.b"); 2904} 2905 2906TEST_F(AssemblerMIPS64Test, Mod_uH) { 2907 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Mod_uH, "mod_u.h ${reg1}, ${reg2}, ${reg3}"), 2908 "mod_u.h"); 2909} 2910 2911TEST_F(AssemblerMIPS64Test, Mod_uW) { 2912 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Mod_uW, "mod_u.w ${reg1}, ${reg2}, ${reg3}"), 2913 "mod_u.w"); 2914} 2915 2916TEST_F(AssemblerMIPS64Test, Mod_uD) { 2917 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Mod_uD, "mod_u.d ${reg1}, ${reg2}, ${reg3}"), 2918 "mod_u.d"); 2919} 2920 2921TEST_F(AssemblerMIPS64Test, Add_aB) { 2922 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Add_aB, "add_a.b ${reg1}, ${reg2}, ${reg3}"), 2923 "add_a.b"); 2924} 2925 2926TEST_F(AssemblerMIPS64Test, Add_aH) { 2927 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Add_aH, "add_a.h ${reg1}, ${reg2}, ${reg3}"), 2928 "add_a.h"); 2929} 2930 2931TEST_F(AssemblerMIPS64Test, Add_aW) { 2932 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Add_aW, "add_a.w ${reg1}, ${reg2}, ${reg3}"), 2933 "add_a.w"); 2934} 2935 2936TEST_F(AssemblerMIPS64Test, Add_aD) { 2937 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Add_aD, "add_a.d ${reg1}, ${reg2}, ${reg3}"), 2938 "add_a.d"); 2939} 2940 2941TEST_F(AssemblerMIPS64Test, Ave_sB) { 2942 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Ave_sB, "ave_s.b ${reg1}, ${reg2}, ${reg3}"), 2943 "ave_s.b"); 2944} 2945 2946TEST_F(AssemblerMIPS64Test, Ave_sH) { 2947 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Ave_sH, "ave_s.h ${reg1}, ${reg2}, ${reg3}"), 2948 "ave_s.h"); 2949} 2950 2951TEST_F(AssemblerMIPS64Test, Ave_sW) { 2952 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Ave_sW, "ave_s.w ${reg1}, ${reg2}, ${reg3}"), 2953 "ave_s.w"); 2954} 2955 2956TEST_F(AssemblerMIPS64Test, Ave_sD) { 2957 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Ave_sD, "ave_s.d ${reg1}, ${reg2}, ${reg3}"), 2958 "ave_s.d"); 2959} 2960 2961TEST_F(AssemblerMIPS64Test, Ave_uB) { 2962 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Ave_uB, "ave_u.b ${reg1}, ${reg2}, ${reg3}"), 2963 "ave_u.b"); 2964} 2965 2966TEST_F(AssemblerMIPS64Test, Ave_uH) { 2967 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Ave_uH, "ave_u.h ${reg1}, ${reg2}, ${reg3}"), 2968 "ave_u.h"); 2969} 2970 2971TEST_F(AssemblerMIPS64Test, Ave_uW) { 2972 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Ave_uW, "ave_u.w ${reg1}, ${reg2}, ${reg3}"), 2973 "ave_u.w"); 2974} 2975 2976TEST_F(AssemblerMIPS64Test, Ave_uD) { 2977 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Ave_uD, "ave_u.d ${reg1}, ${reg2}, ${reg3}"), 2978 "ave_u.d"); 2979} 2980 2981TEST_F(AssemblerMIPS64Test, Aver_sB) { 2982 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Aver_sB, "aver_s.b ${reg1}, ${reg2}, ${reg3}"), 2983 "aver_s.b"); 2984} 2985 2986TEST_F(AssemblerMIPS64Test, Aver_sH) { 2987 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Aver_sH, "aver_s.h ${reg1}, ${reg2}, ${reg3}"), 2988 "aver_s.h"); 2989} 2990 2991TEST_F(AssemblerMIPS64Test, Aver_sW) { 2992 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Aver_sW, "aver_s.w ${reg1}, ${reg2}, ${reg3}"), 2993 "aver_s.w"); 2994} 2995 2996TEST_F(AssemblerMIPS64Test, Aver_sD) { 2997 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Aver_sD, "aver_s.d ${reg1}, ${reg2}, ${reg3}"), 2998 "aver_s.d"); 2999} 3000 3001TEST_F(AssemblerMIPS64Test, Aver_uB) { 3002 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Aver_uB, "aver_u.b ${reg1}, ${reg2}, ${reg3}"), 3003 "aver_u.b"); 3004} 3005 3006TEST_F(AssemblerMIPS64Test, Aver_uH) { 3007 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Aver_uH, "aver_u.h ${reg1}, ${reg2}, ${reg3}"), 3008 "aver_u.h"); 3009} 3010 3011TEST_F(AssemblerMIPS64Test, Aver_uW) { 3012 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Aver_uW, "aver_u.w ${reg1}, ${reg2}, ${reg3}"), 3013 "aver_u.w"); 3014} 3015 3016TEST_F(AssemblerMIPS64Test, Aver_uD) { 3017 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Aver_uD, "aver_u.d ${reg1}, ${reg2}, ${reg3}"), 3018 "aver_u.d"); 3019} 3020 3021TEST_F(AssemblerMIPS64Test, Max_sB) { 3022 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Max_sB, "max_s.b ${reg1}, ${reg2}, ${reg3}"), 3023 "max_s.b"); 3024} 3025 3026TEST_F(AssemblerMIPS64Test, Max_sH) { 3027 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Max_sH, "max_s.h ${reg1}, ${reg2}, ${reg3}"), 3028 "max_s.h"); 3029} 3030 3031TEST_F(AssemblerMIPS64Test, Max_sW) { 3032 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Max_sW, "max_s.w ${reg1}, ${reg2}, ${reg3}"), 3033 "max_s.w"); 3034} 3035 3036TEST_F(AssemblerMIPS64Test, Max_sD) { 3037 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Max_sD, "max_s.d ${reg1}, ${reg2}, ${reg3}"), 3038 "max_s.d"); 3039} 3040 3041TEST_F(AssemblerMIPS64Test, Max_uB) { 3042 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Max_uB, "max_u.b ${reg1}, ${reg2}, ${reg3}"), 3043 "max_u.b"); 3044} 3045 3046TEST_F(AssemblerMIPS64Test, Max_uH) { 3047 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Max_uH, "max_u.h ${reg1}, ${reg2}, ${reg3}"), 3048 "max_u.h"); 3049} 3050 3051TEST_F(AssemblerMIPS64Test, Max_uW) { 3052 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Max_uW, "max_u.w ${reg1}, ${reg2}, ${reg3}"), 3053 "max_u.w"); 3054} 3055 3056TEST_F(AssemblerMIPS64Test, Max_uD) { 3057 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Max_uD, "max_u.d ${reg1}, ${reg2}, ${reg3}"), 3058 "max_u.d"); 3059} 3060 3061TEST_F(AssemblerMIPS64Test, Min_sB) { 3062 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Min_sB, "min_s.b ${reg1}, ${reg2}, ${reg3}"), 3063 "min_s.b"); 3064} 3065 3066TEST_F(AssemblerMIPS64Test, Min_sH) { 3067 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Min_sH, "min_s.h ${reg1}, ${reg2}, ${reg3}"), 3068 "min_s.h"); 3069} 3070 3071TEST_F(AssemblerMIPS64Test, Min_sW) { 3072 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Min_sW, "min_s.w ${reg1}, ${reg2}, ${reg3}"), 3073 "min_s.w"); 3074} 3075 3076TEST_F(AssemblerMIPS64Test, Min_sD) { 3077 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Min_sD, "min_s.d ${reg1}, ${reg2}, ${reg3}"), 3078 "min_s.d"); 3079} 3080 3081TEST_F(AssemblerMIPS64Test, Min_uB) { 3082 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Min_uB, "min_u.b ${reg1}, ${reg2}, ${reg3}"), 3083 "min_u.b"); 3084} 3085 3086TEST_F(AssemblerMIPS64Test, Min_uH) { 3087 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Min_uH, "min_u.h ${reg1}, ${reg2}, ${reg3}"), 3088 "min_u.h"); 3089} 3090 3091TEST_F(AssemblerMIPS64Test, Min_uW) { 3092 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Min_uW, "min_u.w ${reg1}, ${reg2}, ${reg3}"), 3093 "min_u.w"); 3094} 3095 3096TEST_F(AssemblerMIPS64Test, Min_uD) { 3097 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Min_uD, "min_u.d ${reg1}, ${reg2}, ${reg3}"), 3098 "min_u.d"); 3099} 3100 3101TEST_F(AssemblerMIPS64Test, FaddW) { 3102 DriverStr(RepeatVVV(&mips64::Mips64Assembler::FaddW, "fadd.w ${reg1}, ${reg2}, ${reg3}"), 3103 "fadd.w"); 3104} 3105 3106TEST_F(AssemblerMIPS64Test, FaddD) { 3107 DriverStr(RepeatVVV(&mips64::Mips64Assembler::FaddD, "fadd.d ${reg1}, ${reg2}, ${reg3}"), 3108 "fadd.d"); 3109} 3110 3111TEST_F(AssemblerMIPS64Test, FsubW) { 3112 DriverStr(RepeatVVV(&mips64::Mips64Assembler::FsubW, "fsub.w ${reg1}, ${reg2}, ${reg3}"), 3113 "fsub.w"); 3114} 3115 3116TEST_F(AssemblerMIPS64Test, FsubD) { 3117 DriverStr(RepeatVVV(&mips64::Mips64Assembler::FsubD, "fsub.d ${reg1}, ${reg2}, ${reg3}"), 3118 "fsub.d"); 3119} 3120 3121TEST_F(AssemblerMIPS64Test, FmulW) { 3122 DriverStr(RepeatVVV(&mips64::Mips64Assembler::FmulW, "fmul.w ${reg1}, ${reg2}, ${reg3}"), 3123 "fmul.w"); 3124} 3125 3126TEST_F(AssemblerMIPS64Test, FmulD) { 3127 DriverStr(RepeatVVV(&mips64::Mips64Assembler::FmulD, "fmul.d ${reg1}, ${reg2}, ${reg3}"), 3128 "fmul.d"); 3129} 3130 3131TEST_F(AssemblerMIPS64Test, FdivW) { 3132 DriverStr(RepeatVVV(&mips64::Mips64Assembler::FdivW, "fdiv.w ${reg1}, ${reg2}, ${reg3}"), 3133 "fdiv.w"); 3134} 3135 3136TEST_F(AssemblerMIPS64Test, FdivD) { 3137 DriverStr(RepeatVVV(&mips64::Mips64Assembler::FdivD, "fdiv.d ${reg1}, ${reg2}, ${reg3}"), 3138 "fdiv.d"); 3139} 3140 3141TEST_F(AssemblerMIPS64Test, FmaxW) { 3142 DriverStr(RepeatVVV(&mips64::Mips64Assembler::FmaxW, "fmax.w ${reg1}, ${reg2}, ${reg3}"), 3143 "fmax.w"); 3144} 3145 3146TEST_F(AssemblerMIPS64Test, FmaxD) { 3147 DriverStr(RepeatVVV(&mips64::Mips64Assembler::FmaxD, "fmax.d ${reg1}, ${reg2}, ${reg3}"), 3148 "fmax.d"); 3149} 3150 3151TEST_F(AssemblerMIPS64Test, FminW) { 3152 DriverStr(RepeatVVV(&mips64::Mips64Assembler::FminW, "fmin.w ${reg1}, ${reg2}, ${reg3}"), 3153 "fmin.w"); 3154} 3155 3156TEST_F(AssemblerMIPS64Test, FminD) { 3157 DriverStr(RepeatVVV(&mips64::Mips64Assembler::FminD, "fmin.d ${reg1}, ${reg2}, ${reg3}"), 3158 "fmin.d"); 3159} 3160 3161TEST_F(AssemblerMIPS64Test, Ffint_sW) { 3162 DriverStr(RepeatVV(&mips64::Mips64Assembler::Ffint_sW, "ffint_s.w ${reg1}, ${reg2}"), 3163 "ffint_s.w"); 3164} 3165 3166TEST_F(AssemblerMIPS64Test, Ffint_sD) { 3167 DriverStr(RepeatVV(&mips64::Mips64Assembler::Ffint_sD, "ffint_s.d ${reg1}, ${reg2}"), 3168 "ffint_s.d"); 3169} 3170 3171TEST_F(AssemblerMIPS64Test, Ftint_sW) { 3172 DriverStr(RepeatVV(&mips64::Mips64Assembler::Ftint_sW, "ftint_s.w ${reg1}, ${reg2}"), 3173 "ftint_s.w"); 3174} 3175 3176TEST_F(AssemblerMIPS64Test, Ftint_sD) { 3177 DriverStr(RepeatVV(&mips64::Mips64Assembler::Ftint_sD, "ftint_s.d ${reg1}, ${reg2}"), 3178 "ftint_s.d"); 3179} 3180 3181TEST_F(AssemblerMIPS64Test, SllB) { 3182 DriverStr(RepeatVVV(&mips64::Mips64Assembler::SllB, "sll.b ${reg1}, ${reg2}, ${reg3}"), "sll.b"); 3183} 3184 3185TEST_F(AssemblerMIPS64Test, SllH) { 3186 DriverStr(RepeatVVV(&mips64::Mips64Assembler::SllH, "sll.h ${reg1}, ${reg2}, ${reg3}"), "sll.h"); 3187} 3188 3189TEST_F(AssemblerMIPS64Test, SllW) { 3190 DriverStr(RepeatVVV(&mips64::Mips64Assembler::SllW, "sll.w ${reg1}, ${reg2}, ${reg3}"), "sll.w"); 3191} 3192 3193TEST_F(AssemblerMIPS64Test, SllD) { 3194 DriverStr(RepeatVVV(&mips64::Mips64Assembler::SllD, "sll.d ${reg1}, ${reg2}, ${reg3}"), "sll.d"); 3195} 3196 3197TEST_F(AssemblerMIPS64Test, SraB) { 3198 DriverStr(RepeatVVV(&mips64::Mips64Assembler::SraB, "sra.b ${reg1}, ${reg2}, ${reg3}"), "sra.b"); 3199} 3200 3201TEST_F(AssemblerMIPS64Test, SraH) { 3202 DriverStr(RepeatVVV(&mips64::Mips64Assembler::SraH, "sra.h ${reg1}, ${reg2}, ${reg3}"), "sra.h"); 3203} 3204 3205TEST_F(AssemblerMIPS64Test, SraW) { 3206 DriverStr(RepeatVVV(&mips64::Mips64Assembler::SraW, "sra.w ${reg1}, ${reg2}, ${reg3}"), "sra.w"); 3207} 3208 3209TEST_F(AssemblerMIPS64Test, SraD) { 3210 DriverStr(RepeatVVV(&mips64::Mips64Assembler::SraD, "sra.d ${reg1}, ${reg2}, ${reg3}"), "sra.d"); 3211} 3212 3213TEST_F(AssemblerMIPS64Test, SrlB) { 3214 DriverStr(RepeatVVV(&mips64::Mips64Assembler::SrlB, "srl.b ${reg1}, ${reg2}, ${reg3}"), "srl.b"); 3215} 3216 3217TEST_F(AssemblerMIPS64Test, SrlH) { 3218 DriverStr(RepeatVVV(&mips64::Mips64Assembler::SrlH, "srl.h ${reg1}, ${reg2}, ${reg3}"), "srl.h"); 3219} 3220 3221TEST_F(AssemblerMIPS64Test, SrlW) { 3222 DriverStr(RepeatVVV(&mips64::Mips64Assembler::SrlW, "srl.w ${reg1}, ${reg2}, ${reg3}"), "srl.w"); 3223} 3224 3225TEST_F(AssemblerMIPS64Test, SrlD) { 3226 DriverStr(RepeatVVV(&mips64::Mips64Assembler::SrlD, "srl.d ${reg1}, ${reg2}, ${reg3}"), "srl.d"); 3227} 3228 3229TEST_F(AssemblerMIPS64Test, SlliB) { 3230 DriverStr(RepeatVVIb(&mips64::Mips64Assembler::SlliB, 3, "slli.b ${reg1}, ${reg2}, {imm}"), 3231 "slli.b"); 3232} 3233 3234TEST_F(AssemblerMIPS64Test, SlliH) { 3235 DriverStr(RepeatVVIb(&mips64::Mips64Assembler::SlliH, 4, "slli.h ${reg1}, ${reg2}, {imm}"), 3236 "slli.h"); 3237} 3238 3239TEST_F(AssemblerMIPS64Test, SlliW) { 3240 DriverStr(RepeatVVIb(&mips64::Mips64Assembler::SlliW, 5, "slli.w ${reg1}, ${reg2}, {imm}"), 3241 "slli.w"); 3242} 3243 3244TEST_F(AssemblerMIPS64Test, SlliD) { 3245 DriverStr(RepeatVVIb(&mips64::Mips64Assembler::SlliD, 6, "slli.d ${reg1}, ${reg2}, {imm}"), 3246 "slli.d"); 3247} 3248 3249TEST_F(AssemblerMIPS64Test, MoveV) { 3250 DriverStr(RepeatVV(&mips64::Mips64Assembler::MoveV, "move.v ${reg1}, ${reg2}"), "move.v"); 3251} 3252 3253TEST_F(AssemblerMIPS64Test, SplatiB) { 3254 DriverStr(RepeatVVIb(&mips64::Mips64Assembler::SplatiB, 4, "splati.b ${reg1}, ${reg2}[{imm}]"), 3255 "splati.b"); 3256} 3257 3258TEST_F(AssemblerMIPS64Test, SplatiH) { 3259 DriverStr(RepeatVVIb(&mips64::Mips64Assembler::SplatiH, 3, "splati.h ${reg1}, ${reg2}[{imm}]"), 3260 "splati.h"); 3261} 3262 3263TEST_F(AssemblerMIPS64Test, SplatiW) { 3264 DriverStr(RepeatVVIb(&mips64::Mips64Assembler::SplatiW, 2, "splati.w ${reg1}, ${reg2}[{imm}]"), 3265 "splati.w"); 3266} 3267 3268TEST_F(AssemblerMIPS64Test, SplatiD) { 3269 DriverStr(RepeatVVIb(&mips64::Mips64Assembler::SplatiD, 1, "splati.d ${reg1}, ${reg2}[{imm}]"), 3270 "splati.d"); 3271} 3272 3273TEST_F(AssemblerMIPS64Test, FillB) { 3274 DriverStr(RepeatVR(&mips64::Mips64Assembler::FillB, "fill.b ${reg1}, ${reg2}"), "fill.b"); 3275} 3276 3277TEST_F(AssemblerMIPS64Test, FillH) { 3278 DriverStr(RepeatVR(&mips64::Mips64Assembler::FillH, "fill.h ${reg1}, ${reg2}"), "fill.h"); 3279} 3280 3281TEST_F(AssemblerMIPS64Test, FillW) { 3282 DriverStr(RepeatVR(&mips64::Mips64Assembler::FillW, "fill.w ${reg1}, ${reg2}"), "fill.w"); 3283} 3284 3285TEST_F(AssemblerMIPS64Test, FillD) { 3286 DriverStr(RepeatVR(&mips64::Mips64Assembler::FillD, "fill.d ${reg1}, ${reg2}"), "fill.d"); 3287} 3288 3289TEST_F(AssemblerMIPS64Test, LdiB) { 3290 DriverStr(RepeatVIb(&mips64::Mips64Assembler::LdiB, -8, "ldi.b ${reg}, {imm}"), "ldi.b"); 3291} 3292 3293TEST_F(AssemblerMIPS64Test, LdiH) { 3294 DriverStr(RepeatVIb(&mips64::Mips64Assembler::LdiH, -10, "ldi.h ${reg}, {imm}"), "ldi.h"); 3295} 3296 3297TEST_F(AssemblerMIPS64Test, LdiW) { 3298 DriverStr(RepeatVIb(&mips64::Mips64Assembler::LdiW, -10, "ldi.w ${reg}, {imm}"), "ldi.w"); 3299} 3300 3301TEST_F(AssemblerMIPS64Test, LdiD) { 3302 DriverStr(RepeatVIb(&mips64::Mips64Assembler::LdiD, -10, "ldi.d ${reg}, {imm}"), "ldi.d"); 3303} 3304 3305TEST_F(AssemblerMIPS64Test, LdB) { 3306 DriverStr(RepeatVRIb(&mips64::Mips64Assembler::LdB, -10, "ld.b ${reg1}, {imm}(${reg2})"), "ld.b"); 3307} 3308 3309TEST_F(AssemblerMIPS64Test, LdH) { 3310 DriverStr(RepeatVRIb(&mips64::Mips64Assembler::LdH, -10, "ld.h ${reg1}, {imm}(${reg2})", 0, 2), 3311 "ld.h"); 3312} 3313 3314TEST_F(AssemblerMIPS64Test, LdW) { 3315 DriverStr(RepeatVRIb(&mips64::Mips64Assembler::LdW, -10, "ld.w ${reg1}, {imm}(${reg2})", 0, 4), 3316 "ld.w"); 3317} 3318 3319TEST_F(AssemblerMIPS64Test, LdD) { 3320 DriverStr(RepeatVRIb(&mips64::Mips64Assembler::LdD, -10, "ld.d ${reg1}, {imm}(${reg2})", 0, 8), 3321 "ld.d"); 3322} 3323 3324TEST_F(AssemblerMIPS64Test, StB) { 3325 DriverStr(RepeatVRIb(&mips64::Mips64Assembler::StB, -10, "st.b ${reg1}, {imm}(${reg2})"), "st.b"); 3326} 3327 3328TEST_F(AssemblerMIPS64Test, StH) { 3329 DriverStr(RepeatVRIb(&mips64::Mips64Assembler::StH, -10, "st.h ${reg1}, {imm}(${reg2})", 0, 2), 3330 "st.h"); 3331} 3332 3333TEST_F(AssemblerMIPS64Test, StW) { 3334 DriverStr(RepeatVRIb(&mips64::Mips64Assembler::StW, -10, "st.w ${reg1}, {imm}(${reg2})", 0, 4), 3335 "st.w"); 3336} 3337 3338TEST_F(AssemblerMIPS64Test, StD) { 3339 DriverStr(RepeatVRIb(&mips64::Mips64Assembler::StD, -10, "st.d ${reg1}, {imm}(${reg2})", 0, 8), 3340 "st.d"); 3341} 3342 3343TEST_F(AssemblerMIPS64Test, IlvrB) { 3344 DriverStr(RepeatVVV(&mips64::Mips64Assembler::IlvrB, "ilvr.b ${reg1}, ${reg2}, ${reg3}"), 3345 "ilvr.b"); 3346} 3347 3348TEST_F(AssemblerMIPS64Test, IlvrH) { 3349 DriverStr(RepeatVVV(&mips64::Mips64Assembler::IlvrH, "ilvr.h ${reg1}, ${reg2}, ${reg3}"), 3350 "ilvr.h"); 3351} 3352 3353TEST_F(AssemblerMIPS64Test, IlvrW) { 3354 DriverStr(RepeatVVV(&mips64::Mips64Assembler::IlvrW, "ilvr.w ${reg1}, ${reg2}, ${reg3}"), 3355 "ilvr.w"); 3356} 3357 3358TEST_F(AssemblerMIPS64Test, IlvrD) { 3359 DriverStr(RepeatVVV(&mips64::Mips64Assembler::IlvrD, "ilvr.d ${reg1}, ${reg2}, ${reg3}"), 3360 "ilvr.d"); 3361} 3362 3363TEST_F(AssemblerMIPS64Test, MaddvB) { 3364 DriverStr(RepeatVVV(&mips64::Mips64Assembler::MaddvB, "maddv.b ${reg1}, ${reg2}, ${reg3}"), 3365 "maddv.b"); 3366} 3367 3368TEST_F(AssemblerMIPS64Test, MaddvH) { 3369 DriverStr(RepeatVVV(&mips64::Mips64Assembler::MaddvH, "maddv.h ${reg1}, ${reg2}, ${reg3}"), 3370 "maddv.h"); 3371} 3372 3373TEST_F(AssemblerMIPS64Test, MaddvW) { 3374 DriverStr(RepeatVVV(&mips64::Mips64Assembler::MaddvW, "maddv.w ${reg1}, ${reg2}, ${reg3}"), 3375 "maddv.w"); 3376} 3377 3378TEST_F(AssemblerMIPS64Test, MaddvD) { 3379 DriverStr(RepeatVVV(&mips64::Mips64Assembler::MaddvD, "maddv.d ${reg1}, ${reg2}, ${reg3}"), 3380 "maddv.d"); 3381} 3382 3383TEST_F(AssemblerMIPS64Test, MsubvB) { 3384 DriverStr(RepeatVVV(&mips64::Mips64Assembler::MsubvB, "msubv.b ${reg1}, ${reg2}, ${reg3}"), 3385 "msubv.b"); 3386} 3387 3388TEST_F(AssemblerMIPS64Test, MsubvH) { 3389 DriverStr(RepeatVVV(&mips64::Mips64Assembler::MsubvH, "msubv.h ${reg1}, ${reg2}, ${reg3}"), 3390 "msubv.h"); 3391} 3392 3393TEST_F(AssemblerMIPS64Test, MsubvW) { 3394 DriverStr(RepeatVVV(&mips64::Mips64Assembler::MsubvW, "msubv.w ${reg1}, ${reg2}, ${reg3}"), 3395 "msubv.w"); 3396} 3397 3398TEST_F(AssemblerMIPS64Test, MsubvD) { 3399 DriverStr(RepeatVVV(&mips64::Mips64Assembler::MsubvD, "msubv.d ${reg1}, ${reg2}, ${reg3}"), 3400 "msubv.d"); 3401} 3402 3403TEST_F(AssemblerMIPS64Test, FmaddW) { 3404 DriverStr(RepeatVVV(&mips64::Mips64Assembler::FmaddW, "fmadd.w ${reg1}, ${reg2}, ${reg3}"), 3405 "fmadd.w"); 3406} 3407 3408TEST_F(AssemblerMIPS64Test, FmaddD) { 3409 DriverStr(RepeatVVV(&mips64::Mips64Assembler::FmaddD, "fmadd.d ${reg1}, ${reg2}, ${reg3}"), 3410 "fmadd.d"); 3411} 3412 3413TEST_F(AssemblerMIPS64Test, FmsubW) { 3414 DriverStr(RepeatVVV(&mips64::Mips64Assembler::FmsubW, "fmsub.w ${reg1}, ${reg2}, ${reg3}"), 3415 "fmsub.w"); 3416} 3417 3418TEST_F(AssemblerMIPS64Test, FmsubD) { 3419 DriverStr(RepeatVVV(&mips64::Mips64Assembler::FmsubD, "fmsub.d ${reg1}, ${reg2}, ${reg3}"), 3420 "fmsub.d"); 3421} 3422 3423#undef __ 3424 3425} // namespace art 3426