assembler_mips64_test.cc revision baf60b7cceb3968ae36540e2f7f92cec3805f6ed 
1/*
2 * Copyright (C) 2015 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 *      http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#include "assembler_mips64.h"
18
19#include <inttypes.h>
20#include <map>
21#include <random>
22
23#include "base/bit_utils.h"
24#include "base/stl_util.h"
25#include "utils/assembler_test.h"
26
27#define __ GetAssembler()->
28
29namespace art {
30
31struct MIPS64CpuRegisterCompare {
32  bool operator()(const mips64::GpuRegister& a, const mips64::GpuRegister& b) const {
33    return a < b;
34  }
35};
36
37class AssemblerMIPS64Test : public AssemblerTest<mips64::Mips64Assembler,
38                                                 mips64::GpuRegister,
39                                                 mips64::FpuRegister,
40                                                 uint32_t> {
41 public:
42  typedef AssemblerTest<mips64::Mips64Assembler,
43                        mips64::GpuRegister,
44                        mips64::FpuRegister,
45                        uint32_t> Base;
46
47 protected:
48  // Get the typically used name for this architecture, e.g., aarch64, x86-64, ...
49  std::string GetArchitectureString() OVERRIDE {
50    return "mips64";
51  }
52
53  std::string GetAssemblerCmdName() OVERRIDE {
54    // We assemble and link for MIPS64R6. See GetAssemblerParameters() for details.
55    return "gcc";
56  }
57
58  std::string GetAssemblerParameters() OVERRIDE {
59    // We assemble and link for MIPS64R6. The reason is that object files produced for MIPS64R6
60    // (and MIPS32R6) with the GNU assembler don't have correct final offsets in PC-relative
61    // branches in the .text section and so they require a relocation pass (there's a relocation
62    // section, .rela.text, that has the needed info to fix up the branches).
63    return " -march=mips64r6 -Wa,--no-warn -Wl,-Ttext=0 -Wl,-e0 -nostdlib";
64  }
65
66  void Pad(std::vector<uint8_t>& data) OVERRIDE {
67    // The GNU linker unconditionally pads the code segment with NOPs to a size that is a multiple
68    // of 16 and there doesn't appear to be a way to suppress this padding. Our assembler doesn't
69    // pad, so, in order for two assembler outputs to match, we need to match the padding as well.
70    // NOP is encoded as four zero bytes on MIPS.
71    size_t pad_size = RoundUp(data.size(), 16u) - data.size();
72    data.insert(data.end(), pad_size, 0);
73  }
74
75  std::string GetDisassembleParameters() OVERRIDE {
76    return " -D -bbinary -mmips:isa64r6";
77  }
78
79  void SetUpHelpers() OVERRIDE {
80    if (registers_.size() == 0) {
81      registers_.push_back(new mips64::GpuRegister(mips64::ZERO));
82      registers_.push_back(new mips64::GpuRegister(mips64::AT));
83      registers_.push_back(new mips64::GpuRegister(mips64::V0));
84      registers_.push_back(new mips64::GpuRegister(mips64::V1));
85      registers_.push_back(new mips64::GpuRegister(mips64::A0));
86      registers_.push_back(new mips64::GpuRegister(mips64::A1));
87      registers_.push_back(new mips64::GpuRegister(mips64::A2));
88      registers_.push_back(new mips64::GpuRegister(mips64::A3));
89      registers_.push_back(new mips64::GpuRegister(mips64::A4));
90      registers_.push_back(new mips64::GpuRegister(mips64::A5));
91      registers_.push_back(new mips64::GpuRegister(mips64::A6));
92      registers_.push_back(new mips64::GpuRegister(mips64::A7));
93      registers_.push_back(new mips64::GpuRegister(mips64::T0));
94      registers_.push_back(new mips64::GpuRegister(mips64::T1));
95      registers_.push_back(new mips64::GpuRegister(mips64::T2));
96      registers_.push_back(new mips64::GpuRegister(mips64::T3));
97      registers_.push_back(new mips64::GpuRegister(mips64::S0));
98      registers_.push_back(new mips64::GpuRegister(mips64::S1));
99      registers_.push_back(new mips64::GpuRegister(mips64::S2));
100      registers_.push_back(new mips64::GpuRegister(mips64::S3));
101      registers_.push_back(new mips64::GpuRegister(mips64::S4));
102      registers_.push_back(new mips64::GpuRegister(mips64::S5));
103      registers_.push_back(new mips64::GpuRegister(mips64::S6));
104      registers_.push_back(new mips64::GpuRegister(mips64::S7));
105      registers_.push_back(new mips64::GpuRegister(mips64::T8));
106      registers_.push_back(new mips64::GpuRegister(mips64::T9));
107      registers_.push_back(new mips64::GpuRegister(mips64::K0));
108      registers_.push_back(new mips64::GpuRegister(mips64::K1));
109      registers_.push_back(new mips64::GpuRegister(mips64::GP));
110      registers_.push_back(new mips64::GpuRegister(mips64::SP));
111      registers_.push_back(new mips64::GpuRegister(mips64::S8));
112      registers_.push_back(new mips64::GpuRegister(mips64::RA));
113
114      secondary_register_names_.emplace(mips64::GpuRegister(mips64::ZERO), "zero");
115      secondary_register_names_.emplace(mips64::GpuRegister(mips64::AT), "at");
116      secondary_register_names_.emplace(mips64::GpuRegister(mips64::V0), "v0");
117      secondary_register_names_.emplace(mips64::GpuRegister(mips64::V1), "v1");
118      secondary_register_names_.emplace(mips64::GpuRegister(mips64::A0), "a0");
119      secondary_register_names_.emplace(mips64::GpuRegister(mips64::A1), "a1");
120      secondary_register_names_.emplace(mips64::GpuRegister(mips64::A2), "a2");
121      secondary_register_names_.emplace(mips64::GpuRegister(mips64::A3), "a3");
122      secondary_register_names_.emplace(mips64::GpuRegister(mips64::A4), "a4");
123      secondary_register_names_.emplace(mips64::GpuRegister(mips64::A5), "a5");
124      secondary_register_names_.emplace(mips64::GpuRegister(mips64::A6), "a6");
125      secondary_register_names_.emplace(mips64::GpuRegister(mips64::A7), "a7");
126      secondary_register_names_.emplace(mips64::GpuRegister(mips64::T0), "t0");
127      secondary_register_names_.emplace(mips64::GpuRegister(mips64::T1), "t1");
128      secondary_register_names_.emplace(mips64::GpuRegister(mips64::T2), "t2");
129      secondary_register_names_.emplace(mips64::GpuRegister(mips64::T3), "t3");
130      secondary_register_names_.emplace(mips64::GpuRegister(mips64::S0), "s0");
131      secondary_register_names_.emplace(mips64::GpuRegister(mips64::S1), "s1");
132      secondary_register_names_.emplace(mips64::GpuRegister(mips64::S2), "s2");
133      secondary_register_names_.emplace(mips64::GpuRegister(mips64::S3), "s3");
134      secondary_register_names_.emplace(mips64::GpuRegister(mips64::S4), "s4");
135      secondary_register_names_.emplace(mips64::GpuRegister(mips64::S5), "s5");
136      secondary_register_names_.emplace(mips64::GpuRegister(mips64::S6), "s6");
137      secondary_register_names_.emplace(mips64::GpuRegister(mips64::S7), "s7");
138      secondary_register_names_.emplace(mips64::GpuRegister(mips64::T8), "t8");
139      secondary_register_names_.emplace(mips64::GpuRegister(mips64::T9), "t9");
140      secondary_register_names_.emplace(mips64::GpuRegister(mips64::K0), "k0");
141      secondary_register_names_.emplace(mips64::GpuRegister(mips64::K1), "k1");
142      secondary_register_names_.emplace(mips64::GpuRegister(mips64::GP), "gp");
143      secondary_register_names_.emplace(mips64::GpuRegister(mips64::SP), "sp");
144      secondary_register_names_.emplace(mips64::GpuRegister(mips64::S8), "s8");
145      secondary_register_names_.emplace(mips64::GpuRegister(mips64::RA), "ra");
146
147      fp_registers_.push_back(new mips64::FpuRegister(mips64::F0));
148      fp_registers_.push_back(new mips64::FpuRegister(mips64::F1));
149      fp_registers_.push_back(new mips64::FpuRegister(mips64::F2));
150      fp_registers_.push_back(new mips64::FpuRegister(mips64::F3));
151      fp_registers_.push_back(new mips64::FpuRegister(mips64::F4));
152      fp_registers_.push_back(new mips64::FpuRegister(mips64::F5));
153      fp_registers_.push_back(new mips64::FpuRegister(mips64::F6));
154      fp_registers_.push_back(new mips64::FpuRegister(mips64::F7));
155      fp_registers_.push_back(new mips64::FpuRegister(mips64::F8));
156      fp_registers_.push_back(new mips64::FpuRegister(mips64::F9));
157      fp_registers_.push_back(new mips64::FpuRegister(mips64::F10));
158      fp_registers_.push_back(new mips64::FpuRegister(mips64::F11));
159      fp_registers_.push_back(new mips64::FpuRegister(mips64::F12));
160      fp_registers_.push_back(new mips64::FpuRegister(mips64::F13));
161      fp_registers_.push_back(new mips64::FpuRegister(mips64::F14));
162      fp_registers_.push_back(new mips64::FpuRegister(mips64::F15));
163      fp_registers_.push_back(new mips64::FpuRegister(mips64::F16));
164      fp_registers_.push_back(new mips64::FpuRegister(mips64::F17));
165      fp_registers_.push_back(new mips64::FpuRegister(mips64::F18));
166      fp_registers_.push_back(new mips64::FpuRegister(mips64::F19));
167      fp_registers_.push_back(new mips64::FpuRegister(mips64::F20));
168      fp_registers_.push_back(new mips64::FpuRegister(mips64::F21));
169      fp_registers_.push_back(new mips64::FpuRegister(mips64::F22));
170      fp_registers_.push_back(new mips64::FpuRegister(mips64::F23));
171      fp_registers_.push_back(new mips64::FpuRegister(mips64::F24));
172      fp_registers_.push_back(new mips64::FpuRegister(mips64::F25));
173      fp_registers_.push_back(new mips64::FpuRegister(mips64::F26));
174      fp_registers_.push_back(new mips64::FpuRegister(mips64::F27));
175      fp_registers_.push_back(new mips64::FpuRegister(mips64::F28));
176      fp_registers_.push_back(new mips64::FpuRegister(mips64::F29));
177      fp_registers_.push_back(new mips64::FpuRegister(mips64::F30));
178      fp_registers_.push_back(new mips64::FpuRegister(mips64::F31));
179    }
180  }
181
182  void TearDown() OVERRIDE {
183    AssemblerTest::TearDown();
184    STLDeleteElements(&registers_);
185    STLDeleteElements(&fp_registers_);
186  }
187
188  std::vector<mips64::GpuRegister*> GetRegisters() OVERRIDE {
189    return registers_;
190  }
191
192  std::vector<mips64::FpuRegister*> GetFPRegisters() OVERRIDE {
193    return fp_registers_;
194  }
195
196  uint32_t CreateImmediate(int64_t imm_value) OVERRIDE {
197    return imm_value;
198  }
199
200  std::string GetSecondaryRegisterName(const mips64::GpuRegister& reg) OVERRIDE {
201    CHECK(secondary_register_names_.find(reg) != secondary_register_names_.end());
202    return secondary_register_names_[reg];
203  }
204
205  std::string RepeatInsn(size_t count, const std::string& insn) {
206    std::string result;
207    for (; count != 0u; --count) {
208      result += insn;
209    }
210    return result;
211  }
212
213  void BranchCondOneRegHelper(void (mips64::Mips64Assembler::*f)(mips64::GpuRegister,
214                                                                 mips64::Mips64Label*),
215                              std::string instr_name) {
216    mips64::Mips64Label label;
217    (Base::GetAssembler()->*f)(mips64::A0, &label);
218    constexpr size_t kAdduCount1 = 63;
219    for (size_t i = 0; i != kAdduCount1; ++i) {
220      __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO);
221    }
222    __ Bind(&label);
223    constexpr size_t kAdduCount2 = 64;
224    for (size_t i = 0; i != kAdduCount2; ++i) {
225      __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO);
226    }
227    (Base::GetAssembler()->*f)(mips64::A1, &label);
228
229    std::string expected =
230        ".set noreorder\n" +
231        instr_name + " $a0, 1f\n"
232        "nop\n" +
233        RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") +
234        "1:\n" +
235        RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") +
236        instr_name + " $a1, 1b\n"
237        "nop\n";
238    DriverStr(expected, instr_name);
239  }
240
241  void BranchCondTwoRegsHelper(void (mips64::Mips64Assembler::*f)(mips64::GpuRegister,
242                                                                  mips64::GpuRegister,
243                                                                  mips64::Mips64Label*),
244                               std::string instr_name) {
245    mips64::Mips64Label label;
246    (Base::GetAssembler()->*f)(mips64::A0, mips64::A1, &label);
247    constexpr size_t kAdduCount1 = 63;
248    for (size_t i = 0; i != kAdduCount1; ++i) {
249      __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO);
250    }
251    __ Bind(&label);
252    constexpr size_t kAdduCount2 = 64;
253    for (size_t i = 0; i != kAdduCount2; ++i) {
254      __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO);
255    }
256    (Base::GetAssembler()->*f)(mips64::A2, mips64::A3, &label);
257
258    std::string expected =
259        ".set noreorder\n" +
260        instr_name + " $a0, $a1, 1f\n"
261        "nop\n" +
262        RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") +
263        "1:\n" +
264        RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") +
265        instr_name + " $a2, $a3, 1b\n"
266        "nop\n";
267    DriverStr(expected, instr_name);
268  }
269
270 private:
271  std::vector<mips64::GpuRegister*> registers_;
272  std::map<mips64::GpuRegister, std::string, MIPS64CpuRegisterCompare> secondary_register_names_;
273
274  std::vector<mips64::FpuRegister*> fp_registers_;
275};
276
277
278TEST_F(AssemblerMIPS64Test, Toolchain) {
279  EXPECT_TRUE(CheckTools());
280}
281
282///////////////////
283// FP Operations //
284///////////////////
285
286TEST_F(AssemblerMIPS64Test, SqrtS) {
287  DriverStr(RepeatFF(&mips64::Mips64Assembler::SqrtS, "sqrt.s ${reg1}, ${reg2}"), "sqrt.s");
288}
289
290TEST_F(AssemblerMIPS64Test, SqrtD) {
291  DriverStr(RepeatFF(&mips64::Mips64Assembler::SqrtD, "sqrt.d ${reg1}, ${reg2}"), "sqrt.d");
292}
293
294TEST_F(AssemblerMIPS64Test, AbsS) {
295  DriverStr(RepeatFF(&mips64::Mips64Assembler::AbsS, "abs.s ${reg1}, ${reg2}"), "abs.s");
296}
297
298TEST_F(AssemblerMIPS64Test, AbsD) {
299  DriverStr(RepeatFF(&mips64::Mips64Assembler::AbsD, "abs.d ${reg1}, ${reg2}"), "abs.d");
300}
301
302TEST_F(AssemblerMIPS64Test, MovS) {
303  DriverStr(RepeatFF(&mips64::Mips64Assembler::MovS, "mov.s ${reg1}, ${reg2}"), "mov.s");
304}
305
306TEST_F(AssemblerMIPS64Test, MovD) {
307  DriverStr(RepeatFF(&mips64::Mips64Assembler::MovD, "mov.d ${reg1}, ${reg2}"), "mov.d");
308}
309
310TEST_F(AssemblerMIPS64Test, NegS) {
311  DriverStr(RepeatFF(&mips64::Mips64Assembler::NegS, "neg.s ${reg1}, ${reg2}"), "neg.s");
312}
313
314TEST_F(AssemblerMIPS64Test, NegD) {
315  DriverStr(RepeatFF(&mips64::Mips64Assembler::NegD, "neg.d ${reg1}, ${reg2}"), "neg.d");
316}
317
318TEST_F(AssemblerMIPS64Test, RoundLS) {
319  DriverStr(RepeatFF(&mips64::Mips64Assembler::RoundLS, "round.l.s ${reg1}, ${reg2}"), "round.l.s");
320}
321
322TEST_F(AssemblerMIPS64Test, RoundLD) {
323  DriverStr(RepeatFF(&mips64::Mips64Assembler::RoundLD, "round.l.d ${reg1}, ${reg2}"), "round.l.d");
324}
325
326TEST_F(AssemblerMIPS64Test, RoundWS) {
327  DriverStr(RepeatFF(&mips64::Mips64Assembler::RoundWS, "round.w.s ${reg1}, ${reg2}"), "round.w.s");
328}
329
330TEST_F(AssemblerMIPS64Test, RoundWD) {
331  DriverStr(RepeatFF(&mips64::Mips64Assembler::RoundWD, "round.w.d ${reg1}, ${reg2}"), "round.w.d");
332}
333
334TEST_F(AssemblerMIPS64Test, CeilLS) {
335  DriverStr(RepeatFF(&mips64::Mips64Assembler::CeilLS, "ceil.l.s ${reg1}, ${reg2}"), "ceil.l.s");
336}
337
338TEST_F(AssemblerMIPS64Test, CeilLD) {
339  DriverStr(RepeatFF(&mips64::Mips64Assembler::CeilLD, "ceil.l.d ${reg1}, ${reg2}"), "ceil.l.d");
340}
341
342TEST_F(AssemblerMIPS64Test, CeilWS) {
343  DriverStr(RepeatFF(&mips64::Mips64Assembler::CeilWS, "ceil.w.s ${reg1}, ${reg2}"), "ceil.w.s");
344}
345
346TEST_F(AssemblerMIPS64Test, CeilWD) {
347  DriverStr(RepeatFF(&mips64::Mips64Assembler::CeilWD, "ceil.w.d ${reg1}, ${reg2}"), "ceil.w.d");
348}
349
350TEST_F(AssemblerMIPS64Test, FloorLS) {
351  DriverStr(RepeatFF(&mips64::Mips64Assembler::FloorLS, "floor.l.s ${reg1}, ${reg2}"), "floor.l.s");
352}
353
354TEST_F(AssemblerMIPS64Test, FloorLD) {
355  DriverStr(RepeatFF(&mips64::Mips64Assembler::FloorLD, "floor.l.d ${reg1}, ${reg2}"), "floor.l.d");
356}
357
358TEST_F(AssemblerMIPS64Test, FloorWS) {
359  DriverStr(RepeatFF(&mips64::Mips64Assembler::FloorWS, "floor.w.s ${reg1}, ${reg2}"), "floor.w.s");
360}
361
362TEST_F(AssemblerMIPS64Test, FloorWD) {
363  DriverStr(RepeatFF(&mips64::Mips64Assembler::FloorWD, "floor.w.d ${reg1}, ${reg2}"), "floor.w.d");
364}
365
366TEST_F(AssemblerMIPS64Test, SelS) {
367  DriverStr(RepeatFFF(&mips64::Mips64Assembler::SelS, "sel.s ${reg1}, ${reg2}, ${reg3}"), "sel.s");
368}
369
370TEST_F(AssemblerMIPS64Test, SelD) {
371  DriverStr(RepeatFFF(&mips64::Mips64Assembler::SelD, "sel.d ${reg1}, ${reg2}, ${reg3}"), "sel.d");
372}
373
374TEST_F(AssemblerMIPS64Test, RintS) {
375  DriverStr(RepeatFF(&mips64::Mips64Assembler::RintS, "rint.s ${reg1}, ${reg2}"), "rint.s");
376}
377
378TEST_F(AssemblerMIPS64Test, RintD) {
379  DriverStr(RepeatFF(&mips64::Mips64Assembler::RintD, "rint.d ${reg1}, ${reg2}"), "rint.d");
380}
381
382TEST_F(AssemblerMIPS64Test, ClassS) {
383  DriverStr(RepeatFF(&mips64::Mips64Assembler::ClassS, "class.s ${reg1}, ${reg2}"), "class.s");
384}
385
386TEST_F(AssemblerMIPS64Test, ClassD) {
387  DriverStr(RepeatFF(&mips64::Mips64Assembler::ClassD, "class.d ${reg1}, ${reg2}"), "class.d");
388}
389
390TEST_F(AssemblerMIPS64Test, MinS) {
391  DriverStr(RepeatFFF(&mips64::Mips64Assembler::MinS, "min.s ${reg1}, ${reg2}, ${reg3}"), "min.s");
392}
393
394TEST_F(AssemblerMIPS64Test, MinD) {
395  DriverStr(RepeatFFF(&mips64::Mips64Assembler::MinD, "min.d ${reg1}, ${reg2}, ${reg3}"), "min.d");
396}
397
398TEST_F(AssemblerMIPS64Test, MaxS) {
399  DriverStr(RepeatFFF(&mips64::Mips64Assembler::MaxS, "max.s ${reg1}, ${reg2}, ${reg3}"), "max.s");
400}
401
402TEST_F(AssemblerMIPS64Test, MaxD) {
403  DriverStr(RepeatFFF(&mips64::Mips64Assembler::MaxD, "max.d ${reg1}, ${reg2}, ${reg3}"), "max.d");
404}
405
406TEST_F(AssemblerMIPS64Test, CmpUnS) {
407  DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpUnS, "cmp.un.s ${reg1}, ${reg2}, ${reg3}"),
408            "cmp.un.s");
409}
410
411TEST_F(AssemblerMIPS64Test, CmpEqS) {
412  DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpEqS, "cmp.eq.s ${reg1}, ${reg2}, ${reg3}"),
413            "cmp.eq.s");
414}
415
416TEST_F(AssemblerMIPS64Test, CmpUeqS) {
417  DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpUeqS, "cmp.ueq.s ${reg1}, ${reg2}, ${reg3}"),
418            "cmp.ueq.s");
419}
420
421TEST_F(AssemblerMIPS64Test, CmpLtS) {
422  DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpLtS, "cmp.lt.s ${reg1}, ${reg2}, ${reg3}"),
423            "cmp.lt.s");
424}
425
426TEST_F(AssemblerMIPS64Test, CmpUltS) {
427  DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpUltS, "cmp.ult.s ${reg1}, ${reg2}, ${reg3}"),
428            "cmp.ult.s");
429}
430
431TEST_F(AssemblerMIPS64Test, CmpLeS) {
432  DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpLeS, "cmp.le.s ${reg1}, ${reg2}, ${reg3}"),
433            "cmp.le.s");
434}
435
436TEST_F(AssemblerMIPS64Test, CmpUleS) {
437  DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpUleS, "cmp.ule.s ${reg1}, ${reg2}, ${reg3}"),
438            "cmp.ule.s");
439}
440
441TEST_F(AssemblerMIPS64Test, CmpOrS) {
442  DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpOrS, "cmp.or.s ${reg1}, ${reg2}, ${reg3}"),
443            "cmp.or.s");
444}
445
446TEST_F(AssemblerMIPS64Test, CmpUneS) {
447  DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpUneS, "cmp.une.s ${reg1}, ${reg2}, ${reg3}"),
448            "cmp.une.s");
449}
450
451TEST_F(AssemblerMIPS64Test, CmpNeS) {
452  DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpNeS, "cmp.ne.s ${reg1}, ${reg2}, ${reg3}"),
453            "cmp.ne.s");
454}
455
456TEST_F(AssemblerMIPS64Test, CmpUnD) {
457  DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpUnD, "cmp.un.d ${reg1}, ${reg2}, ${reg3}"),
458            "cmp.un.d");
459}
460
461TEST_F(AssemblerMIPS64Test, CmpEqD) {
462  DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpEqD, "cmp.eq.d ${reg1}, ${reg2}, ${reg3}"),
463            "cmp.eq.d");
464}
465
466TEST_F(AssemblerMIPS64Test, CmpUeqD) {
467  DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpUeqD, "cmp.ueq.d ${reg1}, ${reg2}, ${reg3}"),
468            "cmp.ueq.d");
469}
470
471TEST_F(AssemblerMIPS64Test, CmpLtD) {
472  DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpLtD, "cmp.lt.d ${reg1}, ${reg2}, ${reg3}"),
473            "cmp.lt.d");
474}
475
476TEST_F(AssemblerMIPS64Test, CmpUltD) {
477  DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpUltD, "cmp.ult.d ${reg1}, ${reg2}, ${reg3}"),
478            "cmp.ult.d");
479}
480
481TEST_F(AssemblerMIPS64Test, CmpLeD) {
482  DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpLeD, "cmp.le.d ${reg1}, ${reg2}, ${reg3}"),
483            "cmp.le.d");
484}
485
486TEST_F(AssemblerMIPS64Test, CmpUleD) {
487  DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpUleD, "cmp.ule.d ${reg1}, ${reg2}, ${reg3}"),
488            "cmp.ule.d");
489}
490
491TEST_F(AssemblerMIPS64Test, CmpOrD) {
492  DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpOrD, "cmp.or.d ${reg1}, ${reg2}, ${reg3}"),
493            "cmp.or.d");
494}
495
496TEST_F(AssemblerMIPS64Test, CmpUneD) {
497  DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpUneD, "cmp.une.d ${reg1}, ${reg2}, ${reg3}"),
498            "cmp.une.d");
499}
500
501TEST_F(AssemblerMIPS64Test, CmpNeD) {
502  DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpNeD, "cmp.ne.d ${reg1}, ${reg2}, ${reg3}"),
503            "cmp.ne.d");
504}
505
506TEST_F(AssemblerMIPS64Test, CvtDL) {
507  DriverStr(RepeatFF(&mips64::Mips64Assembler::Cvtdl, "cvt.d.l ${reg1}, ${reg2}"), "cvt.d.l");
508}
509
510TEST_F(AssemblerMIPS64Test, CvtDS) {
511  DriverStr(RepeatFF(&mips64::Mips64Assembler::Cvtds, "cvt.d.s ${reg1}, ${reg2}"), "cvt.d.s");
512}
513
514TEST_F(AssemblerMIPS64Test, CvtDW) {
515  DriverStr(RepeatFF(&mips64::Mips64Assembler::Cvtdw, "cvt.d.w ${reg1}, ${reg2}"), "cvt.d.w");
516}
517
518TEST_F(AssemblerMIPS64Test, CvtSL) {
519  DriverStr(RepeatFF(&mips64::Mips64Assembler::Cvtsl, "cvt.s.l ${reg1}, ${reg2}"), "cvt.s.l");
520}
521
522TEST_F(AssemblerMIPS64Test, CvtSD) {
523  DriverStr(RepeatFF(&mips64::Mips64Assembler::Cvtsd, "cvt.s.d ${reg1}, ${reg2}"), "cvt.s.d");
524}
525
526TEST_F(AssemblerMIPS64Test, CvtSW) {
527  DriverStr(RepeatFF(&mips64::Mips64Assembler::Cvtsw, "cvt.s.w ${reg1}, ${reg2}"), "cvt.s.w");
528}
529
530TEST_F(AssemblerMIPS64Test, TruncWS) {
531  DriverStr(RepeatFF(&mips64::Mips64Assembler::TruncWS, "trunc.w.s ${reg1}, ${reg2}"), "trunc.w.s");
532}
533
534TEST_F(AssemblerMIPS64Test, TruncWD) {
535  DriverStr(RepeatFF(&mips64::Mips64Assembler::TruncWD, "trunc.w.d ${reg1}, ${reg2}"), "trunc.w.d");
536}
537
538TEST_F(AssemblerMIPS64Test, TruncLS) {
539  DriverStr(RepeatFF(&mips64::Mips64Assembler::TruncLS, "trunc.l.s ${reg1}, ${reg2}"), "trunc.l.s");
540}
541
542TEST_F(AssemblerMIPS64Test, TruncLD) {
543  DriverStr(RepeatFF(&mips64::Mips64Assembler::TruncLD, "trunc.l.d ${reg1}, ${reg2}"), "trunc.l.d");
544}
545
546////////////////
547// CALL / JMP //
548////////////////
549
550TEST_F(AssemblerMIPS64Test, Jalr) {
551  DriverStr(".set noreorder\n" +
552            RepeatRRNoDupes(&mips64::Mips64Assembler::Jalr, "jalr ${reg1}, ${reg2}"), "jalr");
553}
554
555TEST_F(AssemblerMIPS64Test, Jialc) {
556  mips64::Mips64Label label1, label2;
557  __ Jialc(&label1, mips64::T9);
558  constexpr size_t kAdduCount1 = 63;
559  for (size_t i = 0; i != kAdduCount1; ++i) {
560    __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO);
561  }
562  __ Bind(&label1);
563  __ Jialc(&label2, mips64::T9);
564  constexpr size_t kAdduCount2 = 64;
565  for (size_t i = 0; i != kAdduCount2; ++i) {
566    __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO);
567  }
568  __ Bind(&label2);
569  __ Jialc(&label1, mips64::T9);
570
571  std::string expected =
572      ".set noreorder\n"
573      "lapc $t9, 1f\n"
574      "jialc $t9, 0\n" +
575      RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") +
576      "1:\n"
577      "lapc $t9, 2f\n"
578      "jialc $t9, 0\n" +
579      RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") +
580      "2:\n"
581      "lapc $t9, 1b\n"
582      "jialc $t9, 0\n";
583  DriverStr(expected, "Jialc");
584}
585
586TEST_F(AssemblerMIPS64Test, LongJialc) {
587  mips64::Mips64Label label1, label2;
588  __ Jialc(&label1, mips64::T9);
589  constexpr uint32_t kAdduCount1 = (1u << 18) + 1;
590  for (uint32_t i = 0; i != kAdduCount1; ++i) {
591    __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO);
592  }
593  __ Bind(&label1);
594  __ Jialc(&label2, mips64::T9);
595  constexpr uint32_t kAdduCount2 = (1u << 18) + 1;
596  for (uint32_t i = 0; i != kAdduCount2; ++i) {
597    __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO);
598  }
599  __ Bind(&label2);
600  __ Jialc(&label1, mips64::T9);
601
602  uint32_t offset_forward1 = 3 + kAdduCount1;  // 3: account for auipc, daddiu and jic.
603  offset_forward1 <<= 2;
604  offset_forward1 += (offset_forward1 & 0x8000) << 1;  // Account for sign extension in daddiu.
605
606  uint32_t offset_forward2 = 3 + kAdduCount2;  // 3: account for auipc, daddiu and jic.
607  offset_forward2 <<= 2;
608  offset_forward2 += (offset_forward2 & 0x8000) << 1;  // Account for sign extension in daddiu.
609
610  uint32_t offset_back = -(3 + kAdduCount2);  // 3: account for auipc, daddiu and jic.
611  offset_back <<= 2;
612  offset_back += (offset_back & 0x8000) << 1;  // Account for sign extension in daddiu.
613
614  std::ostringstream oss;
615  oss <<
616      ".set noreorder\n"
617      "auipc $t9, 0x" << std::hex << High16Bits(offset_forward1) << "\n"
618      "daddiu $t9, 0x" << std::hex << Low16Bits(offset_forward1) << "\n"
619      "jialc $t9, 0\n" <<
620      RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") <<
621      "1:\n"
622      "auipc $t9, 0x" << std::hex << High16Bits(offset_forward2) << "\n"
623      "daddiu $t9, 0x" << std::hex << Low16Bits(offset_forward2) << "\n"
624      "jialc $t9, 0\n" <<
625      RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") <<
626      "2:\n"
627      "auipc $t9, 0x" << std::hex << High16Bits(offset_back) << "\n"
628      "daddiu $t9, 0x" << std::hex << Low16Bits(offset_back) << "\n"
629      "jialc $t9, 0\n";
630  std::string expected = oss.str();
631  DriverStr(expected, "LongJialc");
632}
633
634TEST_F(AssemblerMIPS64Test, Bc) {
635  mips64::Mips64Label label1, label2;
636  __ Bc(&label1);
637  constexpr size_t kAdduCount1 = 63;
638  for (size_t i = 0; i != kAdduCount1; ++i) {
639    __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO);
640  }
641  __ Bind(&label1);
642  __ Bc(&label2);
643  constexpr size_t kAdduCount2 = 64;
644  for (size_t i = 0; i != kAdduCount2; ++i) {
645    __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO);
646  }
647  __ Bind(&label2);
648  __ Bc(&label1);
649
650  std::string expected =
651      ".set noreorder\n"
652      "bc 1f\n" +
653      RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") +
654      "1:\n"
655      "bc 2f\n" +
656      RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") +
657      "2:\n"
658      "bc 1b\n";
659  DriverStr(expected, "Bc");
660}
661
662TEST_F(AssemblerMIPS64Test, Beqzc) {
663  BranchCondOneRegHelper(&mips64::Mips64Assembler::Beqzc, "Beqzc");
664}
665
666TEST_F(AssemblerMIPS64Test, Bnezc) {
667  BranchCondOneRegHelper(&mips64::Mips64Assembler::Bnezc, "Bnezc");
668}
669
670TEST_F(AssemblerMIPS64Test, Bltzc) {
671  BranchCondOneRegHelper(&mips64::Mips64Assembler::Bltzc, "Bltzc");
672}
673
674TEST_F(AssemblerMIPS64Test, Bgezc) {
675  BranchCondOneRegHelper(&mips64::Mips64Assembler::Bgezc, "Bgezc");
676}
677
678TEST_F(AssemblerMIPS64Test, Blezc) {
679  BranchCondOneRegHelper(&mips64::Mips64Assembler::Blezc, "Blezc");
680}
681
682TEST_F(AssemblerMIPS64Test, Bgtzc) {
683  BranchCondOneRegHelper(&mips64::Mips64Assembler::Bgtzc, "Bgtzc");
684}
685
686TEST_F(AssemblerMIPS64Test, Beqc) {
687  BranchCondTwoRegsHelper(&mips64::Mips64Assembler::Beqc, "Beqc");
688}
689
690TEST_F(AssemblerMIPS64Test, Bnec) {
691  BranchCondTwoRegsHelper(&mips64::Mips64Assembler::Bnec, "Bnec");
692}
693
694TEST_F(AssemblerMIPS64Test, Bltc) {
695  BranchCondTwoRegsHelper(&mips64::Mips64Assembler::Bltc, "Bltc");
696}
697
698TEST_F(AssemblerMIPS64Test, Bgec) {
699  BranchCondTwoRegsHelper(&mips64::Mips64Assembler::Bgec, "Bgec");
700}
701
702TEST_F(AssemblerMIPS64Test, Bltuc) {
703  BranchCondTwoRegsHelper(&mips64::Mips64Assembler::Bltuc, "Bltuc");
704}
705
706TEST_F(AssemblerMIPS64Test, Bgeuc) {
707  BranchCondTwoRegsHelper(&mips64::Mips64Assembler::Bgeuc, "Bgeuc");
708}
709
710TEST_F(AssemblerMIPS64Test, Bc1eqz) {
711    mips64::Mips64Label label;
712    __ Bc1eqz(mips64::F0, &label);
713    constexpr size_t kAdduCount1 = 63;
714    for (size_t i = 0; i != kAdduCount1; ++i) {
715      __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO);
716    }
717    __ Bind(&label);
718    constexpr size_t kAdduCount2 = 64;
719    for (size_t i = 0; i != kAdduCount2; ++i) {
720      __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO);
721    }
722    __ Bc1eqz(mips64::F31, &label);
723
724    std::string expected =
725        ".set noreorder\n"
726        "bc1eqz $f0, 1f\n"
727        "nop\n" +
728        RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") +
729        "1:\n" +
730        RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") +
731        "bc1eqz $f31, 1b\n"
732        "nop\n";
733    DriverStr(expected, "Bc1eqz");
734}
735
736TEST_F(AssemblerMIPS64Test, Bc1nez) {
737    mips64::Mips64Label label;
738    __ Bc1nez(mips64::F0, &label);
739    constexpr size_t kAdduCount1 = 63;
740    for (size_t i = 0; i != kAdduCount1; ++i) {
741      __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO);
742    }
743    __ Bind(&label);
744    constexpr size_t kAdduCount2 = 64;
745    for (size_t i = 0; i != kAdduCount2; ++i) {
746      __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO);
747    }
748    __ Bc1nez(mips64::F31, &label);
749
750    std::string expected =
751        ".set noreorder\n"
752        "bc1nez $f0, 1f\n"
753        "nop\n" +
754        RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") +
755        "1:\n" +
756        RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") +
757        "bc1nez $f31, 1b\n"
758        "nop\n";
759    DriverStr(expected, "Bc1nez");
760}
761
762TEST_F(AssemblerMIPS64Test, LongBeqc) {
763  mips64::Mips64Label label;
764  __ Beqc(mips64::A0, mips64::A1, &label);
765  constexpr uint32_t kAdduCount1 = (1u << 15) + 1;
766  for (uint32_t i = 0; i != kAdduCount1; ++i) {
767    __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO);
768  }
769  __ Bind(&label);
770  constexpr uint32_t kAdduCount2 = (1u << 15) + 1;
771  for (uint32_t i = 0; i != kAdduCount2; ++i) {
772    __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO);
773  }
774  __ Beqc(mips64::A2, mips64::A3, &label);
775
776  uint32_t offset_forward = 2 + kAdduCount1;  // 2: account for auipc and jic.
777  offset_forward <<= 2;
778  offset_forward += (offset_forward & 0x8000) << 1;  // Account for sign extension in jic.
779
780  uint32_t offset_back = -(kAdduCount2 + 1);  // 1: account for bnec.
781  offset_back <<= 2;
782  offset_back += (offset_back & 0x8000) << 1;  // Account for sign extension in jic.
783
784  std::ostringstream oss;
785  oss <<
786      ".set noreorder\n"
787      "bnec $a0, $a1, 1f\n"
788      "auipc $at, 0x" << std::hex << High16Bits(offset_forward) << "\n"
789      "jic $at, 0x" << std::hex << Low16Bits(offset_forward) << "\n"
790      "1:\n" <<
791      RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") <<
792      "2:\n" <<
793      RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") <<
794      "bnec $a2, $a3, 3f\n"
795      "auipc $at, 0x" << std::hex << High16Bits(offset_back) << "\n"
796      "jic $at, 0x" << std::hex << Low16Bits(offset_back) << "\n"
797      "3:\n";
798  std::string expected = oss.str();
799  DriverStr(expected, "LongBeqc");
800}
801
802//////////
803// MISC //
804//////////
805
806TEST_F(AssemblerMIPS64Test, Bitswap) {
807  DriverStr(RepeatRR(&mips64::Mips64Assembler::Bitswap, "bitswap ${reg1}, ${reg2}"), "bitswap");
808}
809
810TEST_F(AssemblerMIPS64Test, Dbitswap) {
811  DriverStr(RepeatRR(&mips64::Mips64Assembler::Dbitswap, "dbitswap ${reg1}, ${reg2}"), "dbitswap");
812}
813
814TEST_F(AssemblerMIPS64Test, Seb) {
815  DriverStr(RepeatRR(&mips64::Mips64Assembler::Seb, "seb ${reg1}, ${reg2}"), "seb");
816}
817
818TEST_F(AssemblerMIPS64Test, Seh) {
819  DriverStr(RepeatRR(&mips64::Mips64Assembler::Seh, "seh ${reg1}, ${reg2}"), "seh");
820}
821
822TEST_F(AssemblerMIPS64Test, Dsbh) {
823  DriverStr(RepeatRR(&mips64::Mips64Assembler::Dsbh, "dsbh ${reg1}, ${reg2}"), "dsbh");
824}
825
826TEST_F(AssemblerMIPS64Test, Dshd) {
827  DriverStr(RepeatRR(&mips64::Mips64Assembler::Dshd, "dshd ${reg1}, ${reg2}"), "dshd");
828}
829
830TEST_F(AssemblerMIPS64Test, Wsbh) {
831  DriverStr(RepeatRR(&mips64::Mips64Assembler::Wsbh, "wsbh ${reg1}, ${reg2}"), "wsbh");
832}
833
834TEST_F(AssemblerMIPS64Test, Sll) {
835  DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Sll, 5, "sll ${reg1}, ${reg2}, {imm}"), "sll");
836}
837
838TEST_F(AssemblerMIPS64Test, Srl) {
839  DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Srl, 5, "srl ${reg1}, ${reg2}, {imm}"), "srl");
840}
841
842TEST_F(AssemblerMIPS64Test, Rotr) {
843  DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Rotr, 5, "rotr ${reg1}, ${reg2}, {imm}"), "rotr");
844}
845
846TEST_F(AssemblerMIPS64Test, Sra) {
847  DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Sra, 5, "sra ${reg1}, ${reg2}, {imm}"), "sra");
848}
849
850TEST_F(AssemblerMIPS64Test, Sllv) {
851  DriverStr(RepeatRRR(&mips64::Mips64Assembler::Sllv, "sllv ${reg1}, ${reg2}, ${reg3}"), "sllv");
852}
853
854TEST_F(AssemblerMIPS64Test, Srlv) {
855  DriverStr(RepeatRRR(&mips64::Mips64Assembler::Srlv, "srlv ${reg1}, ${reg2}, ${reg3}"), "srlv");
856}
857
858TEST_F(AssemblerMIPS64Test, Rotrv) {
859  DriverStr(RepeatRRR(&mips64::Mips64Assembler::Rotrv, "rotrv ${reg1}, ${reg2}, ${reg3}"), "rotrv");
860}
861
862TEST_F(AssemblerMIPS64Test, Srav) {
863  DriverStr(RepeatRRR(&mips64::Mips64Assembler::Srav, "srav ${reg1}, ${reg2}, ${reg3}"), "srav");
864}
865
866TEST_F(AssemblerMIPS64Test, Dsll) {
867  DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Dsll, 5, "dsll ${reg1}, ${reg2}, {imm}"), "dsll");
868}
869
870TEST_F(AssemblerMIPS64Test, Dsrl) {
871  DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Dsrl, 5, "dsrl ${reg1}, ${reg2}, {imm}"), "dsrl");
872}
873
874TEST_F(AssemblerMIPS64Test, Drotr) {
875  DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Drotr, 5, "drotr ${reg1}, ${reg2}, {imm}"),
876            "drotr");
877}
878
879TEST_F(AssemblerMIPS64Test, Dsra) {
880  DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Dsra, 5, "dsra ${reg1}, ${reg2}, {imm}"), "dsra");
881}
882
883TEST_F(AssemblerMIPS64Test, Dsll32) {
884  DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Dsll32, 5, "dsll32 ${reg1}, ${reg2}, {imm}"),
885            "dsll32");
886}
887
888TEST_F(AssemblerMIPS64Test, Dsrl32) {
889  DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Dsrl32, 5, "dsrl32 ${reg1}, ${reg2}, {imm}"),
890            "dsrl32");
891}
892
893TEST_F(AssemblerMIPS64Test, Drotr32) {
894  DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Drotr32, 5, "drotr32 ${reg1}, ${reg2}, {imm}"),
895            "drotr32");
896}
897
898TEST_F(AssemblerMIPS64Test, Dsra32) {
899  DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Dsra32, 5, "dsra32 ${reg1}, ${reg2}, {imm}"),
900            "dsra32");
901}
902
903TEST_F(AssemblerMIPS64Test, Sc) {
904  DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Sc, -9, "sc ${reg1}, {imm}(${reg2})"), "sc");
905}
906
907TEST_F(AssemblerMIPS64Test, Scd) {
908  DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Scd, -9, "scd ${reg1}, {imm}(${reg2})"), "scd");
909}
910
911TEST_F(AssemblerMIPS64Test, Ll) {
912  DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Ll, -9, "ll ${reg1}, {imm}(${reg2})"), "ll");
913}
914
915TEST_F(AssemblerMIPS64Test, Lld) {
916  DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Lld, -9, "lld ${reg1}, {imm}(${reg2})"), "lld");
917}
918
919TEST_F(AssemblerMIPS64Test, Seleqz) {
920  DriverStr(RepeatRRR(&mips64::Mips64Assembler::Seleqz, "seleqz ${reg1}, ${reg2}, ${reg3}"),
921            "seleqz");
922}
923
924TEST_F(AssemblerMIPS64Test, Selnez) {
925  DriverStr(RepeatRRR(&mips64::Mips64Assembler::Selnez, "selnez ${reg1}, ${reg2}, ${reg3}"),
926            "selnez");
927}
928
929TEST_F(AssemblerMIPS64Test, Clz) {
930  DriverStr(RepeatRR(&mips64::Mips64Assembler::Clz, "clz ${reg1}, ${reg2}"), "clz");
931}
932
933TEST_F(AssemblerMIPS64Test, Clo) {
934  DriverStr(RepeatRR(&mips64::Mips64Assembler::Clo, "clo ${reg1}, ${reg2}"), "clo");
935}
936
937TEST_F(AssemblerMIPS64Test, Dclz) {
938  DriverStr(RepeatRR(&mips64::Mips64Assembler::Dclz, "dclz ${reg1}, ${reg2}"), "dclz");
939}
940
941TEST_F(AssemblerMIPS64Test, Dclo) {
942  DriverStr(RepeatRR(&mips64::Mips64Assembler::Dclo, "dclo ${reg1}, ${reg2}"), "dclo");
943}
944
945}  // namespace art
946