1/****************************************************************************
2 ****************************************************************************
3 ***
4 ***   This header was automatically generated from a Linux kernel header
5 ***   of the same name, to make information necessary for userspace to
6 ***   call into the kernel available to libc.  It contains only constants,
7 ***   structures, and macros generated from the original header, and thus,
8 ***   contains no copyrightable information.
9 ***
10 ***   To edit the content of this header, modify the corresponding
11 ***   source file (e.g. under external/kernel-headers/original/) then
12 ***   run bionic/libc/kernel/tools/update_all.py
13 ***
14 ***   Any manual change here will be lost the next time this script will
15 ***   be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef _UAPI_TEGRA_DRM_H_
20#define _UAPI_TEGRA_DRM_H_
21#include "drm.h"
22#ifdef __cplusplus
23#endif
24#define DRM_TEGRA_GEM_CREATE_TILED (1 << 0)
25#define DRM_TEGRA_GEM_CREATE_BOTTOM_UP (1 << 1)
26struct drm_tegra_gem_create {
27  __u64 size;
28  __u32 flags;
29  __u32 handle;
30};
31struct drm_tegra_gem_mmap {
32  __u32 handle;
33  __u32 pad;
34  __u64 offset;
35};
36struct drm_tegra_syncpt_read {
37  __u32 id;
38  __u32 value;
39};
40struct drm_tegra_syncpt_incr {
41  __u32 id;
42  __u32 pad;
43};
44struct drm_tegra_syncpt_wait {
45  __u32 id;
46  __u32 thresh;
47  __u32 timeout;
48  __u32 value;
49};
50#define DRM_TEGRA_NO_TIMEOUT (0xffffffff)
51struct drm_tegra_open_channel {
52  __u32 client;
53  __u32 pad;
54  __u64 context;
55};
56struct drm_tegra_close_channel {
57  __u64 context;
58};
59struct drm_tegra_get_syncpt {
60  __u64 context;
61  __u32 index;
62  __u32 id;
63};
64struct drm_tegra_get_syncpt_base {
65  __u64 context;
66  __u32 syncpt;
67  __u32 id;
68};
69struct drm_tegra_syncpt {
70  __u32 id;
71  __u32 incrs;
72};
73struct drm_tegra_cmdbuf {
74  __u32 handle;
75  __u32 offset;
76  __u32 words;
77  __u32 pad;
78};
79struct drm_tegra_reloc {
80  struct {
81    __u32 handle;
82    __u32 offset;
83  } cmdbuf;
84  struct {
85    __u32 handle;
86    __u32 offset;
87  } target;
88  __u32 shift;
89  __u32 pad;
90};
91struct drm_tegra_waitchk {
92  __u32 handle;
93  __u32 offset;
94  __u32 syncpt;
95  __u32 thresh;
96};
97struct drm_tegra_submit {
98  __u64 context;
99  __u32 num_syncpts;
100  __u32 num_cmdbufs;
101  __u32 num_relocs;
102  __u32 num_waitchks;
103  __u32 waitchk_mask;
104  __u32 timeout;
105  __u64 syncpts;
106  __u64 cmdbufs;
107  __u64 relocs;
108  __u64 waitchks;
109  __u32 fence;
110  __u32 reserved[5];
111};
112#define DRM_TEGRA_GEM_TILING_MODE_PITCH 0
113#define DRM_TEGRA_GEM_TILING_MODE_TILED 1
114#define DRM_TEGRA_GEM_TILING_MODE_BLOCK 2
115struct drm_tegra_gem_set_tiling {
116  __u32 handle;
117  __u32 mode;
118  __u32 value;
119  __u32 pad;
120};
121struct drm_tegra_gem_get_tiling {
122  __u32 handle;
123  __u32 mode;
124  __u32 value;
125  __u32 pad;
126};
127#define DRM_TEGRA_GEM_BOTTOM_UP (1 << 0)
128#define DRM_TEGRA_GEM_FLAGS (DRM_TEGRA_GEM_BOTTOM_UP)
129struct drm_tegra_gem_set_flags {
130  __u32 handle;
131  __u32 flags;
132};
133struct drm_tegra_gem_get_flags {
134  __u32 handle;
135  __u32 flags;
136};
137#define DRM_TEGRA_GEM_CREATE 0x00
138#define DRM_TEGRA_GEM_MMAP 0x01
139#define DRM_TEGRA_SYNCPT_READ 0x02
140#define DRM_TEGRA_SYNCPT_INCR 0x03
141#define DRM_TEGRA_SYNCPT_WAIT 0x04
142#define DRM_TEGRA_OPEN_CHANNEL 0x05
143#define DRM_TEGRA_CLOSE_CHANNEL 0x06
144#define DRM_TEGRA_GET_SYNCPT 0x07
145#define DRM_TEGRA_SUBMIT 0x08
146#define DRM_TEGRA_GET_SYNCPT_BASE 0x09
147#define DRM_TEGRA_GEM_SET_TILING 0x0a
148#define DRM_TEGRA_GEM_GET_TILING 0x0b
149#define DRM_TEGRA_GEM_SET_FLAGS 0x0c
150#define DRM_TEGRA_GEM_GET_FLAGS 0x0d
151#define DRM_IOCTL_TEGRA_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_CREATE, struct drm_tegra_gem_create)
152#define DRM_IOCTL_TEGRA_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_MMAP, struct drm_tegra_gem_mmap)
153#define DRM_IOCTL_TEGRA_SYNCPT_READ DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SYNCPT_READ, struct drm_tegra_syncpt_read)
154#define DRM_IOCTL_TEGRA_SYNCPT_INCR DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SYNCPT_INCR, struct drm_tegra_syncpt_incr)
155#define DRM_IOCTL_TEGRA_SYNCPT_WAIT DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SYNCPT_WAIT, struct drm_tegra_syncpt_wait)
156#define DRM_IOCTL_TEGRA_OPEN_CHANNEL DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_OPEN_CHANNEL, struct drm_tegra_open_channel)
157#define DRM_IOCTL_TEGRA_CLOSE_CHANNEL DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_CLOSE_CHANNEL, struct drm_tegra_open_channel)
158#define DRM_IOCTL_TEGRA_GET_SYNCPT DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GET_SYNCPT, struct drm_tegra_get_syncpt)
159#define DRM_IOCTL_TEGRA_SUBMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SUBMIT, struct drm_tegra_submit)
160#define DRM_IOCTL_TEGRA_GET_SYNCPT_BASE DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GET_SYNCPT_BASE, struct drm_tegra_get_syncpt_base)
161#define DRM_IOCTL_TEGRA_GEM_SET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_SET_TILING, struct drm_tegra_gem_set_tiling)
162#define DRM_IOCTL_TEGRA_GEM_GET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_GET_TILING, struct drm_tegra_gem_get_tiling)
163#define DRM_IOCTL_TEGRA_GEM_SET_FLAGS DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_SET_FLAGS, struct drm_tegra_gem_set_flags)
164#define DRM_IOCTL_TEGRA_GEM_GET_FLAGS DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_GET_FLAGS, struct drm_tegra_gem_get_flags)
165#ifdef __cplusplus
166#endif
167#endif
168