1655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng/****************************************************************************
2655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng ****************************************************************************
3655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng ***
4655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng ***   This header was automatically generated from a Linux kernel header
5655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng ***   of the same name, to make information necessary for userspace to
6655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng ***   call into the kernel available to libc.  It contains only constants,
7655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng ***   structures, and macros generated from the original header, and thus,
8655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng ***   contains no copyrightable information.
9655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng ***
10655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng ***   To edit the content of this header, modify the corresponding
11655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng ***   source file (e.g. under external/kernel-headers/original/) then
12655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng ***   run bionic/libc/kernel/tools/update_all.py
13655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng ***
14655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng ***   Any manual change here will be lost the next time this script will
15655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng ***   be run. You've been warned!
16655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng ***
17655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng ****************************************************************************
18655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng ****************************************************************************/
19655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#ifndef _UAPI__LINUX_MDIO_H__
20655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define _UAPI__LINUX_MDIO_H__
21655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#include <linux/types.h>
22655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#include <linux/mii.h>
23655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_MMD_PMAPMD 1
24655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_MMD_WIS 2
25655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_MMD_PCS 3
26655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_MMD_PHYXS 4
27655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_MMD_DTEXS 5
28655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_MMD_TC 6
29655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_MMD_AN 7
30655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_MMD_C22EXT 29
31655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_MMD_VEND1 30
32655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_MMD_VEND2 31
33655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_CTRL1 MII_BMCR
34655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_STAT1 MII_BMSR
35655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_DEVID1 MII_PHYSID1
36655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_DEVID2 MII_PHYSID2
37655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_SPEED 4
38655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_DEVS1 5
39655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_DEVS2 6
40655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_CTRL2 7
41655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_STAT2 8
42655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_TXDIS 9
43655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_RXDET 10
44655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_EXTABLE 11
45655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PKGID1 14
46655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PKGID2 15
47655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_AN_ADVERTISE 16
48655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_AN_LPA 19
49655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PCS_EEE_ABLE 20
50655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PCS_EEE_WK_ERR 22
51655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PHYXS_LNSTAT 24
52655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_AN_EEE_ADV 60
53655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_AN_EEE_LPABLE 61
54655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_10GBT_SWAPPOL 130
55655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_10GBT_TXPWR 131
56655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_10GBT_SNR 133
57655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_10GBR_FECABLE 170
58655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PCS_10GBX_STAT1 24
59655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PCS_10GBRT_STAT1 32
60655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PCS_10GBRT_STAT2 33
61655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_AN_10GBT_CTRL 32
62655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_AN_10GBT_STAT 33
63655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_LASI_RXCTRL 0x9000
64655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_LASI_TXCTRL 0x9001
65655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_LASI_CTRL 0x9002
66655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_LASI_RXSTAT 0x9003
67655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_LASI_TXSTAT 0x9004
68655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_LASI_STAT 0x9005
69655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_CTRL1_SPEEDSELEXT (BMCR_SPEED1000 | BMCR_SPEED100)
70655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_CTRL1_SPEEDSEL (MDIO_CTRL1_SPEEDSELEXT | 0x003c)
71655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_CTRL1_FULLDPLX BMCR_FULLDPLX
72655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_CTRL1_LPOWER BMCR_PDOWN
73655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_CTRL1_RESET BMCR_RESET
74655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_CTRL1_LOOPBACK 0x0001
75655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_CTRL1_SPEED1000 BMCR_SPEED1000
76655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_CTRL1_SPEED100 BMCR_SPEED100
77655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PCS_CTRL1_LOOPBACK BMCR_LOOPBACK
78655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PHYXS_CTRL1_LOOPBACK BMCR_LOOPBACK
79655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_AN_CTRL1_RESTART BMCR_ANRESTART
80655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_AN_CTRL1_ENABLE BMCR_ANENABLE
81655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_AN_CTRL1_XNP 0x2000
82655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PCS_CTRL1_CLKSTOP_EN 0x400
83655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_CTRL1_SPEED10G (MDIO_CTRL1_SPEEDSELEXT | 0x00)
84655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_CTRL1_SPEED10P2B (MDIO_CTRL1_SPEEDSELEXT | 0x04)
85655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_STAT1_LPOWERABLE 0x0002
86655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_STAT1_LSTATUS BMSR_LSTATUS
87655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_STAT1_FAULT 0x0080
88655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_AN_STAT1_LPABLE 0x0001
89655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_AN_STAT1_ABLE BMSR_ANEGCAPABLE
90655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_AN_STAT1_RFAULT BMSR_RFAULT
91655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_AN_STAT1_COMPLETE BMSR_ANEGCOMPLETE
92655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_AN_STAT1_PAGE 0x0040
93655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_AN_STAT1_XNP 0x0080
94655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_SPEED_10G 0x0001
95655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_SPEED_2B 0x0002
96655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_SPEED_10P 0x0004
97655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_SPEED_1000 0x0010
98655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_SPEED_100 0x0020
99655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_SPEED_10 0x0040
100655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PCS_SPEED_10P2B 0x0002
101655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_DEVS_PRESENT(devad) (1 << (devad))
102655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_DEVS_PMAPMD MDIO_DEVS_PRESENT(MDIO_MMD_PMAPMD)
103655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_DEVS_WIS MDIO_DEVS_PRESENT(MDIO_MMD_WIS)
104655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_DEVS_PCS MDIO_DEVS_PRESENT(MDIO_MMD_PCS)
105655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_DEVS_PHYXS MDIO_DEVS_PRESENT(MDIO_MMD_PHYXS)
106655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_DEVS_DTEXS MDIO_DEVS_PRESENT(MDIO_MMD_DTEXS)
107655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_DEVS_TC MDIO_DEVS_PRESENT(MDIO_MMD_TC)
108655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_DEVS_AN MDIO_DEVS_PRESENT(MDIO_MMD_AN)
109655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_DEVS_C22EXT MDIO_DEVS_PRESENT(MDIO_MMD_C22EXT)
110655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_CTRL2_TYPE 0x000f
111655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_CTRL2_10GBCX4 0x0000
112655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_CTRL2_10GBEW 0x0001
113655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_CTRL2_10GBLW 0x0002
114655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_CTRL2_10GBSW 0x0003
115655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_CTRL2_10GBLX4 0x0004
116655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_CTRL2_10GBER 0x0005
117655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_CTRL2_10GBLR 0x0006
118655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_CTRL2_10GBSR 0x0007
119655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_CTRL2_10GBLRM 0x0008
120655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_CTRL2_10GBT 0x0009
121655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_CTRL2_10GBKX4 0x000a
122655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_CTRL2_10GBKR 0x000b
123655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_CTRL2_1000BT 0x000c
124655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_CTRL2_1000BKX 0x000d
125655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_CTRL2_100BTX 0x000e
126655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_CTRL2_10BT 0x000f
127655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PCS_CTRL2_TYPE 0x0003
128655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PCS_CTRL2_10GBR 0x0000
129655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PCS_CTRL2_10GBX 0x0001
130655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PCS_CTRL2_10GBW 0x0002
131655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PCS_CTRL2_10GBT 0x0003
132655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_STAT2_RXFAULT 0x0400
133655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_STAT2_TXFAULT 0x0800
134655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_STAT2_DEVPRST 0xc000
135655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_STAT2_DEVPRST_VAL 0x8000
136655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_STAT2_LBABLE 0x0001
137655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_STAT2_10GBEW 0x0002
138655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_STAT2_10GBLW 0x0004
139655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_STAT2_10GBSW 0x0008
140655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_STAT2_10GBLX4 0x0010
141655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_STAT2_10GBER 0x0020
142655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_STAT2_10GBLR 0x0040
143655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_STAT2_10GBSR 0x0080
144655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMD_STAT2_TXDISAB 0x0100
145655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_STAT2_EXTABLE 0x0200
146655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_STAT2_RXFLTABLE 0x1000
147655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_STAT2_TXFLTABLE 0x2000
148655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PCS_STAT2_10GBR 0x0001
149655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PCS_STAT2_10GBX 0x0002
150655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PCS_STAT2_10GBW 0x0004
151655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PCS_STAT2_RXFLTABLE 0x1000
152655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PCS_STAT2_TXFLTABLE 0x2000
153655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMD_TXDIS_GLOBAL 0x0001
154655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMD_TXDIS_0 0x0002
155655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMD_TXDIS_1 0x0004
156655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMD_TXDIS_2 0x0008
157655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMD_TXDIS_3 0x0010
158655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMD_RXDET_GLOBAL 0x0001
159655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMD_RXDET_0 0x0002
160655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMD_RXDET_1 0x0004
161655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMD_RXDET_2 0x0008
162655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMD_RXDET_3 0x0010
163655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_EXTABLE_10GCX4 0x0001
164655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_EXTABLE_10GBLRM 0x0002
165655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_EXTABLE_10GBT 0x0004
166655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_EXTABLE_10GBKX4 0x0008
167655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_EXTABLE_10GBKR 0x0010
168655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_EXTABLE_1000BT 0x0020
169655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_EXTABLE_1000BKX 0x0040
170655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_EXTABLE_100BTX 0x0080
171655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_EXTABLE_10BT 0x0100
172655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PHYXS_LNSTAT_SYNC0 0x0001
173655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PHYXS_LNSTAT_SYNC1 0x0002
174655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PHYXS_LNSTAT_SYNC2 0x0004
175655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PHYXS_LNSTAT_SYNC3 0x0008
176655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PHYXS_LNSTAT_ALIGN 0x1000
177655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_10GBT_SWAPPOL_ABNX 0x0001
178655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_10GBT_SWAPPOL_CDNX 0x0002
179655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_10GBT_SWAPPOL_AREV 0x0100
180655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_10GBT_SWAPPOL_BREV 0x0200
181655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_10GBT_SWAPPOL_CREV 0x0400
182655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_10GBT_SWAPPOL_DREV 0x0800
183655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_10GBT_TXPWR_SHORT 0x0001
184655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_10GBT_SNR_BIAS 0x8000
185655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_10GBT_SNR_MAX 127
186655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_10GBR_FECABLE_ABLE 0x0001
187655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_10GBR_FECABLE_ERRABLE 0x0002
188655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PCS_10GBRT_STAT1_BLKLK 0x0001
189655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PCS_10GBRT_STAT2_ERR 0x00ff
190655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PCS_10GBRT_STAT2_BER 0x3f00
191655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_AN_10GBT_CTRL_ADV10G 0x1000
192655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_AN_10GBT_STAT_LPTRR 0x0200
193655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_AN_10GBT_STAT_LPLTABLE 0x0400
194655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_AN_10GBT_STAT_LP10G 0x0800
195655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_AN_10GBT_STAT_REMOK 0x1000
196655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_AN_10GBT_STAT_LOCOK 0x2000
197655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_AN_10GBT_STAT_MS 0x4000
198655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_AN_10GBT_STAT_MSFLT 0x8000
199655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_AN_EEE_ADV_100TX 0x0002
200655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_AN_EEE_ADV_1000T 0x0004
201655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_EEE_100TX MDIO_AN_EEE_ADV_100TX
202655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_EEE_1000T MDIO_AN_EEE_ADV_1000T
203655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_EEE_10GT 0x0008
204655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_EEE_1000KX 0x0010
205655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_EEE_10GKX4 0x0020
206655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_EEE_10GKR 0x0040
207655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_LASI_RX_PHYXSLFLT 0x0001
208655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_LASI_RX_PCSLFLT 0x0008
209655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_LASI_RX_PMALFLT 0x0010
210655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_LASI_RX_OPTICPOWERFLT 0x0020
211655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_LASI_RX_WISLFLT 0x0200
212655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_LASI_TX_PHYXSLFLT 0x0001
213655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_LASI_TX_PCSLFLT 0x0008
214655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_LASI_TX_PMALFLT 0x0010
215655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_LASI_TX_LASERPOWERFLT 0x0080
216655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_LASI_TX_LASERTEMPFLT 0x0100
217655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_LASI_TX_LASERBICURRFLT 0x0200
218655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_LASI_LSALARM 0x0001
219655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_LASI_TXALARM 0x0002
220655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PMA_LASI_RXALARM 0x0004
221655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PHY_ID_C45 0x8000
222655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PHY_ID_PRTAD 0x03e0
223655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#define MDIO_PHY_ID_DEVAD 0x001f
224d7db594b8d1dab36b711bd887a9dd21675c87243Tao Bao#define MDIO_PHY_ID_C45_MASK (MDIO_PHY_ID_C45 | MDIO_PHY_ID_PRTAD | MDIO_PHY_ID_DEVAD)
225655a7c081f83b8351ed5f11a6c6accd9458293a8Ben Cheng#endif
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