1/*-
2 * Copyright (c) 2004 David Schultz <das@FreeBSD.ORG>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD: src/lib/msun/mips/fenv.c,v 1.1 2008/04/26 12:20:29 imp Exp $
27 */
28
29#include <fenv.h>
30
31#define FCSR_CAUSE_SHIFT 10
32#define FCSR_ENABLE_SHIFT 5
33#define FCSR_ENABLE_MASK (FE_ALL_EXCEPT << FCSR_ENABLE_SHIFT)
34
35#define FCSR_RMASK       0x3
36
37/*
38 * Hopefully the system ID byte is immutable, so it's valid to use
39 * this as a default environment.
40 */
41const fenv_t __fe_dfl_env = 0;
42
43int fegetenv(fenv_t* __envp) {
44  fenv_t _fcsr = 0;
45#ifdef  __mips_hard_float
46  __asm__ __volatile__("cfc1 %0,$31" : "=r" (_fcsr));
47#endif
48  *__envp = _fcsr;
49  return 0;
50}
51
52int fesetenv(const fenv_t* __envp) {
53  fenv_t _fcsr = *__envp;
54#ifdef  __mips_hard_float
55  __asm__ __volatile__("ctc1 %0,$31" : : "r" (_fcsr));
56#endif
57  return 0;
58}
59
60int feclearexcept(int __excepts) {
61  fexcept_t __fcsr;
62  fegetenv(&__fcsr);
63  __excepts &= FE_ALL_EXCEPT;
64  __fcsr &= ~(__excepts | (__excepts << FCSR_CAUSE_SHIFT));
65  fesetenv(&__fcsr);
66  return 0;
67}
68
69int fegetexceptflag(fexcept_t* __flagp, int __excepts) {
70  fexcept_t __fcsr;
71  fegetenv(&__fcsr);
72  *__flagp = __fcsr & __excepts & FE_ALL_EXCEPT;
73  return 0;
74}
75
76int fesetexceptflag(const fexcept_t* __flagp, int __excepts) {
77  fexcept_t __fcsr;
78  fegetenv(&__fcsr);
79  /* Ensure that flags are all legal */
80  __excepts &= FE_ALL_EXCEPT;
81  __fcsr &= ~__excepts;
82  __fcsr |= *__flagp & __excepts;
83  fesetenv(&__fcsr);
84  return 0;
85}
86
87int feraiseexcept(int __excepts) {
88  fexcept_t __fcsr;
89  fegetenv(&__fcsr);
90  /* Ensure that flags are all legal */
91  __excepts &= FE_ALL_EXCEPT;
92  /* Cause bit needs to be set as well for generating the exception*/
93  __fcsr |= __excepts | (__excepts << FCSR_CAUSE_SHIFT);
94  fesetenv(&__fcsr);
95  return 0;
96}
97
98int fetestexcept(int __excepts) {
99  fexcept_t __FCSR;
100  fegetenv(&__FCSR);
101  return (__FCSR & __excepts & FE_ALL_EXCEPT);
102}
103
104int fegetround(void) {
105  fenv_t _fcsr;
106  fegetenv(&_fcsr);
107  return (_fcsr & FCSR_RMASK);
108}
109
110int fesetround(int __round) {
111  fenv_t _fcsr;
112  fegetenv(&_fcsr);
113  _fcsr &= ~FCSR_RMASK;
114  _fcsr |= (__round & FCSR_RMASK);
115  fesetenv(&_fcsr);
116  return 0;
117}
118
119int feholdexcept(fenv_t* __envp) {
120  fenv_t __env;
121  fegetenv(&__env);
122  *__envp = __env;
123  __env &= ~(FE_ALL_EXCEPT | FCSR_ENABLE_MASK);
124  fesetenv(&__env);
125  return 0;
126}
127
128int feupdateenv(const fenv_t* __envp) {
129  fexcept_t __fcsr;
130  fegetenv(&__fcsr);
131  fesetenv(__envp);
132  feraiseexcept(__fcsr & FE_ALL_EXCEPT);
133  return 0;
134}
135
136int feenableexcept(int __mask) {
137  fenv_t __old_fcsr, __new_fcsr;
138  fegetenv(&__old_fcsr);
139  __new_fcsr = __old_fcsr | (__mask & FE_ALL_EXCEPT) << FCSR_ENABLE_SHIFT;
140  fesetenv(&__new_fcsr);
141  return ((__old_fcsr >> FCSR_ENABLE_SHIFT) & FE_ALL_EXCEPT);
142}
143
144int fedisableexcept(int __mask) {
145  fenv_t __old_fcsr, __new_fcsr;
146  fegetenv(&__old_fcsr);
147  __new_fcsr = __old_fcsr & ~((__mask & FE_ALL_EXCEPT) << FCSR_ENABLE_SHIFT);
148  fesetenv(&__new_fcsr);
149  return ((__old_fcsr >> FCSR_ENABLE_SHIFT) & FE_ALL_EXCEPT);
150}
151
152int fegetexcept(void) {
153  fenv_t __fcsr;
154  fegetenv(&__fcsr);
155  return ((__fcsr & FCSR_ENABLE_MASK) >> FCSR_ENABLE_SHIFT);
156}
157