1/*
2 * Copyright (C) 2015 The Android Open Source Project
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *  * Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 *  * Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in
12 *    the documentation and/or other materials provided with the
13 *    distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
18 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
19 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
22 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
25 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29#if !defined(__LP64__) && __mips_isa_rev >= 5
30#include <sys/prctl.h>
31#endif
32
33#include "linker.h"
34#include "linker_debug.h"
35#include "linker_globals.h"
36#include "linker_phdr.h"
37#include "linker_relocs.h"
38#include "linker_reloc_iterators.h"
39#include "linker_sleb128.h"
40#include "linker_soinfo.h"
41
42template bool soinfo::relocate<plain_reloc_iterator>(const VersionTracker& version_tracker,
43                                                     plain_reloc_iterator&& rel_iterator,
44                                                     const soinfo_list_t& global_group,
45                                                     const soinfo_list_t& local_group);
46
47template bool soinfo::relocate<packed_reloc_iterator<sleb128_decoder>>(
48    const VersionTracker& version_tracker,
49    packed_reloc_iterator<sleb128_decoder>&& rel_iterator,
50    const soinfo_list_t& global_group,
51    const soinfo_list_t& local_group);
52
53template <typename ElfRelIteratorT>
54bool soinfo::relocate(const VersionTracker& version_tracker,
55                      ElfRelIteratorT&& rel_iterator,
56                      const soinfo_list_t& global_group,
57                      const soinfo_list_t& local_group) {
58  for (size_t idx = 0; rel_iterator.has_next(); ++idx) {
59    const auto rel = rel_iterator.next();
60
61    if (rel == nullptr) {
62      return false;
63    }
64
65    ElfW(Word) type = ELFW(R_TYPE)(rel->r_info);
66    ElfW(Word) sym = ELFW(R_SYM)(rel->r_info);
67
68    ElfW(Addr) reloc = static_cast<ElfW(Addr)>(rel->r_offset + load_bias);
69    ElfW(Addr) sym_addr = 0;
70    const char* sym_name = nullptr;
71
72    DEBUG("Processing \"%s\" relocation at index %zd", get_realpath(), idx);
73    if (type == R_GENERIC_NONE) {
74      continue;
75    }
76
77    const ElfW(Sym)* s = nullptr;
78    soinfo* lsi = nullptr;
79
80    if (sym != 0) {
81      sym_name = get_string(symtab_[sym].st_name);
82      const version_info* vi = nullptr;
83
84      if (!lookup_version_info(version_tracker, sym, sym_name, &vi)) {
85        return false;
86      }
87
88      if (!soinfo_do_lookup(this, sym_name, vi, &lsi, global_group, local_group, &s)) {
89        return false;
90      }
91
92      if (s == nullptr) {
93        // mips does not support relocation with weak-undefined symbols
94        DL_ERR("cannot locate symbol \"%s\" referenced by \"%s\"...",
95               sym_name, get_realpath());
96        return false;
97      } else {
98        // We got a definition.
99        sym_addr = lsi->resolve_symbol_address(s);
100      }
101      count_relocation(kRelocSymbol);
102    }
103
104    switch (type) {
105      case R_MIPS_REL32:
106#if defined(__LP64__)
107        // MIPS Elf64_Rel entries contain compound relocations
108        // We only handle the R_MIPS_NONE|R_MIPS_64|R_MIPS_REL32 case
109        if (ELF64_R_TYPE2(rel->r_info) != R_MIPS_64 ||
110            ELF64_R_TYPE3(rel->r_info) != R_MIPS_NONE) {
111          DL_ERR("Unexpected compound relocation type:%d type2:%d type3:%d @ %p (%zu)",
112                 type, static_cast<unsigned>(ELF64_R_TYPE2(rel->r_info)),
113                 static_cast<unsigned>(ELF64_R_TYPE3(rel->r_info)), rel, idx);
114          return false;
115        }
116#endif
117        count_relocation(s == nullptr ? kRelocAbsolute : kRelocRelative);
118        MARK(rel->r_offset);
119        TRACE_TYPE(RELO, "RELO REL32 %08zx <- %08zx %s", static_cast<size_t>(reloc),
120                   static_cast<size_t>(sym_addr), sym_name ? sym_name : "*SECTIONHDR*");
121        if (s != nullptr) {
122          *reinterpret_cast<ElfW(Addr)*>(reloc) += sym_addr;
123        } else {
124          *reinterpret_cast<ElfW(Addr)*>(reloc) += load_bias;
125        }
126        break;
127      default:
128        DL_ERR("unknown reloc type %d @ %p (%zu)", type, rel, idx);
129        return false;
130    }
131  }
132  return true;
133}
134
135bool soinfo::mips_relocate_got(const VersionTracker& version_tracker,
136                               const soinfo_list_t& global_group,
137                               const soinfo_list_t& local_group) {
138  ElfW(Addr)** got = plt_got_;
139  if (got == nullptr) {
140    return true;
141  }
142
143  // got[0] is the address of the lazy resolver function.
144  // got[1] may be used for a GNU extension.
145  // FIXME: maybe this should be in a separate routine?
146  if ((flags_ & FLAG_LINKER) == 0) {
147    size_t g = 1;
148    // Check for the high bit to determine whether to skip got[1]
149    if (reinterpret_cast<intptr_t>(got[g]) < 0) {
150      g++;
151    }
152    // Relocate the local GOT entries.
153    for (; g < mips_local_gotno_; g++) {
154      got[g] = reinterpret_cast<ElfW(Addr)*>(reinterpret_cast<uintptr_t>(got[g]) + load_bias);
155    }
156  }
157
158  // Now for the global GOT entries...
159  got = plt_got_ + mips_local_gotno_;
160  for (ElfW(Word) sym = mips_gotsym_; sym < mips_symtabno_; sym++, got++) {
161    // This is an undefined reference... try to locate it.
162    const ElfW(Sym)* local_sym = symtab_ + sym;
163    const char* sym_name = get_string(local_sym->st_name);
164    soinfo* lsi = nullptr;
165    const ElfW(Sym)* s = nullptr;
166
167    ElfW(Word) st_visibility = (local_sym->st_other & 0x3);
168
169    if (st_visibility == STV_DEFAULT) {
170      const version_info* vi = nullptr;
171
172      if (!lookup_version_info(version_tracker, sym, sym_name, &vi)) {
173        return false;
174      }
175
176      if (!soinfo_do_lookup(this, sym_name, vi, &lsi, global_group, local_group, &s)) {
177        return false;
178      }
179    } else if (st_visibility == STV_PROTECTED) {
180      if (local_sym->st_value == 0) {
181        DL_ERR("%s: invalid symbol \"%s\" (PROTECTED/UNDEFINED) ",
182               get_realpath(), sym_name);
183        return false;
184      }
185      s = local_sym;
186      lsi = this;
187    } else {
188      DL_ERR("%s: invalid symbol \"%s\" visibility: 0x%x",
189             get_realpath(), sym_name, st_visibility);
190      return false;
191    }
192
193    if (s == nullptr) {
194      // We only allow an undefined symbol if this is a weak reference.
195      if (ELF_ST_BIND(local_sym->st_info) != STB_WEAK) {
196        DL_ERR("%s: cannot locate \"%s\"...", get_realpath(), sym_name);
197        return false;
198      }
199      *got = 0;
200    } else {
201      // FIXME: is this sufficient?
202      // For reference see NetBSD link loader
203      // http://cvsweb.netbsd.org/bsdweb.cgi/src/libexec/ld.elf_so/arch/mips/mips_reloc.c?rev=1.53&content-type=text/x-cvsweb-markup
204      *got = reinterpret_cast<ElfW(Addr)*>(lsi->resolve_symbol_address(s));
205    }
206  }
207  return true;
208}
209
210#if !defined(__LP64__)
211
212// Checks for mips32's various floating point abis.
213// (Mips64 Android has a single floating point abi and doesn't need any checks)
214
215// Linux kernel has declarations similar to the following
216//   in <linux>/arch/mips/include/asm/elf.h,
217// but that non-uapi internal header file will never be imported
218// into bionic's kernel headers.
219
220#define PT_MIPS_ABIFLAGS  0x70000003	// is .MIPS.abiflags segment
221
222struct mips_elf_abiflags_v0 {
223  uint16_t version;  // version of this structure
224  uint8_t  isa_level, isa_rev, gpr_size, cpr1_size, cpr2_size;
225  uint8_t  fp_abi;  // mips32 ABI variants for floating point
226  uint32_t isa_ext, ases, flags1, flags2;
227};
228
229// Bits of flags1:
230#define MIPS_AFL_FLAGS1_ODDSPREG 1  // Uses odd-numbered single-prec fp regs
231
232// Some values of fp_abi:        via compiler flag:
233#define MIPS_ABI_FP_ANY    0  // Not tagged or not using any ABIs affected by the differences.
234#define MIPS_ABI_FP_DOUBLE 1  // -mdouble-float
235#define MIPS_ABI_FP_XX     5  // -mfpxx
236#define MIPS_ABI_FP_64A    7  // -mips32r* -mfp64 -mno-odd-spreg
237
238#if __mips_isa_rev >= 5
239static bool mips_fre_mode_on = false;  // have set FRE=1 mode for process
240#endif
241
242bool soinfo::mips_check_and_adjust_fp_modes() {
243  mips_elf_abiflags_v0* abiflags = nullptr;
244  int mips_fpabi;
245
246  // Find soinfo's optional .MIPS.abiflags segment
247  for (size_t i = 0; i<phnum; ++i) {
248    const ElfW(Phdr)& ph = phdr[i];
249    if (ph.p_type == PT_MIPS_ABIFLAGS) {
250      if (ph.p_filesz < sizeof (mips_elf_abiflags_v0)) {
251        DL_ERR("Corrupt PT_MIPS_ABIFLAGS header found \"%s\"", get_realpath());
252        return false;
253      }
254      abiflags = reinterpret_cast<mips_elf_abiflags_v0*>(ph.p_vaddr + load_bias);
255      break;
256    }
257  }
258
259  // FP ABI-variant compatibility checks for MIPS o32 ABI
260  if (abiflags == nullptr) {
261    // Old compilers lack the new abiflags section.
262    // These compilers used -mfp32 -mdouble-float -modd-spreg defaults,
263    //   ie FP32 aka DOUBLE, using odd-numbered single-prec regs
264    mips_fpabi = MIPS_ABI_FP_DOUBLE;
265  } else {
266    mips_fpabi = abiflags->fp_abi;
267    if ( (abiflags->flags1 & MIPS_AFL_FLAGS1_ODDSPREG)
268         && (mips_fpabi == MIPS_ABI_FP_XX ||
269             mips_fpabi == MIPS_ABI_FP_64A   ) ) {
270      // Android supports fewer cases than Linux
271      DL_ERR("Unsupported odd-single-prec FloatPt reg uses in \"%s\"",
272             get_realpath());
273      return false;
274    }
275  }
276  if (!(mips_fpabi == MIPS_ABI_FP_DOUBLE ||
277#if __mips_isa_rev >= 5
278        mips_fpabi == MIPS_ABI_FP_64A    ||
279#endif
280        mips_fpabi == MIPS_ABI_FP_ANY    ||
281        mips_fpabi == MIPS_ABI_FP_XX       )) {
282    DL_ERR("Unsupported MIPS32 FloatPt ABI %d found in \"%s\"",
283           mips_fpabi, get_realpath());
284    return false;
285  }
286
287#if __mips_isa_rev >= 5
288  // Adjust process's FR Emulation mode, if needed
289  //
290  // On Mips R5 & R6, Android runs continuously in FR=1 64bit-fpreg mode.
291  // NDK mips32 apps compiled with old compilers generate FP32 code
292  //   which expects FR=0 32-bit fp registers.
293  // NDK mips32 apps compiled with newer compilers generate modeless
294  //   FPXX code which runs on both FR=0 and FR=1 modes.
295  // Android itself is compiled in FP64A which requires FR=1 mode.
296  // FP32, FPXX, and FP64A all interlink okay, without dynamic FR mode
297  //   changes during calls.  For details, see
298  //   http://dmz-portal.mips.com/wiki/MIPS_O32_ABI_-_FR0_and_FR1_Interlinking
299  // Processes containing FR32 FR=0 code are run via kernel software assist,
300  //   which maps all odd-numbered single-precision reg refs onto the
301  //   upper half of the paired even-numbered double-precision reg.
302  // FRE=1 triggers traps to the kernel's emulator on every single-precision
303  //   fp op (for both odd and even-numbered registers).
304  // Turning on FRE=1 traps is done at most once per process, simultanously
305  //   for all threads of that process, when dlopen discovers FP32 code.
306  // The kernel repacks threads' registers when FRE mode is turn on or off.
307  //   These asynchronous adjustments are wrong if any thread was executing
308  //   FPXX code using odd-numbered single-precision regs.
309  // Current Android compilers default to the -mno-oddspreg option,
310  //   and this requirement is checked by Android's dlopen.
311  //   So FRE can always be safely turned on for FP32, anytime.
312  // Deferred enhancement: Allow loading of odd-spreg FPXX modules.
313
314  if (mips_fpabi == MIPS_ABI_FP_DOUBLE && !mips_fre_mode_on) {
315    // Turn on FRE mode, which emulates mode-sensitive FR=0 code on FR=1
316    //   register files, by trapping to kernel on refs to single-precision regs
317    if (prctl(PR_SET_FP_MODE, PR_FP_MODE_FR|PR_FP_MODE_FRE)) {
318      DL_ERR("Kernel or cpu failed to set FRE mode required for running \"%s\"",
319             get_realpath());
320      return false;
321    }
322    DL_WARN("Using FRE=1 mode to run \"%s\"", get_realpath());
323    mips_fre_mode_on = true;  // Avoid future redundant mode-switch calls
324    // FRE mode is never turned back off.
325    // Deferred enhancement:
326    //   Reset FRE mode when dlclose() removes all FP32 modules
327  }
328#else
329  // Android runs continuously in FR=0 32bit-fpreg mode.
330#endif  // __mips_isa_rev
331  return true;
332}
333
334#endif  // __LP64___
335