1#
2# Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7ifeq (${ARCH}, aarch64)
8  # On ARM standard platorms, the TSP can execute from Trusted SRAM, Trusted
9  # DRAM (if available) or the TZC secured area of DRAM.
10  # Trusted SRAM is the default.
11
12  ifneq (${TRUSTED_BOARD_BOOT},0)
13    ARM_TSP_RAM_LOCATION	?=	dram
14  else
15    ARM_TSP_RAM_LOCATION	?=	tsram
16  endif
17
18  ifeq (${ARM_TSP_RAM_LOCATION}, tsram)
19    ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID
20  else ifeq (${ARM_TSP_RAM_LOCATION}, tdram)
21    ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_DRAM_ID
22  else ifeq (${ARM_TSP_RAM_LOCATION}, dram)
23    ARM_TSP_RAM_LOCATION_ID = ARM_DRAM_ID
24  else
25    $(error "Unsupported ARM_TSP_RAM_LOCATION value")
26  endif
27
28  # Process flags
29  # Process ARM_BL31_IN_DRAM flag
30  ARM_BL31_IN_DRAM		:=	0
31  $(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
32  $(eval $(call add_define,ARM_BL31_IN_DRAM))
33else
34  ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID
35endif
36
37$(eval $(call add_define,ARM_TSP_RAM_LOCATION_ID))
38
39
40# For the original power-state parameter format, the State-ID can be encoded
41# according to the recommended encoding or zero. This flag determines which
42# State-ID encoding to be parsed.
43ARM_RECOM_STATE_ID_ENC := 0
44
45# If the PSCI_EXTENDED_STATE_ID is set, then ARM_RECOM_STATE_ID_ENC need to
46# be set. Else throw a build error.
47ifeq (${PSCI_EXTENDED_STATE_ID}, 1)
48  ifeq (${ARM_RECOM_STATE_ID_ENC}, 0)
49    $(error Build option ARM_RECOM_STATE_ID_ENC needs to be set if \
50            PSCI_EXTENDED_STATE_ID is set for ARM platforms)
51  endif
52endif
53
54# Process ARM_RECOM_STATE_ID_ENC flag
55$(eval $(call assert_boolean,ARM_RECOM_STATE_ID_ENC))
56$(eval $(call add_define,ARM_RECOM_STATE_ID_ENC))
57
58# Process ARM_DISABLE_TRUSTED_WDOG flag
59# By default, Trusted Watchdog is always enabled unless SPIN_ON_BL1_EXIT is set
60ARM_DISABLE_TRUSTED_WDOG	:=	0
61ifeq (${SPIN_ON_BL1_EXIT}, 1)
62ARM_DISABLE_TRUSTED_WDOG	:=	1
63endif
64$(eval $(call assert_boolean,ARM_DISABLE_TRUSTED_WDOG))
65$(eval $(call add_define,ARM_DISABLE_TRUSTED_WDOG))
66
67# Process ARM_CONFIG_CNTACR
68ARM_CONFIG_CNTACR		:=	1
69$(eval $(call assert_boolean,ARM_CONFIG_CNTACR))
70$(eval $(call add_define,ARM_CONFIG_CNTACR))
71
72# Process ARM_BL31_IN_DRAM flag
73ARM_BL31_IN_DRAM		:=	0
74$(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
75$(eval $(call add_define,ARM_BL31_IN_DRAM))
76
77# Process ARM_PLAT_MT flag
78ARM_PLAT_MT			:=	0
79$(eval $(call assert_boolean,ARM_PLAT_MT))
80$(eval $(call add_define,ARM_PLAT_MT))
81
82# Use translation tables library v2 by default
83ARM_XLAT_TABLES_LIB_V1		:=	0
84$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1))
85$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1))
86
87# Use an implementation of SHA-256 with a smaller memory footprint but reduced
88# speed.
89$(eval $(call add_define,MBEDTLS_SHA256_SMALLER))
90
91# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images
92# in the FIP if the platform requires.
93ifneq ($(BL32_EXTRA1),)
94$(eval $(call FIP_ADD_IMG,BL32_EXTRA1,--tos-fw-extra1))
95endif
96ifneq ($(BL32_EXTRA2),)
97$(eval $(call FIP_ADD_IMG,BL32_EXTRA2,--tos-fw-extra2))
98endif
99
100# Enable PSCI_STAT_COUNT/RESIDENCY APIs on ARM platforms
101ENABLE_PSCI_STAT		:=	1
102ENABLE_PMF			:=	1
103
104# On ARM platforms, separate the code and read-only data sections to allow
105# mapping the former as executable and the latter as execute-never.
106SEPARATE_CODE_AND_RODATA	:=	1
107
108# Enable new version of image loading on ARM platforms
109LOAD_IMAGE_V2			:=	1
110
111# Use generic OID definition (tbbr_oid.h)
112USE_TBBR_DEFS			:=	1
113
114# Disable ARM Cryptocell by default
115ARM_CRYPTOCELL_INTEG		:=	0
116$(eval $(call assert_boolean,ARM_CRYPTOCELL_INTEG))
117$(eval $(call add_define,ARM_CRYPTOCELL_INTEG))
118
119PLAT_INCLUDES		+=	-Iinclude/common/tbbr				\
120				-Iinclude/plat/arm/common
121
122ifeq (${ARCH}, aarch64)
123PLAT_INCLUDES		+=	-Iinclude/plat/arm/common/aarch64
124endif
125
126PLAT_BL_COMMON_SOURCES	+=	plat/arm/common/${ARCH}/arm_helpers.S		\
127				plat/arm/common/arm_common.c
128
129ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1)
130PLAT_BL_COMMON_SOURCES	+=	lib/xlat_tables/xlat_tables_common.c		\
131				lib/xlat_tables/${ARCH}/xlat_tables.c
132else
133include lib/xlat_tables_v2/xlat_tables.mk
134
135PLAT_BL_COMMON_SOURCES	+=	${XLAT_TABLES_LIB_SRCS}
136endif
137
138BL1_SOURCES		+=	drivers/arm/sp805/sp805.c			\
139				drivers/io/io_fip.c				\
140				drivers/io/io_memmap.c				\
141				drivers/io/io_storage.c				\
142				plat/arm/common/arm_bl1_setup.c			\
143				plat/arm/common/arm_io_storage.c
144ifdef EL3_PAYLOAD_BASE
145# Need the arm_program_trusted_mailbox() function to release secondary CPUs from
146# their holding pen
147BL1_SOURCES		+=	plat/arm/common/arm_pm.c
148endif
149
150BL2_SOURCES		+=	drivers/delay_timer/delay_timer.c		\
151				drivers/delay_timer/generic_delay_timer.c	\
152				drivers/io/io_fip.c				\
153				drivers/io/io_memmap.c				\
154				drivers/io/io_storage.c				\
155				plat/arm/common/arm_bl2_setup.c			\
156				plat/arm/common/arm_io_storage.c
157ifeq (${LOAD_IMAGE_V2},1)
158# Because BL1/BL2 execute in AArch64 mode but BL32 in AArch32 we need to use
159# the AArch32 descriptors.
160ifeq (${JUNO_AARCH32_EL3_RUNTIME},1)
161BL2_SOURCES		+=	plat/arm/common/aarch32/arm_bl2_mem_params_desc.c
162else
163BL2_SOURCES		+=	plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c
164endif
165BL2_SOURCES		+=	plat/arm/common/arm_image_load.c		\
166				common/desc_image_load.c
167ifeq (${SPD},opteed)
168BL2_SOURCES		+=	lib/optee/optee_utils.c
169endif
170endif
171
172BL2U_SOURCES		+=	drivers/delay_timer/delay_timer.c		\
173				drivers/delay_timer/generic_delay_timer.c	\
174				plat/arm/common/arm_bl2u_setup.c
175
176BL31_SOURCES		+=	plat/arm/common/arm_bl31_setup.c		\
177				plat/arm/common/arm_pm.c			\
178				plat/arm/common/arm_topology.c			\
179				plat/arm/common/execution_state_switch.c	\
180				plat/common/plat_psci_common.c
181
182ifeq (${ENABLE_PMF}, 1)
183BL31_SOURCES		+=	plat/arm/common/arm_sip_svc.c			\
184				lib/pmf/pmf_smc.c
185endif
186
187ifneq (${TRUSTED_BOARD_BOOT},0)
188
189    # Include common TBB sources
190    AUTH_SOURCES	:=	drivers/auth/auth_mod.c				\
191				drivers/auth/crypto_mod.c			\
192				drivers/auth/img_parser_mod.c			\
193				drivers/auth/tbbr/tbbr_cot.c			\
194
195    PLAT_INCLUDES	+=	-Iinclude/bl1/tbbr
196
197    BL1_SOURCES		+=	${AUTH_SOURCES}					\
198				bl1/tbbr/tbbr_img_desc.c			\
199				plat/arm/common/arm_bl1_fwu.c			\
200				plat/common/tbbr/plat_tbbr.c
201
202    BL2_SOURCES		+=	${AUTH_SOURCES}					\
203				plat/common/tbbr/plat_tbbr.c
204
205    $(eval $(call FWU_FIP_ADD_IMG,NS_BL2U,--fwu))
206
207    # We expect to locate the *.mk files under the directories specified below
208ifeq (${ARM_CRYPTOCELL_INTEG},0)
209    CRYPTO_LIB_MK := drivers/auth/mbedtls/mbedtls_crypto.mk
210else
211    CRYPTO_LIB_MK := drivers/auth/cryptocell/cryptocell_crypto.mk
212endif
213    IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk
214
215    $(info Including ${CRYPTO_LIB_MK})
216    include ${CRYPTO_LIB_MK}
217
218    $(info Including ${IMG_PARSER_LIB_MK})
219    include ${IMG_PARSER_LIB_MK}
220
221endif
222