1/** @file 2CPU EIST control methods 3 4Copyright (c) 2013-2015 Intel Corporation. 5 6This program and the accompanying materials 7are licensed and made available under the terms and conditions of the BSD License 8which accompanies this distribution. The full text of the license may be found at 9http://opensource.org/licenses/bsd-license.php 10 11THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 12WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 13 14**/ 15 16DefinitionBlock ( 17 "CPU0IST.aml", 18 "SSDT", 19 0x01, 20 "SsgPmm", 21 "Cpu0Ist", 22 0x0012 23 ) 24{ 25 External (PDC0, IntObj) 26 External (CFGD, FieldUnitObj) 27 External(\_PR.CPU0, DeviceObj) 28 29 Scope(\_PR.CPU0) 30 { 31 Method(_PPC,0) 32 { 33 Return(ZERO) // Return All States Available. 34 } 35 36 Method(_PCT,0) 37 { 38 // 39 // If GV3 is supported and OSPM is capable of direct access to 40 // performance state MSR, we use MSR method 41 // 42 // 43 // PDCx[0] = Indicates whether OSPM is capable of direct access to 44 // performance state MSR. 45 // 46 If(LAnd(And(CFGD,0x0001), And(PDC0,0x0001))) 47 { 48 Return(Package() // MSR Method 49 { 50 ResourceTemplate(){Register(FFixedHW, 0, 0, 0)}, 51 ResourceTemplate(){Register(FFixedHW, 0, 0, 0)} 52 }) 53 54 } 55 56 // 57 // Otherwise, we use smi method 58 // 59 Return(Package() // SMI Method 60 { 61 ResourceTemplate(){Register(SystemIO,16,0,0xB2)}, 62 ResourceTemplate(){Register(SystemIO, 8,0,0xB3)} 63 }) 64 } 65 66 Method(_PSS,0) 67 { 68 // 69 // If OSPM is capable of direct access to performance state MSR, 70 // we report NPSS, otherwise, we report SPSS. 71 If (And(PDC0,0x0001)) 72 { 73 Return(NPSS) 74 } 75 76 Return(SPSS) 77 } 78 79 Name(SPSS,Package() 80 { 81 Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, 82 Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, 83 Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, 84 Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, 85 Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, 86 Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, 87 Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, 88 Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, 89 Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, 90 Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, 91 Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, 92 Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000} 93 }) 94 95 Name(NPSS,Package() 96 { 97 Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, 98 Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, 99 Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, 100 Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, 101 Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, 102 Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, 103 Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, 104 Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, 105 Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, 106 Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, 107 Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, 108 Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000} 109 }) 110 111 Method(_PSD,0) 112 { 113 // 114 // If CMP is suppored, we report the dependency with two processors 115 // 116 If(And(CFGD,0x1000000)) 117 { 118 // 119 // If OSPM is capable of hardware coordination of P-states, we report 120 // the dependency with hardware coordination. 121 // 122 // PDCx[11] = Indicates whether OSPM is capable of hardware coordination of P-states 123 // 124 If(And(PDC0,0x0800)) 125 { 126 Return(Package(){ 127 Package(){ 128 5, // # entries. 129 0, // Revision. 130 0, // Domain #. 131 0xFE, // Coord Type- HW_ALL. 132 2 // # processors. 133 } 134 }) 135 } 136 137 // 138 // Otherwise, the dependency with OSPM coordination 139 // 140 Return(Package(){ 141 Package(){ 142 5, // # entries. 143 0, // Revision. 144 0, // Domain #. 145 0xFC, // Coord Type- SW_ALL. 146 2 // # processors. 147 } 148 }) 149 } 150 151 // 152 // Otherwise, we report the dependency with one processor 153 // 154 Return(Package(){ 155 Package(){ 156 5, // # entries. 157 0, // Revision. 158 0, // Domain #. 159 0xFC, // Coord Type- SW_ALL. 160 1 // # processors. 161 } 162 }) 163 } 164 } 165} 166