1//=- llvm/CodeGen/AntiDepBreaker.h - Anti-Dependence Breaking -*- C++ -*-=//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements the AntiDepBreaker class, which implements
11// anti-dependence breaking heuristics for post-register-allocation scheduling.
12//
13//===----------------------------------------------------------------------===//
14
15#ifndef LLVM_LIB_CODEGEN_ANTIDEPBREAKER_H
16#define LLVM_LIB_CODEGEN_ANTIDEPBREAKER_H
17
18#include "llvm/CodeGen/MachineBasicBlock.h"
19#include "llvm/CodeGen/MachineFrameInfo.h"
20#include "llvm/CodeGen/MachineFunction.h"
21#include "llvm/CodeGen/MachineRegisterInfo.h"
22#include "llvm/CodeGen/ScheduleDAG.h"
23#include "llvm/Target/TargetRegisterInfo.h"
24#include <vector>
25
26namespace llvm {
27
28/// This class works in conjunction with the post-RA scheduler to rename
29/// registers to break register anti-dependencies (WAR hazards).
30class LLVM_LIBRARY_VISIBILITY AntiDepBreaker {
31public:
32  typedef std::vector<std::pair<MachineInstr *, MachineInstr *> >
33    DbgValueVector;
34
35  virtual ~AntiDepBreaker();
36
37  /// Initialize anti-dep breaking for a new basic block.
38  virtual void StartBlock(MachineBasicBlock *BB) =0;
39
40  /// Identifiy anti-dependencies within a basic-block region and break them by
41  /// renaming registers. Return the number of anti-dependencies broken.
42  virtual unsigned BreakAntiDependencies(const std::vector<SUnit>& SUnits,
43                                         MachineBasicBlock::iterator Begin,
44                                         MachineBasicBlock::iterator End,
45                                         unsigned InsertPosIndex,
46                                         DbgValueVector &DbgValues) = 0;
47
48  /// Update liveness information to account for the current
49  /// instruction, which will not be scheduled.
50  virtual void Observe(MachineInstr &MI, unsigned Count,
51                       unsigned InsertPosIndex) = 0;
52
53  /// Finish anti-dep breaking for a basic block.
54  virtual void FinishBlock() =0;
55
56  /// Update DBG_VALUE if dependency breaker is updating
57  /// other machine instruction to use NewReg.
58  void UpdateDbgValue(MachineInstr &MI, unsigned OldReg, unsigned NewReg) {
59    assert(MI.isDebugValue() && "MI is not DBG_VALUE!");
60    if (MI.getOperand(0).isReg() && MI.getOperand(0).getReg() == OldReg)
61      MI.getOperand(0).setReg(NewReg);
62  }
63};
64
65}
66
67#endif
68