1//===- llvm/CodeGen/GlobalISel/RegisterBank.cpp - Register Bank --*- C++ -*-==//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9/// \file
10/// This file implements the RegisterBank class.
11//===----------------------------------------------------------------------===//
12
13#include "llvm/CodeGen/GlobalISel/RegisterBank.h"
14#include "llvm/Target/TargetRegisterInfo.h"
15
16#define DEBUG_TYPE "registerbank"
17
18using namespace llvm;
19
20const unsigned RegisterBank::InvalidID = UINT_MAX;
21
22RegisterBank::RegisterBank() : ID(InvalidID), Name(nullptr), Size(0) {}
23
24bool RegisterBank::verify(const TargetRegisterInfo &TRI) const {
25  assert(isValid() && "Invalid register bank");
26  assert(ContainedRegClasses.size() == TRI.getNumRegClasses() &&
27         "TRI does not match the initialization process?");
28  for (unsigned RCId = 0, End = TRI.getNumRegClasses(); RCId != End; ++RCId) {
29    const TargetRegisterClass &RC = *TRI.getRegClass(RCId);
30
31    if (!covers(RC))
32      continue;
33    // Verify that the register bank covers all the sub classes of the
34    // classes it covers.
35
36    // Use a different (slow in that case) method than
37    // RegisterBankInfo to find the subclasses of RC, to make sure
38    // both agree on the covers.
39    for (unsigned SubRCId = 0; SubRCId != End; ++SubRCId) {
40      const TargetRegisterClass &SubRC = *TRI.getRegClass(RCId);
41
42      if (!RC.hasSubClassEq(&SubRC))
43        continue;
44
45      // Verify that the Size of the register bank is big enough to cover
46      // all the register classes it covers.
47      assert((getSize() >= SubRC.getSize() * 8) &&
48             "Size is not big enough for all the subclasses!");
49      assert(covers(SubRC) && "Not all subclasses are covered");
50    }
51  }
52  return true;
53}
54
55bool RegisterBank::covers(const TargetRegisterClass &RC) const {
56  assert(isValid() && "RB hasn't been initialized yet");
57  return ContainedRegClasses.test(RC.getID());
58}
59
60bool RegisterBank::isValid() const {
61  return ID != InvalidID && Name != nullptr && Size != 0 &&
62         // A register bank that does not cover anything is useless.
63         !ContainedRegClasses.empty();
64}
65
66bool RegisterBank::operator==(const RegisterBank &OtherRB) const {
67  // There must be only one instance of a given register bank alive
68  // for the whole compilation.
69  // The RegisterBankInfo is supposed to enforce that.
70  assert((OtherRB.getID() != getID() || &OtherRB == this) &&
71         "ID does not uniquely identify a RegisterBank");
72  return &OtherRB == this;
73}
74
75void RegisterBank::dump(const TargetRegisterInfo *TRI) const {
76  print(dbgs(), /* IsForDebug */ true, TRI);
77}
78
79void RegisterBank::print(raw_ostream &OS, bool IsForDebug,
80                         const TargetRegisterInfo *TRI) const {
81  OS << getName();
82  if (!IsForDebug)
83    return;
84  OS << "(ID:" << getID() << ", Size:" << getSize() << ")\n"
85     << "isValid:" << isValid() << '\n'
86     << "Number of Covered register classes: " << ContainedRegClasses.count()
87     << '\n';
88  // Print all the subclasses if we can.
89  // This register classes may not be properly initialized yet.
90  if (!TRI || ContainedRegClasses.empty())
91    return;
92  assert(ContainedRegClasses.size() == TRI->getNumRegClasses() &&
93         "TRI does not match the initialization process?");
94  bool IsFirst = true;
95  OS << "Covered register classes:\n";
96  for (unsigned RCId = 0, End = TRI->getNumRegClasses(); RCId != End; ++RCId) {
97    const TargetRegisterClass &RC = *TRI->getRegClass(RCId);
98
99    if (!covers(RC))
100      continue;
101
102    if (!IsFirst)
103      OS << ", ";
104    OS << TRI->getRegClassName(&RC);
105    IsFirst = false;
106  }
107}
108