1/*
2 * Copyright (c) 2012-2015 Etnaviv Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 *    Wladimir J. van der Laan <laanwj@gmail.com>
25 */
26
27#include "etnaviv_zsa.h"
28
29#include "etnaviv_context.h"
30#include "etnaviv_translate.h"
31#include "util/u_memory.h"
32
33void *
34etna_zsa_state_create(struct pipe_context *pctx,
35                      const struct pipe_depth_stencil_alpha_state *so)
36{
37   struct etna_zsa_state *cs = CALLOC_STRUCT(etna_zsa_state);
38
39   if (!cs)
40      return NULL;
41
42   cs->base = *so;
43
44   /* XXX does stencil[0] / stencil[1] order depend on rs->front_ccw? */
45   bool early_z = true;
46   bool disable_zs =
47      (!so->depth.enabled || so->depth.func == PIPE_FUNC_ALWAYS) &&
48      !so->depth.writemask;
49
50/* Set operations to KEEP if write mask is 0.
51 * When we don't do this, the depth buffer is written for the entire primitive
52 * instead of just where the stencil condition holds (GC600 rev 0x0019, without
53 * feature CORRECT_STENCIL).
54 * Not sure if this is a hardware bug or just a strange edge case. */
55#if 0 /* TODO: It looks like a hardware bug */
56    for(int i=0; i<2; ++i)
57    {
58        if(so->stencil[i].writemask == 0)
59        {
60            so->stencil[i].fail_op = so->stencil[i].zfail_op = so->stencil[i].zpass_op = PIPE_STENCIL_OP_KEEP;
61        }
62    }
63#endif
64
65   /* Determine whether to enable early z reject. Don't enable it when any of
66    * the stencil-modifying functions is used. */
67   if (so->stencil[0].enabled) {
68      if (so->stencil[0].func != PIPE_FUNC_ALWAYS ||
69          (so->stencil[1].enabled && so->stencil[1].func != PIPE_FUNC_ALWAYS))
70         disable_zs = false;
71
72      if (so->stencil[0].fail_op != PIPE_STENCIL_OP_KEEP ||
73          so->stencil[0].zfail_op != PIPE_STENCIL_OP_KEEP ||
74          so->stencil[0].zpass_op != PIPE_STENCIL_OP_KEEP) {
75         disable_zs = early_z = false;
76      } else if (so->stencil[1].enabled) {
77         if (so->stencil[1].fail_op != PIPE_STENCIL_OP_KEEP ||
78             so->stencil[1].zfail_op != PIPE_STENCIL_OP_KEEP ||
79             so->stencil[1].zpass_op != PIPE_STENCIL_OP_KEEP) {
80            disable_zs = early_z = false;
81         }
82      }
83   }
84
85   /* Disable early z reject when no depth test is enabled.
86    * This avoids having to sample depth even though we know it's going to
87    * succeed. */
88   if (so->depth.enabled == false || so->depth.func == PIPE_FUNC_ALWAYS)
89      early_z = false;
90
91   if (DBG_ENABLED(ETNA_DBG_NO_EARLY_Z))
92      early_z = false;
93
94   /* compare funcs have 1 to 1 mapping */
95   cs->PE_DEPTH_CONFIG =
96      VIVS_PE_DEPTH_CONFIG_DEPTH_FUNC(so->depth.enabled ? so->depth.func
97                                                        : PIPE_FUNC_ALWAYS) |
98      COND(so->depth.writemask, VIVS_PE_DEPTH_CONFIG_WRITE_ENABLE) |
99      COND(early_z, VIVS_PE_DEPTH_CONFIG_EARLY_Z) |
100      COND(disable_zs, VIVS_PE_DEPTH_CONFIG_DISABLE_ZS);
101   cs->PE_ALPHA_OP =
102      COND(so->alpha.enabled, VIVS_PE_ALPHA_OP_ALPHA_TEST) |
103      VIVS_PE_ALPHA_OP_ALPHA_FUNC(so->alpha.func) |
104      VIVS_PE_ALPHA_OP_ALPHA_REF(etna_cfloat_to_uint8(so->alpha.ref_value));
105   cs->PE_STENCIL_OP =
106      VIVS_PE_STENCIL_OP_FUNC_FRONT(so->stencil[0].func) |
107      VIVS_PE_STENCIL_OP_FUNC_BACK(so->stencil[1].func) |
108      VIVS_PE_STENCIL_OP_FAIL_FRONT(translate_stencil_op(so->stencil[0].fail_op)) |
109      VIVS_PE_STENCIL_OP_FAIL_BACK(translate_stencil_op(so->stencil[1].fail_op)) |
110      VIVS_PE_STENCIL_OP_DEPTH_FAIL_FRONT(translate_stencil_op(so->stencil[0].zfail_op)) |
111      VIVS_PE_STENCIL_OP_DEPTH_FAIL_BACK(translate_stencil_op(so->stencil[1].zfail_op)) |
112      VIVS_PE_STENCIL_OP_PASS_FRONT(translate_stencil_op(so->stencil[0].zpass_op)) |
113      VIVS_PE_STENCIL_OP_PASS_BACK(translate_stencil_op(so->stencil[1].zpass_op));
114   cs->PE_STENCIL_CONFIG =
115      translate_stencil_mode(so->stencil[0].enabled, so->stencil[1].enabled) |
116      VIVS_PE_STENCIL_CONFIG_MASK_FRONT(so->stencil[0].valuemask) |
117      VIVS_PE_STENCIL_CONFIG_WRITE_MASK_FRONT(so->stencil[0].writemask);
118   /* XXX back masks in VIVS_PE_DEPTH_CONFIG_EXT? */
119   /* XXX VIVS_PE_STENCIL_CONFIG_REF_FRONT comes from pipe_stencil_ref */
120
121   /* XXX does alpha/stencil test affect PE_COLOR_FORMAT_OVERWRITE? */
122   return cs;
123}
124