si_shader.h revision 2397a721291457c146c7f4bcd48adcb3b2d979bd 
1/*
2 * Copyright 2012 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 *	Tom Stellard <thomas.stellard@amd.com>
25 *	Michel Dänzer <michel.daenzer@amd.com>
26 *      Christian König <christian.koenig@amd.com>
27 */
28
29#ifndef SI_SHADER_H
30#define SI_SHADER_H
31
32#include <llvm-c/Core.h> /* LLVMModuleRef */
33#include "tgsi/tgsi_scan.h"
34#include "si_state.h"
35
36struct radeon_shader_binary;
37struct radeon_shader_reloc;
38
39#define SI_SGPR_RW_BUFFERS	0  /* rings (& stream-out, VS only) */
40#define SI_SGPR_CONST		2
41#define SI_SGPR_SAMPLER		4
42#define SI_SGPR_RESOURCE	6
43#define SI_SGPR_VERTEX_BUFFER	8  /* VS only */
44#define SI_SGPR_BASE_VERTEX	10 /* VS only */
45#define SI_SGPR_START_INSTANCE	11 /* VS only */
46#define SI_SGPR_ALPHA_REF	8  /* PS only */
47
48#define SI_VS_NUM_USER_SGPR	12
49#define SI_GS_NUM_USER_SGPR	8
50#define SI_GSCOPY_NUM_USER_SGPR	4
51#define SI_PS_NUM_USER_SGPR	9
52
53/* LLVM function parameter indices */
54#define SI_PARAM_RW_BUFFERS	0
55#define SI_PARAM_CONST		1
56#define SI_PARAM_SAMPLER	2
57#define SI_PARAM_RESOURCE	3
58
59/* VS only parameters */
60#define SI_PARAM_VERTEX_BUFFER	4
61#define SI_PARAM_BASE_VERTEX	5
62#define SI_PARAM_START_INSTANCE	6
63/* the other VS parameters are assigned dynamically */
64
65/* ES only parameters */
66#define SI_PARAM_ES2GS_OFFSET	7
67
68/* GS only parameters */
69#define SI_PARAM_GS2VS_OFFSET	4
70#define SI_PARAM_GS_WAVE_ID	5
71#define SI_PARAM_VTX0_OFFSET	6
72#define SI_PARAM_VTX1_OFFSET	7
73#define SI_PARAM_PRIMITIVE_ID	8
74#define SI_PARAM_VTX2_OFFSET	9
75#define SI_PARAM_VTX3_OFFSET	10
76#define SI_PARAM_VTX4_OFFSET	11
77#define SI_PARAM_VTX5_OFFSET	12
78#define SI_PARAM_GS_INSTANCE_ID	13
79
80/* PS only parameters */
81#define SI_PARAM_ALPHA_REF		4
82#define SI_PARAM_PRIM_MASK		5
83#define SI_PARAM_PERSP_SAMPLE		6
84#define SI_PARAM_PERSP_CENTER		7
85#define SI_PARAM_PERSP_CENTROID		8
86#define SI_PARAM_PERSP_PULL_MODEL	9
87#define SI_PARAM_LINEAR_SAMPLE		10
88#define SI_PARAM_LINEAR_CENTER		11
89#define SI_PARAM_LINEAR_CENTROID	12
90#define SI_PARAM_LINE_STIPPLE_TEX	13
91#define SI_PARAM_POS_X_FLOAT		14
92#define SI_PARAM_POS_Y_FLOAT		15
93#define SI_PARAM_POS_Z_FLOAT		16
94#define SI_PARAM_POS_W_FLOAT		17
95#define SI_PARAM_FRONT_FACE		18
96#define SI_PARAM_ANCILLARY		19
97#define SI_PARAM_SAMPLE_COVERAGE	20
98#define SI_PARAM_POS_FIXED_PT		21
99
100#define SI_NUM_PARAMS (SI_PARAM_POS_FIXED_PT + 1)
101
102struct si_shader;
103
104struct si_shader_selector {
105	struct si_shader *current;
106
107	struct tgsi_token       *tokens;
108	struct pipe_stream_output_info  so;
109	struct tgsi_shader_info		info;
110
111	unsigned	num_shaders;
112
113	/* PIPE_SHADER_[VERTEX|FRAGMENT|...] */
114	unsigned	type;
115
116	unsigned	gs_output_prim;
117	unsigned	gs_max_out_vertices;
118	uint64_t	gs_used_inputs; /* mask of "get_unique_index" bits */
119};
120
121union si_shader_key {
122	struct {
123		unsigned	export_16bpc:8;
124		unsigned	last_cbuf:3;
125		unsigned	color_two_side:1;
126		unsigned	alpha_func:3;
127		unsigned	alpha_to_one:1;
128	} ps;
129	struct {
130		unsigned	instance_divisors[SI_NUM_VERTEX_BUFFERS];
131		/* The mask of "get_unique_index" bits, needed for ES,
132		 * it describes how the ES->GS ring buffer is laid out. */
133		uint64_t	gs_used_inputs;
134		unsigned	as_es:1;
135	} vs;
136};
137
138struct si_shader {
139	struct si_shader_selector	*selector;
140	struct si_shader		*next_variant;
141
142	struct si_shader		*gs_copy_shader;
143	struct si_pm4_state		*pm4;
144	struct r600_resource		*bo;
145	struct r600_resource		*scratch_bo;
146	struct radeon_shader_binary	binary;
147	unsigned			num_sgprs;
148	unsigned			num_vgprs;
149	unsigned			lds_size;
150	unsigned			spi_ps_input_ena;
151	unsigned			scratch_bytes_per_wave;
152	unsigned			spi_shader_col_format;
153	unsigned			spi_shader_z_format;
154	unsigned			db_shader_control;
155	unsigned			cb_shader_mask;
156	union si_shader_key		key;
157
158	unsigned		nparam;
159	unsigned		vs_output_param_offset[PIPE_MAX_SHADER_OUTPUTS];
160	unsigned		ps_input_param_offset[PIPE_MAX_SHADER_INPUTS];
161
162	bool			uses_instanceid;
163	unsigned		nr_pos_exports;
164	bool			is_gs_copy_shader;
165	bool			dx10_clamp_mode; /* convert NaNs to 0 */
166};
167
168static inline struct tgsi_shader_info *si_get_vs_info(struct si_context *sctx)
169{
170	return sctx->gs_shader ? &sctx->gs_shader->info
171                               : &sctx->vs_shader->info;
172}
173
174static inline struct si_shader* si_get_vs_state(struct si_context *sctx)
175{
176	if (sctx->gs_shader)
177		return sctx->gs_shader->current->gs_copy_shader;
178	else
179		return sctx->vs_shader->current;
180}
181
182/* radeonsi_shader.c */
183int si_shader_create(struct si_screen *sscreen, struct si_shader *shader);
184int si_compile_llvm(struct si_screen *sscreen, struct si_shader *shader,
185		    LLVMModuleRef mod);
186void si_shader_destroy(struct pipe_context *ctx, struct si_shader *shader);
187unsigned si_shader_io_get_unique_index(unsigned semantic_name, unsigned index);
188int si_shader_binary_read(struct si_screen *sscreen, struct si_shader *shader,
189		const struct radeon_shader_binary *binary);
190void si_shader_apply_scratch_relocs(struct si_context *sctx,
191			struct si_shader *shader,
192			uint64_t scratch_va);
193void si_shader_binary_read_config(const struct si_screen *sscreen,
194				struct si_shader *shader,
195				unsigned symbol_offset);
196
197#endif
198