brw_context.c revision 22d9a4824baf0bf89bb8e39025ad01fecb213888
1/* 2 Copyright 2003 VMware, Inc. 3 Copyright (C) Intel Corp. 2006. All Rights Reserved. 4 Intel funded Tungsten Graphics to 5 develop this 3D driver. 6 7 Permission is hereby granted, free of charge, to any person obtaining 8 a copy of this software and associated documentation files (the 9 "Software"), to deal in the Software without restriction, including 10 without limitation the rights to use, copy, modify, merge, publish, 11 distribute, sublicense, and/or sell copies of the Software, and to 12 permit persons to whom the Software is furnished to do so, subject to 13 the following conditions: 14 15 The above copyright notice and this permission notice (including the 16 next paragraph) shall be included in all copies or substantial 17 portions of the Software. 18 19 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 20 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 21 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 22 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 23 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 24 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 25 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 26 27 **********************************************************************/ 28 /* 29 * Authors: 30 * Keith Whitwell <keithw@vmware.com> 31 */ 32 33 34#include "main/api_exec.h" 35#include "main/context.h" 36#include "main/fbobject.h" 37#include "main/extensions.h" 38#include "main/imports.h" 39#include "main/macros.h" 40#include "main/points.h" 41#include "main/version.h" 42#include "main/vtxfmt.h" 43#include "main/texobj.h" 44#include "main/framebuffer.h" 45 46#include "vbo/vbo_context.h" 47 48#include "drivers/common/driverfuncs.h" 49#include "drivers/common/meta.h" 50#include "utils.h" 51 52#include "brw_context.h" 53#include "brw_defines.h" 54#include "brw_blorp.h" 55#include "brw_compiler.h" 56#include "brw_draw.h" 57#include "brw_state.h" 58 59#include "intel_batchbuffer.h" 60#include "intel_buffer_objects.h" 61#include "intel_buffers.h" 62#include "intel_fbo.h" 63#include "intel_mipmap_tree.h" 64#include "intel_pixel.h" 65#include "intel_image.h" 66#include "intel_tex.h" 67#include "intel_tex_obj.h" 68 69#include "swrast_setup/swrast_setup.h" 70#include "tnl/tnl.h" 71#include "tnl/t_pipeline.h" 72#include "util/ralloc.h" 73#include "util/debug.h" 74#include "isl/isl.h" 75 76/*************************************** 77 * Mesa's Driver Functions 78 ***************************************/ 79 80const char *const brw_vendor_string = "Intel Open Source Technology Center"; 81 82static const char * 83get_bsw_model(const struct intel_screen *intelScreen) 84{ 85 switch (intelScreen->eu_total) { 86 case 16: 87 return "405"; 88 case 12: 89 return "400"; 90 default: 91 return " "; 92 } 93} 94 95const char * 96brw_get_renderer_string(const struct intel_screen *intelScreen) 97{ 98 const char *chipset; 99 static char buffer[128]; 100 char *bsw = NULL; 101 102 switch (intelScreen->deviceID) { 103#undef CHIPSET 104#define CHIPSET(id, symbol, str) case id: chipset = str; break; 105#include "pci_ids/i965_pci_ids.h" 106 default: 107 chipset = "Unknown Intel Chipset"; 108 break; 109 } 110 111 /* Braswell branding is funny, so we have to fix it up here */ 112 if (intelScreen->deviceID == 0x22B1) { 113 bsw = strdup(chipset); 114 char *needle = strstr(bsw, "XXX"); 115 if (needle) { 116 memcpy(needle, get_bsw_model(intelScreen), 3); 117 chipset = bsw; 118 } 119 } 120 121 (void) driGetRendererString(buffer, chipset, 0); 122 free(bsw); 123 return buffer; 124} 125 126static const GLubyte * 127intel_get_string(struct gl_context * ctx, GLenum name) 128{ 129 const struct brw_context *const brw = brw_context(ctx); 130 131 switch (name) { 132 case GL_VENDOR: 133 return (GLubyte *) brw_vendor_string; 134 135 case GL_RENDERER: 136 return 137 (GLubyte *) brw_get_renderer_string(brw->intelScreen); 138 139 default: 140 return NULL; 141 } 142} 143 144static void 145intel_viewport(struct gl_context *ctx) 146{ 147 struct brw_context *brw = brw_context(ctx); 148 __DRIcontext *driContext = brw->driContext; 149 150 if (_mesa_is_winsys_fbo(ctx->DrawBuffer)) { 151 if (driContext->driDrawablePriv) 152 dri2InvalidateDrawable(driContext->driDrawablePriv); 153 if (driContext->driReadablePriv) 154 dri2InvalidateDrawable(driContext->driReadablePriv); 155 } 156} 157 158static void 159intel_update_framebuffer(struct gl_context *ctx, 160 struct gl_framebuffer *fb) 161{ 162 struct brw_context *brw = brw_context(ctx); 163 164 /* Quantize the derived default number of samples 165 */ 166 fb->DefaultGeometry._NumSamples = 167 intel_quantize_num_samples(brw->intelScreen, 168 fb->DefaultGeometry.NumSamples); 169} 170 171static bool 172intel_disable_rb_aux_buffer(struct brw_context *brw, const drm_intel_bo *bo) 173{ 174 const struct gl_framebuffer *fb = brw->ctx.DrawBuffer; 175 bool found = false; 176 177 for (unsigned i = 0; i < fb->_NumColorDrawBuffers; i++) { 178 const struct intel_renderbuffer *irb = 179 intel_renderbuffer(fb->_ColorDrawBuffers[i]); 180 181 if (irb && irb->mt->bo == bo) { 182 found = brw->draw_aux_buffer_disabled[i] = true; 183 } 184 } 185 186 return found; 187} 188 189/* On Gen9 color buffers may be compressed by the hardware (lossless 190 * compression). There are, however, format restrictions and care needs to be 191 * taken that the sampler engine is capable for re-interpreting a buffer with 192 * format different the buffer was originally written with. 193 * 194 * For example, SRGB formats are not compressible and the sampler engine isn't 195 * capable of treating RGBA_UNORM as SRGB_ALPHA. In such a case the underlying 196 * color buffer needs to be resolved so that the sampling surface can be 197 * sampled as non-compressed (i.e., without the auxiliary MCS buffer being 198 * set). 199 */ 200static bool 201intel_texture_view_requires_resolve(struct brw_context *brw, 202 struct intel_texture_object *intel_tex) 203{ 204 if (brw->gen < 9 || 205 !intel_miptree_is_lossless_compressed(brw, intel_tex->mt)) 206 return false; 207 208 const uint32_t brw_format = brw_format_for_mesa_format(intel_tex->_Format); 209 210 if (isl_format_supports_lossless_compression(brw->intelScreen->devinfo, 211 brw_format)) 212 return false; 213 214 perf_debug("Incompatible sampling format (%s) for rbc (%s)\n", 215 _mesa_get_format_name(intel_tex->_Format), 216 _mesa_get_format_name(intel_tex->mt->format)); 217 218 if (intel_disable_rb_aux_buffer(brw, intel_tex->mt->bo)) 219 perf_debug("Sampling renderbuffer with non-compressible format - " 220 "turning off compression"); 221 222 return true; 223} 224 225static void 226intel_update_state(struct gl_context * ctx, GLuint new_state) 227{ 228 struct brw_context *brw = brw_context(ctx); 229 struct intel_texture_object *tex_obj; 230 struct intel_renderbuffer *depth_irb; 231 232 if (ctx->swrast_context) 233 _swrast_InvalidateState(ctx, new_state); 234 _vbo_InvalidateState(ctx, new_state); 235 236 brw->NewGLState |= new_state; 237 238 _mesa_unlock_context_textures(ctx); 239 240 /* Resolve the depth buffer's HiZ buffer. */ 241 depth_irb = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_DEPTH); 242 if (depth_irb) 243 intel_renderbuffer_resolve_hiz(brw, depth_irb); 244 245 memset(brw->draw_aux_buffer_disabled, 0, 246 sizeof(brw->draw_aux_buffer_disabled)); 247 248 /* Resolve depth buffer and render cache of each enabled texture. */ 249 int maxEnabledUnit = ctx->Texture._MaxEnabledTexImageUnit; 250 for (int i = 0; i <= maxEnabledUnit; i++) { 251 if (!ctx->Texture.Unit[i]._Current) 252 continue; 253 tex_obj = intel_texture_object(ctx->Texture.Unit[i]._Current); 254 if (!tex_obj || !tex_obj->mt) 255 continue; 256 intel_miptree_all_slices_resolve_depth(brw, tex_obj->mt); 257 /* Sampling engine understands lossless compression and resolving 258 * those surfaces should be skipped for performance reasons. 259 */ 260 const int flags = intel_texture_view_requires_resolve(brw, tex_obj) ? 261 0 : INTEL_MIPTREE_IGNORE_CCS_E; 262 intel_miptree_resolve_color(brw, tex_obj->mt, flags); 263 brw_render_cache_set_check_flush(brw, tex_obj->mt->bo); 264 265 if (tex_obj->base.StencilSampling || 266 tex_obj->mt->format == MESA_FORMAT_S_UINT8) { 267 intel_update_r8stencil(brw, tex_obj->mt); 268 } 269 } 270 271 /* Resolve color for each active shader image. */ 272 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) { 273 const struct gl_linked_shader *shader = 274 ctx->_Shader->CurrentProgram[i] ? 275 ctx->_Shader->CurrentProgram[i]->_LinkedShaders[i] : NULL; 276 277 if (unlikely(shader && shader->NumImages)) { 278 for (unsigned j = 0; j < shader->NumImages; j++) { 279 struct gl_image_unit *u = &ctx->ImageUnits[shader->ImageUnits[j]]; 280 tex_obj = intel_texture_object(u->TexObj); 281 282 if (tex_obj && tex_obj->mt) { 283 /* Access to images is implemented using indirect messages 284 * against data port. Normal render target write understands 285 * lossless compression but unfortunately the typed/untyped 286 * read/write interface doesn't. Therefore the compressed 287 * surfaces need to be resolved prior to accessing them. 288 */ 289 intel_miptree_resolve_color(brw, tex_obj->mt, 0); 290 291 if (intel_miptree_is_lossless_compressed(brw, tex_obj->mt) && 292 intel_disable_rb_aux_buffer(brw, tex_obj->mt->bo)) { 293 perf_debug("Using renderbuffer as shader image - turning " 294 "off lossless compression"); 295 } 296 297 brw_render_cache_set_check_flush(brw, tex_obj->mt->bo); 298 } 299 } 300 } 301 } 302 303 /* Resolve color buffers for non-coherent framebufer fetch. */ 304 if (!ctx->Extensions.MESA_shader_framebuffer_fetch && 305 ctx->FragmentProgram._Current && 306 ctx->FragmentProgram._Current->Base.OutputsRead) { 307 const struct gl_framebuffer *fb = ctx->DrawBuffer; 308 309 for (unsigned i = 0; i < fb->_NumColorDrawBuffers; i++) { 310 const struct intel_renderbuffer *irb = 311 intel_renderbuffer(fb->_ColorDrawBuffers[i]); 312 313 if (irb && 314 intel_miptree_resolve_color(brw, irb->mt, 315 INTEL_MIPTREE_IGNORE_CCS_E)) 316 brw_render_cache_set_check_flush(brw, irb->mt->bo); 317 } 318 } 319 320 /* If FRAMEBUFFER_SRGB is used on Gen9+ then we need to resolve any of the 321 * single-sampled color renderbuffers because the CCS buffer isn't 322 * supported for SRGB formats. This only matters if FRAMEBUFFER_SRGB is 323 * enabled because otherwise the surface state will be programmed with the 324 * linear equivalent format anyway. 325 */ 326 if (brw->gen >= 9 && ctx->Color.sRGBEnabled) { 327 struct gl_framebuffer *fb = ctx->DrawBuffer; 328 for (int i = 0; i < fb->_NumColorDrawBuffers; i++) { 329 struct gl_renderbuffer *rb = fb->_ColorDrawBuffers[i]; 330 331 if (rb == NULL) 332 continue; 333 334 struct intel_renderbuffer *irb = intel_renderbuffer(rb); 335 struct intel_mipmap_tree *mt = irb->mt; 336 337 if (mt == NULL || 338 mt->num_samples > 1 || 339 _mesa_get_srgb_format_linear(mt->format) == mt->format) 340 continue; 341 342 /* Lossless compression is not supported for SRGB formats, it 343 * should be impossible to get here with such surfaces. 344 */ 345 assert(!intel_miptree_is_lossless_compressed(brw, mt)); 346 intel_miptree_resolve_color(brw, mt, 0); 347 brw_render_cache_set_check_flush(brw, mt->bo); 348 } 349 } 350 351 _mesa_lock_context_textures(ctx); 352 353 if (new_state & _NEW_BUFFERS) { 354 intel_update_framebuffer(ctx, ctx->DrawBuffer); 355 if (ctx->DrawBuffer != ctx->ReadBuffer) 356 intel_update_framebuffer(ctx, ctx->ReadBuffer); 357 } 358} 359 360#define flushFront(screen) ((screen)->image.loader ? (screen)->image.loader->flushFrontBuffer : (screen)->dri2.loader->flushFrontBuffer) 361 362static void 363intel_flush_front(struct gl_context *ctx) 364{ 365 struct brw_context *brw = brw_context(ctx); 366 __DRIcontext *driContext = brw->driContext; 367 __DRIdrawable *driDrawable = driContext->driDrawablePriv; 368 __DRIscreen *const screen = brw->intelScreen->driScrnPriv; 369 370 if (brw->front_buffer_dirty && _mesa_is_winsys_fbo(ctx->DrawBuffer)) { 371 if (flushFront(screen) && driDrawable && 372 driDrawable->loaderPrivate) { 373 374 /* Resolve before flushing FAKE_FRONT_LEFT to FRONT_LEFT. 375 * 376 * This potentially resolves both front and back buffer. It 377 * is unnecessary to resolve the back, but harms nothing except 378 * performance. And no one cares about front-buffer render 379 * performance. 380 */ 381 intel_resolve_for_dri2_flush(brw, driDrawable); 382 intel_batchbuffer_flush(brw); 383 384 flushFront(screen)(driDrawable, driDrawable->loaderPrivate); 385 386 /* We set the dirty bit in intel_prepare_render() if we're 387 * front buffer rendering once we get there. 388 */ 389 brw->front_buffer_dirty = false; 390 } 391 } 392} 393 394static void 395intel_glFlush(struct gl_context *ctx) 396{ 397 struct brw_context *brw = brw_context(ctx); 398 399 intel_batchbuffer_flush(brw); 400 intel_flush_front(ctx); 401 402 brw->need_flush_throttle = true; 403} 404 405static void 406intel_finish(struct gl_context * ctx) 407{ 408 struct brw_context *brw = brw_context(ctx); 409 410 intel_glFlush(ctx); 411 412 if (brw->batch.last_bo) 413 drm_intel_bo_wait_rendering(brw->batch.last_bo); 414} 415 416static void 417brw_init_driver_functions(struct brw_context *brw, 418 struct dd_function_table *functions) 419{ 420 _mesa_init_driver_functions(functions); 421 422 /* GLX uses DRI2 invalidate events to handle window resizing. 423 * Unfortunately, EGL does not - libEGL is written in XCB (not Xlib), 424 * which doesn't provide a mechanism for snooping the event queues. 425 * 426 * So EGL still relies on viewport hacks to handle window resizing. 427 * This should go away with DRI3000. 428 */ 429 if (!brw->driContext->driScreenPriv->dri2.useInvalidate) 430 functions->Viewport = intel_viewport; 431 432 functions->Flush = intel_glFlush; 433 functions->Finish = intel_finish; 434 functions->GetString = intel_get_string; 435 functions->UpdateState = intel_update_state; 436 437 intelInitTextureFuncs(functions); 438 intelInitTextureImageFuncs(functions); 439 intelInitTextureSubImageFuncs(functions); 440 intelInitTextureCopyImageFuncs(functions); 441 intelInitCopyImageFuncs(functions); 442 intelInitClearFuncs(functions); 443 intelInitBufferFuncs(functions); 444 intelInitPixelFuncs(functions); 445 intelInitBufferObjectFuncs(functions); 446 intel_init_syncobj_functions(functions); 447 brw_init_object_purgeable_functions(functions); 448 449 brwInitFragProgFuncs( functions ); 450 brw_init_common_queryobj_functions(functions); 451 if (brw->gen >= 8 || brw->is_haswell) 452 hsw_init_queryobj_functions(functions); 453 else if (brw->gen >= 6) 454 gen6_init_queryobj_functions(functions); 455 else 456 gen4_init_queryobj_functions(functions); 457 brw_init_compute_functions(functions); 458 if (brw->gen >= 7) 459 brw_init_conditional_render_functions(functions); 460 461 functions->QueryInternalFormat = brw_query_internal_format; 462 463 functions->NewTransformFeedback = brw_new_transform_feedback; 464 functions->DeleteTransformFeedback = brw_delete_transform_feedback; 465 if (brw->intelScreen->has_mi_math_and_lrr) { 466 functions->BeginTransformFeedback = hsw_begin_transform_feedback; 467 functions->EndTransformFeedback = hsw_end_transform_feedback; 468 functions->PauseTransformFeedback = hsw_pause_transform_feedback; 469 functions->ResumeTransformFeedback = hsw_resume_transform_feedback; 470 } else if (brw->gen >= 7) { 471 functions->BeginTransformFeedback = gen7_begin_transform_feedback; 472 functions->EndTransformFeedback = gen7_end_transform_feedback; 473 functions->PauseTransformFeedback = gen7_pause_transform_feedback; 474 functions->ResumeTransformFeedback = gen7_resume_transform_feedback; 475 functions->GetTransformFeedbackVertexCount = 476 brw_get_transform_feedback_vertex_count; 477 } else { 478 functions->BeginTransformFeedback = brw_begin_transform_feedback; 479 functions->EndTransformFeedback = brw_end_transform_feedback; 480 } 481 482 if (brw->gen >= 6) 483 functions->GetSamplePosition = gen6_get_sample_position; 484} 485 486static void 487brw_initialize_context_constants(struct brw_context *brw) 488{ 489 struct gl_context *ctx = &brw->ctx; 490 const struct brw_compiler *compiler = brw->intelScreen->compiler; 491 492 const bool stage_exists[MESA_SHADER_STAGES] = { 493 [MESA_SHADER_VERTEX] = true, 494 [MESA_SHADER_TESS_CTRL] = brw->gen >= 7, 495 [MESA_SHADER_TESS_EVAL] = brw->gen >= 7, 496 [MESA_SHADER_GEOMETRY] = brw->gen >= 6, 497 [MESA_SHADER_FRAGMENT] = true, 498 [MESA_SHADER_COMPUTE] = 499 (ctx->API == API_OPENGL_CORE && 500 ctx->Const.MaxComputeWorkGroupSize[0] >= 1024) || 501 (ctx->API == API_OPENGLES2 && 502 ctx->Const.MaxComputeWorkGroupSize[0] >= 128) || 503 _mesa_extension_override_enables.ARB_compute_shader, 504 }; 505 506 unsigned num_stages = 0; 507 for (int i = 0; i < MESA_SHADER_STAGES; i++) { 508 if (stage_exists[i]) 509 num_stages++; 510 } 511 512 unsigned max_samplers = 513 brw->gen >= 8 || brw->is_haswell ? BRW_MAX_TEX_UNIT : 16; 514 515 ctx->Const.MaxDualSourceDrawBuffers = 1; 516 ctx->Const.MaxDrawBuffers = BRW_MAX_DRAW_BUFFERS; 517 ctx->Const.MaxCombinedShaderOutputResources = 518 MAX_IMAGE_UNITS + BRW_MAX_DRAW_BUFFERS; 519 520 ctx->Const.QueryCounterBits.Timestamp = 36; 521 522 ctx->Const.MaxTextureCoordUnits = 8; /* Mesa limit */ 523 ctx->Const.MaxImageUnits = MAX_IMAGE_UNITS; 524 ctx->Const.MaxRenderbufferSize = 8192; 525 ctx->Const.MaxTextureLevels = MIN2(14 /* 8192 */, MAX_TEXTURE_LEVELS); 526 527 /* On Sandy Bridge and prior, the "Render Target View Extent" field of 528 * RENDER_SURFACE_STATE is only 9 bits so the largest 3-D texture we can do 529 * a layered render into has a depth of 512. On Iron Lake and earlier, we 530 * don't support layered rendering and we use manual offsetting to render 531 * into the different layers so this doesn't matter. On Sandy Bridge, 532 * however, we do support layered rendering so this is a problem. 533 */ 534 ctx->Const.Max3DTextureLevels = brw->gen == 6 ? 10 /* 512 */ : 12; /* 2048 */ 535 536 ctx->Const.MaxCubeTextureLevels = 14; /* 8192 */ 537 ctx->Const.MaxArrayTextureLayers = brw->gen >= 7 ? 2048 : 512; 538 ctx->Const.MaxTextureMbytes = 1536; 539 ctx->Const.MaxTextureRectSize = 1 << 12; 540 ctx->Const.MaxTextureMaxAnisotropy = 16.0; 541 ctx->Const.StripTextureBorder = true; 542 if (brw->gen >= 7) 543 ctx->Const.MaxProgramTextureGatherComponents = 4; 544 else if (brw->gen == 6) 545 ctx->Const.MaxProgramTextureGatherComponents = 1; 546 547 ctx->Const.MaxUniformBlockSize = 65536; 548 549 for (int i = 0; i < MESA_SHADER_STAGES; i++) { 550 struct gl_program_constants *prog = &ctx->Const.Program[i]; 551 552 if (!stage_exists[i]) 553 continue; 554 555 prog->MaxTextureImageUnits = max_samplers; 556 557 prog->MaxUniformBlocks = BRW_MAX_UBO; 558 prog->MaxCombinedUniformComponents = 559 prog->MaxUniformComponents + 560 ctx->Const.MaxUniformBlockSize / 4 * prog->MaxUniformBlocks; 561 562 prog->MaxAtomicCounters = MAX_ATOMIC_COUNTERS; 563 prog->MaxAtomicBuffers = BRW_MAX_ABO; 564 prog->MaxImageUniforms = compiler->scalar_stage[i] ? BRW_MAX_IMAGES : 0; 565 prog->MaxShaderStorageBlocks = BRW_MAX_SSBO; 566 } 567 568 ctx->Const.MaxTextureUnits = 569 MIN2(ctx->Const.MaxTextureCoordUnits, 570 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits); 571 572 ctx->Const.MaxUniformBufferBindings = num_stages * BRW_MAX_UBO; 573 ctx->Const.MaxCombinedUniformBlocks = num_stages * BRW_MAX_UBO; 574 ctx->Const.MaxCombinedAtomicBuffers = num_stages * BRW_MAX_ABO; 575 ctx->Const.MaxCombinedShaderStorageBlocks = num_stages * BRW_MAX_SSBO; 576 ctx->Const.MaxShaderStorageBufferBindings = num_stages * BRW_MAX_SSBO; 577 ctx->Const.MaxCombinedTextureImageUnits = num_stages * max_samplers; 578 ctx->Const.MaxCombinedImageUniforms = num_stages * BRW_MAX_IMAGES; 579 580 581 /* Hardware only supports a limited number of transform feedback buffers. 582 * So we need to override the Mesa default (which is based only on software 583 * limits). 584 */ 585 ctx->Const.MaxTransformFeedbackBuffers = BRW_MAX_SOL_BUFFERS; 586 587 /* On Gen6, in the worst case, we use up one binding table entry per 588 * transform feedback component (see comments above the definition of 589 * BRW_MAX_SOL_BINDINGS, in brw_context.h), so we need to advertise a value 590 * for MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS equal to 591 * BRW_MAX_SOL_BINDINGS. 592 * 593 * In "separate components" mode, we need to divide this value by 594 * BRW_MAX_SOL_BUFFERS, so that the total number of binding table entries 595 * used up by all buffers will not exceed BRW_MAX_SOL_BINDINGS. 596 */ 597 ctx->Const.MaxTransformFeedbackInterleavedComponents = BRW_MAX_SOL_BINDINGS; 598 ctx->Const.MaxTransformFeedbackSeparateComponents = 599 BRW_MAX_SOL_BINDINGS / BRW_MAX_SOL_BUFFERS; 600 601 ctx->Const.AlwaysUseGetTransformFeedbackVertexCount = 602 !brw->intelScreen->has_mi_math_and_lrr; 603 604 int max_samples; 605 const int *msaa_modes = intel_supported_msaa_modes(brw->intelScreen); 606 const int clamp_max_samples = 607 driQueryOptioni(&brw->optionCache, "clamp_max_samples"); 608 609 if (clamp_max_samples < 0) { 610 max_samples = msaa_modes[0]; 611 } else { 612 /* Select the largest supported MSAA mode that does not exceed 613 * clamp_max_samples. 614 */ 615 max_samples = 0; 616 for (int i = 0; msaa_modes[i] != 0; ++i) { 617 if (msaa_modes[i] <= clamp_max_samples) { 618 max_samples = msaa_modes[i]; 619 break; 620 } 621 } 622 } 623 624 ctx->Const.MaxSamples = max_samples; 625 ctx->Const.MaxColorTextureSamples = max_samples; 626 ctx->Const.MaxDepthTextureSamples = max_samples; 627 ctx->Const.MaxIntegerSamples = max_samples; 628 ctx->Const.MaxImageSamples = 0; 629 630 /* gen6_set_sample_maps() sets SampleMap{2,4,8}x variables which are used 631 * to map indices of rectangular grid to sample numbers within a pixel. 632 * These variables are used by GL_EXT_framebuffer_multisample_blit_scaled 633 * extension implementation. For more details see the comment above 634 * gen6_set_sample_maps() definition. 635 */ 636 gen6_set_sample_maps(ctx); 637 638 ctx->Const.MinLineWidth = 1.0; 639 ctx->Const.MinLineWidthAA = 1.0; 640 if (brw->gen >= 6) { 641 ctx->Const.MaxLineWidth = 7.375; 642 ctx->Const.MaxLineWidthAA = 7.375; 643 ctx->Const.LineWidthGranularity = 0.125; 644 } else { 645 ctx->Const.MaxLineWidth = 7.0; 646 ctx->Const.MaxLineWidthAA = 7.0; 647 ctx->Const.LineWidthGranularity = 0.5; 648 } 649 650 /* For non-antialiased lines, we have to round the line width to the 651 * nearest whole number. Make sure that we don't advertise a line 652 * width that, when rounded, will be beyond the actual hardware 653 * maximum. 654 */ 655 assert(roundf(ctx->Const.MaxLineWidth) <= ctx->Const.MaxLineWidth); 656 657 ctx->Const.MinPointSize = 1.0; 658 ctx->Const.MinPointSizeAA = 1.0; 659 ctx->Const.MaxPointSize = 255.0; 660 ctx->Const.MaxPointSizeAA = 255.0; 661 ctx->Const.PointSizeGranularity = 1.0; 662 663 if (brw->gen >= 5 || brw->is_g4x) 664 ctx->Const.MaxClipPlanes = 8; 665 666 ctx->Const.LowerTessLevel = true; 667 ctx->Const.LowerTCSPatchVerticesIn = brw->gen >= 8; 668 ctx->Const.LowerTESPatchVerticesIn = true; 669 ctx->Const.PrimitiveRestartForPatches = true; 670 671 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeInstructions = 16 * 1024; 672 ctx->Const.Program[MESA_SHADER_VERTEX].MaxAluInstructions = 0; 673 ctx->Const.Program[MESA_SHADER_VERTEX].MaxTexInstructions = 0; 674 ctx->Const.Program[MESA_SHADER_VERTEX].MaxTexIndirections = 0; 675 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAluInstructions = 0; 676 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTexInstructions = 0; 677 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTexIndirections = 0; 678 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAttribs = 16; 679 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTemps = 256; 680 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAddressRegs = 1; 681 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeParameters = 1024; 682 ctx->Const.Program[MESA_SHADER_VERTEX].MaxEnvParams = 683 MIN2(ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeParameters, 684 ctx->Const.Program[MESA_SHADER_VERTEX].MaxEnvParams); 685 686 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeInstructions = 1024; 687 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAluInstructions = 1024; 688 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTexInstructions = 1024; 689 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTexIndirections = 1024; 690 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAttribs = 12; 691 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTemps = 256; 692 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAddressRegs = 0; 693 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeParameters = 1024; 694 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxEnvParams = 695 MIN2(ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeParameters, 696 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxEnvParams); 697 698 /* Fragment shaders use real, 32-bit twos-complement integers for all 699 * integer types. 700 */ 701 ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.RangeMin = 31; 702 ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.RangeMax = 30; 703 ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.Precision = 0; 704 ctx->Const.Program[MESA_SHADER_FRAGMENT].HighInt = ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt; 705 ctx->Const.Program[MESA_SHADER_FRAGMENT].MediumInt = ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt; 706 707 ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.RangeMin = 31; 708 ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.RangeMax = 30; 709 ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.Precision = 0; 710 ctx->Const.Program[MESA_SHADER_VERTEX].HighInt = ctx->Const.Program[MESA_SHADER_VERTEX].LowInt; 711 ctx->Const.Program[MESA_SHADER_VERTEX].MediumInt = ctx->Const.Program[MESA_SHADER_VERTEX].LowInt; 712 713 /* Gen6 converts quads to polygon in beginning of 3D pipeline, 714 * but we're not sure how it's actually done for vertex order, 715 * that affect provoking vertex decision. Always use last vertex 716 * convention for quad primitive which works as expected for now. 717 */ 718 if (brw->gen >= 6) 719 ctx->Const.QuadsFollowProvokingVertexConvention = false; 720 721 ctx->Const.NativeIntegers = true; 722 ctx->Const.VertexID_is_zero_based = true; 723 724 /* Regarding the CMP instruction, the Ivybridge PRM says: 725 * 726 * "For each enabled channel 0b or 1b is assigned to the appropriate flag 727 * bit and 0/all zeros or all ones (e.g, byte 0xFF, word 0xFFFF, DWord 728 * 0xFFFFFFFF) is assigned to dst." 729 * 730 * but PRMs for earlier generations say 731 * 732 * "In dword format, one GRF may store up to 8 results. When the register 733 * is used later as a vector of Booleans, as only LSB at each channel 734 * contains meaning [sic] data, software should make sure all higher bits 735 * are masked out (e.g. by 'and-ing' an [sic] 0x01 constant)." 736 * 737 * We select the representation of a true boolean uniform to be ~0, and fix 738 * the results of Gen <= 5 CMP instruction's with -(result & 1). 739 */ 740 ctx->Const.UniformBooleanTrue = ~0; 741 742 /* From the gen4 PRM, volume 4 page 127: 743 * 744 * "For SURFTYPE_BUFFER non-rendertarget surfaces, this field specifies 745 * the base address of the first element of the surface, computed in 746 * software by adding the surface base address to the byte offset of 747 * the element in the buffer." 748 * 749 * However, unaligned accesses are slower, so enforce buffer alignment. 750 */ 751 ctx->Const.UniformBufferOffsetAlignment = 16; 752 753 /* ShaderStorageBufferOffsetAlignment should be a cacheline (64 bytes) so 754 * that we can safely have the CPU and GPU writing the same SSBO on 755 * non-cachecoherent systems (our Atom CPUs). With UBOs, the GPU never 756 * writes, so there's no problem. For an SSBO, the GPU and the CPU can 757 * be updating disjoint regions of the buffer simultaneously and that will 758 * break if the regions overlap the same cacheline. 759 */ 760 ctx->Const.ShaderStorageBufferOffsetAlignment = 64; 761 ctx->Const.TextureBufferOffsetAlignment = 16; 762 ctx->Const.MaxTextureBufferSize = 128 * 1024 * 1024; 763 764 if (brw->gen >= 6) { 765 ctx->Const.MaxVarying = 32; 766 ctx->Const.Program[MESA_SHADER_VERTEX].MaxOutputComponents = 128; 767 ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxInputComponents = 64; 768 ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxOutputComponents = 128; 769 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxInputComponents = 128; 770 ctx->Const.Program[MESA_SHADER_TESS_CTRL].MaxInputComponents = 128; 771 ctx->Const.Program[MESA_SHADER_TESS_CTRL].MaxOutputComponents = 128; 772 ctx->Const.Program[MESA_SHADER_TESS_EVAL].MaxInputComponents = 128; 773 ctx->Const.Program[MESA_SHADER_TESS_EVAL].MaxOutputComponents = 128; 774 } 775 776 /* We want the GLSL compiler to emit code that uses condition codes */ 777 for (int i = 0; i < MESA_SHADER_STAGES; i++) { 778 ctx->Const.ShaderCompilerOptions[i] = 779 brw->intelScreen->compiler->glsl_compiler_options[i]; 780 } 781 782 if (brw->gen >= 7) { 783 ctx->Const.MaxViewportWidth = 32768; 784 ctx->Const.MaxViewportHeight = 32768; 785 } 786 787 /* ARB_viewport_array */ 788 if (brw->gen >= 6 && ctx->API == API_OPENGL_CORE) { 789 ctx->Const.MaxViewports = GEN6_NUM_VIEWPORTS; 790 ctx->Const.ViewportSubpixelBits = 0; 791 792 /* Cast to float before negating because MaxViewportWidth is unsigned. 793 */ 794 ctx->Const.ViewportBounds.Min = -(float)ctx->Const.MaxViewportWidth; 795 ctx->Const.ViewportBounds.Max = ctx->Const.MaxViewportWidth; 796 } 797 798 /* ARB_gpu_shader5 */ 799 if (brw->gen >= 7) 800 ctx->Const.MaxVertexStreams = MIN2(4, MAX_VERTEX_STREAMS); 801 802 /* ARB_framebuffer_no_attachments */ 803 ctx->Const.MaxFramebufferWidth = 16384; 804 ctx->Const.MaxFramebufferHeight = 16384; 805 ctx->Const.MaxFramebufferLayers = ctx->Const.MaxArrayTextureLayers; 806 ctx->Const.MaxFramebufferSamples = max_samples; 807 808 /* OES_primitive_bounding_box */ 809 ctx->Const.NoPrimitiveBoundingBoxOutput = true; 810} 811 812static void 813brw_initialize_cs_context_constants(struct brw_context *brw) 814{ 815 struct gl_context *ctx = &brw->ctx; 816 const struct intel_screen *screen = brw->intelScreen; 817 const struct gen_device_info *devinfo = screen->devinfo; 818 819 /* FINISHME: Do this for all platforms that the kernel supports */ 820 if (brw->is_cherryview && 821 screen->subslice_total > 0 && screen->eu_total > 0) { 822 /* Logical CS threads = EUs per subslice * 7 threads per EU */ 823 brw->max_cs_threads = screen->eu_total / screen->subslice_total * 7; 824 825 /* Fuse configurations may give more threads than expected, never less. */ 826 if (brw->max_cs_threads < devinfo->max_cs_threads) 827 brw->max_cs_threads = devinfo->max_cs_threads; 828 } else { 829 brw->max_cs_threads = devinfo->max_cs_threads; 830 } 831 832 /* Maximum number of scalar compute shader invocations that can be run in 833 * parallel in the same subslice assuming SIMD32 dispatch. 834 * 835 * We don't advertise more than 64 threads, because we are limited to 64 by 836 * our usage of thread_width_max in the gpgpu walker command. This only 837 * currently impacts Haswell, which otherwise might be able to advertise 70 838 * threads. With SIMD32 and 64 threads, Haswell still provides twice the 839 * required the number of invocation needed for ARB_compute_shader. 840 */ 841 const unsigned max_threads = MIN2(64, brw->max_cs_threads); 842 const uint32_t max_invocations = 32 * max_threads; 843 ctx->Const.MaxComputeWorkGroupSize[0] = max_invocations; 844 ctx->Const.MaxComputeWorkGroupSize[1] = max_invocations; 845 ctx->Const.MaxComputeWorkGroupSize[2] = max_invocations; 846 ctx->Const.MaxComputeWorkGroupInvocations = max_invocations; 847 ctx->Const.MaxComputeSharedMemorySize = 64 * 1024; 848} 849 850/** 851 * Process driconf (drirc) options, setting appropriate context flags. 852 * 853 * intelInitExtensions still pokes at optionCache directly, in order to 854 * avoid advertising various extensions. No flags are set, so it makes 855 * sense to continue doing that there. 856 */ 857static void 858brw_process_driconf_options(struct brw_context *brw) 859{ 860 struct gl_context *ctx = &brw->ctx; 861 862 driOptionCache *options = &brw->optionCache; 863 driParseConfigFiles(options, &brw->intelScreen->optionCache, 864 brw->driContext->driScreenPriv->myNum, "i965"); 865 866 int bo_reuse_mode = driQueryOptioni(options, "bo_reuse"); 867 switch (bo_reuse_mode) { 868 case DRI_CONF_BO_REUSE_DISABLED: 869 break; 870 case DRI_CONF_BO_REUSE_ALL: 871 intel_bufmgr_gem_enable_reuse(brw->bufmgr); 872 break; 873 } 874 875 if (!driQueryOptionb(options, "hiz")) { 876 brw->has_hiz = false; 877 /* On gen6, you can only do separate stencil with HIZ. */ 878 if (brw->gen == 6) 879 brw->has_separate_stencil = false; 880 } 881 882 if (driQueryOptionb(options, "always_flush_batch")) { 883 fprintf(stderr, "flushing batchbuffer before/after each draw call\n"); 884 brw->always_flush_batch = true; 885 } 886 887 if (driQueryOptionb(options, "always_flush_cache")) { 888 fprintf(stderr, "flushing GPU caches before/after each draw call\n"); 889 brw->always_flush_cache = true; 890 } 891 892 if (driQueryOptionb(options, "disable_throttling")) { 893 fprintf(stderr, "disabling flush throttling\n"); 894 brw->disable_throttling = true; 895 } 896 897 brw->precompile = driQueryOptionb(&brw->optionCache, "shader_precompile"); 898 899 if (driQueryOptionb(&brw->optionCache, "precise_trig")) 900 brw->intelScreen->compiler->precise_trig = true; 901 902 ctx->Const.ForceGLSLExtensionsWarn = 903 driQueryOptionb(options, "force_glsl_extensions_warn"); 904 905 ctx->Const.DisableGLSLLineContinuations = 906 driQueryOptionb(options, "disable_glsl_line_continuations"); 907 908 ctx->Const.AllowGLSLExtensionDirectiveMidShader = 909 driQueryOptionb(options, "allow_glsl_extension_directive_midshader"); 910 911 ctx->Const.GLSLZeroInit = driQueryOptionb(options, "glsl_zero_init"); 912 913 brw->dual_color_blend_by_location = 914 driQueryOptionb(options, "dual_color_blend_by_location"); 915} 916 917GLboolean 918brwCreateContext(gl_api api, 919 const struct gl_config *mesaVis, 920 __DRIcontext *driContextPriv, 921 unsigned major_version, 922 unsigned minor_version, 923 uint32_t flags, 924 bool notify_reset, 925 unsigned *dri_ctx_error, 926 void *sharedContextPrivate) 927{ 928 __DRIscreen *sPriv = driContextPriv->driScreenPriv; 929 struct gl_context *shareCtx = (struct gl_context *) sharedContextPrivate; 930 struct intel_screen *screen = sPriv->driverPrivate; 931 const struct gen_device_info *devinfo = screen->devinfo; 932 struct dd_function_table functions; 933 934 /* Only allow the __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS flag if the kernel 935 * provides us with context reset notifications. 936 */ 937 uint32_t allowed_flags = __DRI_CTX_FLAG_DEBUG 938 | __DRI_CTX_FLAG_FORWARD_COMPATIBLE; 939 940 if (screen->has_context_reset_notification) 941 allowed_flags |= __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS; 942 943 if (flags & ~allowed_flags) { 944 *dri_ctx_error = __DRI_CTX_ERROR_UNKNOWN_FLAG; 945 return false; 946 } 947 948 struct brw_context *brw = rzalloc(NULL, struct brw_context); 949 if (!brw) { 950 fprintf(stderr, "%s: failed to alloc context\n", __func__); 951 *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY; 952 return false; 953 } 954 955 driContextPriv->driverPrivate = brw; 956 brw->driContext = driContextPriv; 957 brw->intelScreen = screen; 958 brw->bufmgr = screen->bufmgr; 959 960 brw->gen = devinfo->gen; 961 brw->gt = devinfo->gt; 962 brw->is_g4x = devinfo->is_g4x; 963 brw->is_baytrail = devinfo->is_baytrail; 964 brw->is_haswell = devinfo->is_haswell; 965 brw->is_cherryview = devinfo->is_cherryview; 966 brw->is_broxton = devinfo->is_broxton; 967 brw->has_llc = devinfo->has_llc; 968 brw->has_hiz = devinfo->has_hiz_and_separate_stencil; 969 brw->has_separate_stencil = devinfo->has_hiz_and_separate_stencil; 970 brw->has_pln = devinfo->has_pln; 971 brw->has_compr4 = devinfo->has_compr4; 972 brw->has_surface_tile_offset = devinfo->has_surface_tile_offset; 973 brw->has_negative_rhw_bug = devinfo->has_negative_rhw_bug; 974 brw->needs_unlit_centroid_workaround = 975 devinfo->needs_unlit_centroid_workaround; 976 977 brw->must_use_separate_stencil = devinfo->must_use_separate_stencil; 978 brw->has_swizzling = screen->hw_has_swizzling; 979 980 isl_device_init(&brw->isl_dev, devinfo, screen->hw_has_swizzling); 981 982 brw->vs.base.stage = MESA_SHADER_VERTEX; 983 brw->tcs.base.stage = MESA_SHADER_TESS_CTRL; 984 brw->tes.base.stage = MESA_SHADER_TESS_EVAL; 985 brw->gs.base.stage = MESA_SHADER_GEOMETRY; 986 brw->wm.base.stage = MESA_SHADER_FRAGMENT; 987 if (brw->gen >= 8) { 988 gen8_init_vtable_surface_functions(brw); 989 brw->vtbl.emit_depth_stencil_hiz = gen8_emit_depth_stencil_hiz; 990 } else if (brw->gen >= 7) { 991 gen7_init_vtable_surface_functions(brw); 992 brw->vtbl.emit_depth_stencil_hiz = gen7_emit_depth_stencil_hiz; 993 } else if (brw->gen >= 6) { 994 gen6_init_vtable_surface_functions(brw); 995 brw->vtbl.emit_depth_stencil_hiz = gen6_emit_depth_stencil_hiz; 996 } else { 997 gen4_init_vtable_surface_functions(brw); 998 brw->vtbl.emit_depth_stencil_hiz = brw_emit_depth_stencil_hiz; 999 } 1000 1001 brw_init_driver_functions(brw, &functions); 1002 1003 if (notify_reset) 1004 functions.GetGraphicsResetStatus = brw_get_graphics_reset_status; 1005 1006 struct gl_context *ctx = &brw->ctx; 1007 1008 if (!_mesa_initialize_context(ctx, api, mesaVis, shareCtx, &functions)) { 1009 *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY; 1010 fprintf(stderr, "%s: failed to init mesa context\n", __func__); 1011 intelDestroyContext(driContextPriv); 1012 return false; 1013 } 1014 1015 driContextSetFlags(ctx, flags); 1016 1017 /* Initialize the software rasterizer and helper modules. 1018 * 1019 * As of GL 3.1 core, the gen4+ driver doesn't need the swrast context for 1020 * software fallbacks (which we have to support on legacy GL to do weird 1021 * glDrawPixels(), glBitmap(), and other functions). 1022 */ 1023 if (api != API_OPENGL_CORE && api != API_OPENGLES2) { 1024 _swrast_CreateContext(ctx); 1025 } 1026 1027 _vbo_CreateContext(ctx); 1028 if (ctx->swrast_context) { 1029 _tnl_CreateContext(ctx); 1030 TNL_CONTEXT(ctx)->Driver.RunPipeline = _tnl_run_pipeline; 1031 _swsetup_CreateContext(ctx); 1032 1033 /* Configure swrast to match hardware characteristics: */ 1034 _swrast_allow_pixel_fog(ctx, false); 1035 _swrast_allow_vertex_fog(ctx, true); 1036 } 1037 1038 _mesa_meta_init(ctx); 1039 1040 brw_process_driconf_options(brw); 1041 1042 if (INTEL_DEBUG & DEBUG_PERF) 1043 brw->perf_debug = true; 1044 1045 brw_initialize_cs_context_constants(brw); 1046 brw_initialize_context_constants(brw); 1047 1048 ctx->Const.ResetStrategy = notify_reset 1049 ? GL_LOSE_CONTEXT_ON_RESET_ARB : GL_NO_RESET_NOTIFICATION_ARB; 1050 1051 /* Reinitialize the context point state. It depends on ctx->Const values. */ 1052 _mesa_init_point(ctx); 1053 1054 intel_fbo_init(brw); 1055 1056 intel_batchbuffer_init(brw); 1057 1058 if (brw->gen >= 6) { 1059 /* Create a new hardware context. Using a hardware context means that 1060 * our GPU state will be saved/restored on context switch, allowing us 1061 * to assume that the GPU is in the same state we left it in. 1062 * 1063 * This is required for transform feedback buffer offsets, query objects, 1064 * and also allows us to reduce how much state we have to emit. 1065 */ 1066 brw->hw_ctx = drm_intel_gem_context_create(brw->bufmgr); 1067 1068 if (!brw->hw_ctx) { 1069 fprintf(stderr, "Gen6+ requires Kernel 3.6 or later.\n"); 1070 intelDestroyContext(driContextPriv); 1071 return false; 1072 } 1073 } 1074 1075 if (brw_init_pipe_control(brw, devinfo)) { 1076 *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY; 1077 intelDestroyContext(driContextPriv); 1078 return false; 1079 } 1080 1081 brw_init_state(brw); 1082 1083 intelInitExtensions(ctx); 1084 1085 brw_init_surface_formats(brw); 1086 1087 if (brw->gen >= 6) 1088 brw_blorp_init(brw); 1089 1090 brw->max_vs_threads = devinfo->max_vs_threads; 1091 brw->max_hs_threads = devinfo->max_hs_threads; 1092 brw->max_ds_threads = devinfo->max_ds_threads; 1093 brw->max_gs_threads = devinfo->max_gs_threads; 1094 brw->max_wm_threads = devinfo->max_wm_threads; 1095 brw->urb.size = devinfo->urb.size; 1096 brw->urb.min_vs_entries = devinfo->urb.min_vs_entries; 1097 brw->urb.max_vs_entries = devinfo->urb.max_vs_entries; 1098 brw->urb.max_hs_entries = devinfo->urb.max_hs_entries; 1099 brw->urb.max_ds_entries = devinfo->urb.max_ds_entries; 1100 brw->urb.max_gs_entries = devinfo->urb.max_gs_entries; 1101 1102 if (brw->gen == 6) 1103 brw->urb.gs_present = false; 1104 1105 brw->prim_restart.in_progress = false; 1106 brw->prim_restart.enable_cut_index = false; 1107 brw->gs.enabled = false; 1108 brw->sf.viewport_transform_enable = true; 1109 1110 brw->predicate.state = BRW_PREDICATE_STATE_RENDER; 1111 1112 brw->max_gtt_map_object_size = screen->max_gtt_map_object_size; 1113 1114 brw->use_resource_streamer = screen->has_resource_streamer && 1115 (env_var_as_boolean("INTEL_USE_HW_BT", false) || 1116 env_var_as_boolean("INTEL_USE_GATHER", false)); 1117 1118 ctx->VertexProgram._MaintainTnlProgram = true; 1119 ctx->FragmentProgram._MaintainTexEnvProgram = true; 1120 1121 brw_draw_init( brw ); 1122 1123 if ((flags & __DRI_CTX_FLAG_DEBUG) != 0) { 1124 /* Turn on some extra GL_ARB_debug_output generation. */ 1125 brw->perf_debug = true; 1126 } 1127 1128 if ((flags & __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS) != 0) 1129 ctx->Const.ContextFlags |= GL_CONTEXT_FLAG_ROBUST_ACCESS_BIT_ARB; 1130 1131 if (INTEL_DEBUG & DEBUG_SHADER_TIME) 1132 brw_init_shader_time(brw); 1133 1134 _mesa_compute_version(ctx); 1135 1136 _mesa_initialize_dispatch_tables(ctx); 1137 _mesa_initialize_vbo_vtxfmt(ctx); 1138 1139 if (ctx->Extensions.AMD_performance_monitor) { 1140 brw_init_performance_monitors(brw); 1141 } 1142 1143 vbo_use_buffer_objects(ctx); 1144 vbo_always_unmap_buffers(ctx); 1145 1146 return true; 1147} 1148 1149void 1150intelDestroyContext(__DRIcontext * driContextPriv) 1151{ 1152 struct brw_context *brw = 1153 (struct brw_context *) driContextPriv->driverPrivate; 1154 struct gl_context *ctx = &brw->ctx; 1155 1156 /* Dump a final BMP in case the application doesn't call SwapBuffers */ 1157 if (INTEL_DEBUG & DEBUG_AUB) { 1158 intel_batchbuffer_flush(brw); 1159 aub_dump_bmp(&brw->ctx); 1160 } 1161 1162 _mesa_meta_free(&brw->ctx); 1163 1164 if (INTEL_DEBUG & DEBUG_SHADER_TIME) { 1165 /* Force a report. */ 1166 brw->shader_time.report_time = 0; 1167 1168 brw_collect_and_report_shader_time(brw); 1169 brw_destroy_shader_time(brw); 1170 } 1171 1172 if (brw->gen >= 6) 1173 blorp_finish(&brw->blorp); 1174 1175 brw_destroy_state(brw); 1176 brw_draw_destroy(brw); 1177 1178 drm_intel_bo_unreference(brw->curbe.curbe_bo); 1179 if (brw->vs.base.scratch_bo) 1180 drm_intel_bo_unreference(brw->vs.base.scratch_bo); 1181 if (brw->tcs.base.scratch_bo) 1182 drm_intel_bo_unreference(brw->tcs.base.scratch_bo); 1183 if (brw->tes.base.scratch_bo) 1184 drm_intel_bo_unreference(brw->tes.base.scratch_bo); 1185 if (brw->gs.base.scratch_bo) 1186 drm_intel_bo_unreference(brw->gs.base.scratch_bo); 1187 if (brw->wm.base.scratch_bo) 1188 drm_intel_bo_unreference(brw->wm.base.scratch_bo); 1189 1190 gen7_reset_hw_bt_pool_offsets(brw); 1191 drm_intel_bo_unreference(brw->hw_bt_pool.bo); 1192 brw->hw_bt_pool.bo = NULL; 1193 1194 drm_intel_gem_context_destroy(brw->hw_ctx); 1195 1196 if (ctx->swrast_context) { 1197 _swsetup_DestroyContext(&brw->ctx); 1198 _tnl_DestroyContext(&brw->ctx); 1199 } 1200 _vbo_DestroyContext(&brw->ctx); 1201 1202 if (ctx->swrast_context) 1203 _swrast_DestroyContext(&brw->ctx); 1204 1205 brw_fini_pipe_control(brw); 1206 intel_batchbuffer_free(brw); 1207 1208 drm_intel_bo_unreference(brw->throttle_batch[1]); 1209 drm_intel_bo_unreference(brw->throttle_batch[0]); 1210 brw->throttle_batch[1] = NULL; 1211 brw->throttle_batch[0] = NULL; 1212 1213 driDestroyOptionCache(&brw->optionCache); 1214 1215 /* free the Mesa context */ 1216 _mesa_free_context_data(&brw->ctx); 1217 1218 ralloc_free(brw); 1219 driContextPriv->driverPrivate = NULL; 1220} 1221 1222GLboolean 1223intelUnbindContext(__DRIcontext * driContextPriv) 1224{ 1225 /* Unset current context and dispath table */ 1226 _mesa_make_current(NULL, NULL, NULL); 1227 1228 return true; 1229} 1230 1231/** 1232 * Fixes up the context for GLES23 with our default-to-sRGB-capable behavior 1233 * on window system framebuffers. 1234 * 1235 * Desktop GL is fairly reasonable in its handling of sRGB: You can ask if 1236 * your renderbuffer can do sRGB encode, and you can flip a switch that does 1237 * sRGB encode if the renderbuffer can handle it. You can ask specifically 1238 * for a visual where you're guaranteed to be capable, but it turns out that 1239 * everyone just makes all their ARGB8888 visuals capable and doesn't offer 1240 * incapable ones, because there's no difference between the two in resources 1241 * used. Applications thus get built that accidentally rely on the default 1242 * visual choice being sRGB, so we make ours sRGB capable. Everything sounds 1243 * great... 1244 * 1245 * But for GLES2/3, they decided that it was silly to not turn on sRGB encode 1246 * for sRGB renderbuffers you made with the GL_EXT_texture_sRGB equivalent. 1247 * So they removed the enable knob and made it "if the renderbuffer is sRGB 1248 * capable, do sRGB encode". Then, for your window system renderbuffers, you 1249 * can ask for sRGB visuals and get sRGB encode, or not ask for sRGB visuals 1250 * and get no sRGB encode (assuming that both kinds of visual are available). 1251 * Thus our choice to support sRGB by default on our visuals for desktop would 1252 * result in broken rendering of GLES apps that aren't expecting sRGB encode. 1253 * 1254 * Unfortunately, renderbuffer setup happens before a context is created. So 1255 * in intel_screen.c we always set up sRGB, and here, if you're a GLES2/3 1256 * context (without an sRGB visual, though we don't have sRGB visuals exposed 1257 * yet), we go turn that back off before anyone finds out. 1258 */ 1259static void 1260intel_gles3_srgb_workaround(struct brw_context *brw, 1261 struct gl_framebuffer *fb) 1262{ 1263 struct gl_context *ctx = &brw->ctx; 1264 1265 if (_mesa_is_desktop_gl(ctx) || !fb->Visual.sRGBCapable) 1266 return; 1267 1268 /* Some day when we support the sRGB capable bit on visuals available for 1269 * GLES, we'll need to respect that and not disable things here. 1270 */ 1271 fb->Visual.sRGBCapable = false; 1272 for (int i = 0; i < BUFFER_COUNT; i++) { 1273 struct gl_renderbuffer *rb = fb->Attachment[i].Renderbuffer; 1274 if (rb) 1275 rb->Format = _mesa_get_srgb_format_linear(rb->Format); 1276 } 1277} 1278 1279GLboolean 1280intelMakeCurrent(__DRIcontext * driContextPriv, 1281 __DRIdrawable * driDrawPriv, 1282 __DRIdrawable * driReadPriv) 1283{ 1284 struct brw_context *brw; 1285 GET_CURRENT_CONTEXT(curCtx); 1286 1287 if (driContextPriv) 1288 brw = (struct brw_context *) driContextPriv->driverPrivate; 1289 else 1290 brw = NULL; 1291 1292 /* According to the glXMakeCurrent() man page: "Pending commands to 1293 * the previous context, if any, are flushed before it is released." 1294 * But only flush if we're actually changing contexts. 1295 */ 1296 if (brw_context(curCtx) && brw_context(curCtx) != brw) { 1297 _mesa_flush(curCtx); 1298 } 1299 1300 if (driContextPriv) { 1301 struct gl_context *ctx = &brw->ctx; 1302 struct gl_framebuffer *fb, *readFb; 1303 1304 if (driDrawPriv == NULL) { 1305 fb = _mesa_get_incomplete_framebuffer(); 1306 } else { 1307 fb = driDrawPriv->driverPrivate; 1308 driContextPriv->dri2.draw_stamp = driDrawPriv->dri2.stamp - 1; 1309 } 1310 1311 if (driReadPriv == NULL) { 1312 readFb = _mesa_get_incomplete_framebuffer(); 1313 } else { 1314 readFb = driReadPriv->driverPrivate; 1315 driContextPriv->dri2.read_stamp = driReadPriv->dri2.stamp - 1; 1316 } 1317 1318 /* The sRGB workaround changes the renderbuffer's format. We must change 1319 * the format before the renderbuffer's miptree get's allocated, otherwise 1320 * the formats of the renderbuffer and its miptree will differ. 1321 */ 1322 intel_gles3_srgb_workaround(brw, fb); 1323 intel_gles3_srgb_workaround(brw, readFb); 1324 1325 /* If the context viewport hasn't been initialized, force a call out to 1326 * the loader to get buffers so we have a drawable size for the initial 1327 * viewport. */ 1328 if (!brw->ctx.ViewportInitialized) 1329 intel_prepare_render(brw); 1330 1331 _mesa_make_current(ctx, fb, readFb); 1332 } else { 1333 _mesa_make_current(NULL, NULL, NULL); 1334 } 1335 1336 return true; 1337} 1338 1339void 1340intel_resolve_for_dri2_flush(struct brw_context *brw, 1341 __DRIdrawable *drawable) 1342{ 1343 if (brw->gen < 6) { 1344 /* MSAA and fast color clear are not supported, so don't waste time 1345 * checking whether a resolve is needed. 1346 */ 1347 return; 1348 } 1349 1350 struct gl_framebuffer *fb = drawable->driverPrivate; 1351 struct intel_renderbuffer *rb; 1352 1353 /* Usually, only the back buffer will need to be downsampled. However, 1354 * the front buffer will also need it if the user has rendered into it. 1355 */ 1356 static const gl_buffer_index buffers[2] = { 1357 BUFFER_BACK_LEFT, 1358 BUFFER_FRONT_LEFT, 1359 }; 1360 1361 for (int i = 0; i < 2; ++i) { 1362 rb = intel_get_renderbuffer(fb, buffers[i]); 1363 if (rb == NULL || rb->mt == NULL) 1364 continue; 1365 if (rb->mt->num_samples <= 1) 1366 intel_miptree_resolve_color(brw, rb->mt, 0); 1367 else 1368 intel_renderbuffer_downsample(brw, rb); 1369 } 1370} 1371 1372static unsigned 1373intel_bits_per_pixel(const struct intel_renderbuffer *rb) 1374{ 1375 return _mesa_get_format_bytes(intel_rb_format(rb)) * 8; 1376} 1377 1378static void 1379intel_query_dri2_buffers(struct brw_context *brw, 1380 __DRIdrawable *drawable, 1381 __DRIbuffer **buffers, 1382 int *count); 1383 1384static void 1385intel_process_dri2_buffer(struct brw_context *brw, 1386 __DRIdrawable *drawable, 1387 __DRIbuffer *buffer, 1388 struct intel_renderbuffer *rb, 1389 const char *buffer_name); 1390 1391static void 1392intel_update_image_buffers(struct brw_context *brw, __DRIdrawable *drawable); 1393 1394static void 1395intel_update_dri2_buffers(struct brw_context *brw, __DRIdrawable *drawable) 1396{ 1397 struct gl_framebuffer *fb = drawable->driverPrivate; 1398 struct intel_renderbuffer *rb; 1399 __DRIbuffer *buffers = NULL; 1400 int i, count; 1401 const char *region_name; 1402 1403 /* Set this up front, so that in case our buffers get invalidated 1404 * while we're getting new buffers, we don't clobber the stamp and 1405 * thus ignore the invalidate. */ 1406 drawable->lastStamp = drawable->dri2.stamp; 1407 1408 if (unlikely(INTEL_DEBUG & DEBUG_DRI)) 1409 fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable); 1410 1411 intel_query_dri2_buffers(brw, drawable, &buffers, &count); 1412 1413 if (buffers == NULL) 1414 return; 1415 1416 for (i = 0; i < count; i++) { 1417 switch (buffers[i].attachment) { 1418 case __DRI_BUFFER_FRONT_LEFT: 1419 rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT); 1420 region_name = "dri2 front buffer"; 1421 break; 1422 1423 case __DRI_BUFFER_FAKE_FRONT_LEFT: 1424 rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT); 1425 region_name = "dri2 fake front buffer"; 1426 break; 1427 1428 case __DRI_BUFFER_BACK_LEFT: 1429 rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT); 1430 region_name = "dri2 back buffer"; 1431 break; 1432 1433 case __DRI_BUFFER_DEPTH: 1434 case __DRI_BUFFER_HIZ: 1435 case __DRI_BUFFER_DEPTH_STENCIL: 1436 case __DRI_BUFFER_STENCIL: 1437 case __DRI_BUFFER_ACCUM: 1438 default: 1439 fprintf(stderr, 1440 "unhandled buffer attach event, attachment type %d\n", 1441 buffers[i].attachment); 1442 return; 1443 } 1444 1445 intel_process_dri2_buffer(brw, drawable, &buffers[i], rb, region_name); 1446 } 1447 1448} 1449 1450void 1451intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable) 1452{ 1453 struct brw_context *brw = context->driverPrivate; 1454 __DRIscreen *screen = brw->intelScreen->driScrnPriv; 1455 1456 /* Set this up front, so that in case our buffers get invalidated 1457 * while we're getting new buffers, we don't clobber the stamp and 1458 * thus ignore the invalidate. */ 1459 drawable->lastStamp = drawable->dri2.stamp; 1460 1461 if (unlikely(INTEL_DEBUG & DEBUG_DRI)) 1462 fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable); 1463 1464 if (screen->image.loader) 1465 intel_update_image_buffers(brw, drawable); 1466 else 1467 intel_update_dri2_buffers(brw, drawable); 1468 1469 driUpdateFramebufferSize(&brw->ctx, drawable); 1470} 1471 1472/** 1473 * intel_prepare_render should be called anywhere that curent read/drawbuffer 1474 * state is required. 1475 */ 1476void 1477intel_prepare_render(struct brw_context *brw) 1478{ 1479 struct gl_context *ctx = &brw->ctx; 1480 __DRIcontext *driContext = brw->driContext; 1481 __DRIdrawable *drawable; 1482 1483 drawable = driContext->driDrawablePriv; 1484 if (drawable && drawable->dri2.stamp != driContext->dri2.draw_stamp) { 1485 if (drawable->lastStamp != drawable->dri2.stamp) 1486 intel_update_renderbuffers(driContext, drawable); 1487 driContext->dri2.draw_stamp = drawable->dri2.stamp; 1488 } 1489 1490 drawable = driContext->driReadablePriv; 1491 if (drawable && drawable->dri2.stamp != driContext->dri2.read_stamp) { 1492 if (drawable->lastStamp != drawable->dri2.stamp) 1493 intel_update_renderbuffers(driContext, drawable); 1494 driContext->dri2.read_stamp = drawable->dri2.stamp; 1495 } 1496 1497 /* If we're currently rendering to the front buffer, the rendering 1498 * that will happen next will probably dirty the front buffer. So 1499 * mark it as dirty here. 1500 */ 1501 if (_mesa_is_front_buffer_drawing(ctx->DrawBuffer)) 1502 brw->front_buffer_dirty = true; 1503} 1504 1505/** 1506 * \brief Query DRI2 to obtain a DRIdrawable's buffers. 1507 * 1508 * To determine which DRI buffers to request, examine the renderbuffers 1509 * attached to the drawable's framebuffer. Then request the buffers with 1510 * DRI2GetBuffers() or DRI2GetBuffersWithFormat(). 1511 * 1512 * This is called from intel_update_renderbuffers(). 1513 * 1514 * \param drawable Drawable whose buffers are queried. 1515 * \param buffers [out] List of buffers returned by DRI2 query. 1516 * \param buffer_count [out] Number of buffers returned. 1517 * 1518 * \see intel_update_renderbuffers() 1519 * \see DRI2GetBuffers() 1520 * \see DRI2GetBuffersWithFormat() 1521 */ 1522static void 1523intel_query_dri2_buffers(struct brw_context *brw, 1524 __DRIdrawable *drawable, 1525 __DRIbuffer **buffers, 1526 int *buffer_count) 1527{ 1528 __DRIscreen *screen = brw->intelScreen->driScrnPriv; 1529 struct gl_framebuffer *fb = drawable->driverPrivate; 1530 int i = 0; 1531 unsigned attachments[8]; 1532 1533 struct intel_renderbuffer *front_rb; 1534 struct intel_renderbuffer *back_rb; 1535 1536 front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT); 1537 back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT); 1538 1539 memset(attachments, 0, sizeof(attachments)); 1540 if ((_mesa_is_front_buffer_drawing(fb) || 1541 _mesa_is_front_buffer_reading(fb) || 1542 !back_rb) && front_rb) { 1543 /* If a fake front buffer is in use, then querying for 1544 * __DRI_BUFFER_FRONT_LEFT will cause the server to copy the image from 1545 * the real front buffer to the fake front buffer. So before doing the 1546 * query, we need to make sure all the pending drawing has landed in the 1547 * real front buffer. 1548 */ 1549 intel_batchbuffer_flush(brw); 1550 intel_flush_front(&brw->ctx); 1551 1552 attachments[i++] = __DRI_BUFFER_FRONT_LEFT; 1553 attachments[i++] = intel_bits_per_pixel(front_rb); 1554 } else if (front_rb && brw->front_buffer_dirty) { 1555 /* We have pending front buffer rendering, but we aren't querying for a 1556 * front buffer. If the front buffer we have is a fake front buffer, 1557 * the X server is going to throw it away when it processes the query. 1558 * So before doing the query, make sure all the pending drawing has 1559 * landed in the real front buffer. 1560 */ 1561 intel_batchbuffer_flush(brw); 1562 intel_flush_front(&brw->ctx); 1563 } 1564 1565 if (back_rb) { 1566 attachments[i++] = __DRI_BUFFER_BACK_LEFT; 1567 attachments[i++] = intel_bits_per_pixel(back_rb); 1568 } 1569 1570 assert(i <= ARRAY_SIZE(attachments)); 1571 1572 *buffers = screen->dri2.loader->getBuffersWithFormat(drawable, 1573 &drawable->w, 1574 &drawable->h, 1575 attachments, i / 2, 1576 buffer_count, 1577 drawable->loaderPrivate); 1578} 1579 1580/** 1581 * \brief Assign a DRI buffer's DRM region to a renderbuffer. 1582 * 1583 * This is called from intel_update_renderbuffers(). 1584 * 1585 * \par Note: 1586 * DRI buffers whose attachment point is DRI2BufferStencil or 1587 * DRI2BufferDepthStencil are handled as special cases. 1588 * 1589 * \param buffer_name is a human readable name, such as "dri2 front buffer", 1590 * that is passed to drm_intel_bo_gem_create_from_name(). 1591 * 1592 * \see intel_update_renderbuffers() 1593 */ 1594static void 1595intel_process_dri2_buffer(struct brw_context *brw, 1596 __DRIdrawable *drawable, 1597 __DRIbuffer *buffer, 1598 struct intel_renderbuffer *rb, 1599 const char *buffer_name) 1600{ 1601 struct gl_framebuffer *fb = drawable->driverPrivate; 1602 drm_intel_bo *bo; 1603 1604 if (!rb) 1605 return; 1606 1607 unsigned num_samples = rb->Base.Base.NumSamples; 1608 1609 /* We try to avoid closing and reopening the same BO name, because the first 1610 * use of a mapping of the buffer involves a bunch of page faulting which is 1611 * moderately expensive. 1612 */ 1613 struct intel_mipmap_tree *last_mt; 1614 if (num_samples == 0) 1615 last_mt = rb->mt; 1616 else 1617 last_mt = rb->singlesample_mt; 1618 1619 uint32_t old_name = 0; 1620 if (last_mt) { 1621 /* The bo already has a name because the miptree was created by a 1622 * previous call to intel_process_dri2_buffer(). If a bo already has a 1623 * name, then drm_intel_bo_flink() is a low-cost getter. It does not 1624 * create a new name. 1625 */ 1626 drm_intel_bo_flink(last_mt->bo, &old_name); 1627 } 1628 1629 if (old_name == buffer->name) 1630 return; 1631 1632 if (unlikely(INTEL_DEBUG & DEBUG_DRI)) { 1633 fprintf(stderr, 1634 "attaching buffer %d, at %d, cpp %d, pitch %d\n", 1635 buffer->name, buffer->attachment, 1636 buffer->cpp, buffer->pitch); 1637 } 1638 1639 bo = drm_intel_bo_gem_create_from_name(brw->bufmgr, buffer_name, 1640 buffer->name); 1641 if (!bo) { 1642 fprintf(stderr, 1643 "Failed to open BO for returned DRI2 buffer " 1644 "(%dx%d, %s, named %d).\n" 1645 "This is likely a bug in the X Server that will lead to a " 1646 "crash soon.\n", 1647 drawable->w, drawable->h, buffer_name, buffer->name); 1648 return; 1649 } 1650 1651 intel_update_winsys_renderbuffer_miptree(brw, rb, bo, 1652 drawable->w, drawable->h, 1653 buffer->pitch); 1654 1655 if (_mesa_is_front_buffer_drawing(fb) && 1656 (buffer->attachment == __DRI_BUFFER_FRONT_LEFT || 1657 buffer->attachment == __DRI_BUFFER_FAKE_FRONT_LEFT) && 1658 rb->Base.Base.NumSamples > 1) { 1659 intel_renderbuffer_upsample(brw, rb); 1660 } 1661 1662 assert(rb->mt); 1663 1664 drm_intel_bo_unreference(bo); 1665} 1666 1667/** 1668 * \brief Query DRI image loader to obtain a DRIdrawable's buffers. 1669 * 1670 * To determine which DRI buffers to request, examine the renderbuffers 1671 * attached to the drawable's framebuffer. Then request the buffers from 1672 * the image loader 1673 * 1674 * This is called from intel_update_renderbuffers(). 1675 * 1676 * \param drawable Drawable whose buffers are queried. 1677 * \param buffers [out] List of buffers returned by DRI2 query. 1678 * \param buffer_count [out] Number of buffers returned. 1679 * 1680 * \see intel_update_renderbuffers() 1681 */ 1682 1683static void 1684intel_update_image_buffer(struct brw_context *intel, 1685 __DRIdrawable *drawable, 1686 struct intel_renderbuffer *rb, 1687 __DRIimage *buffer, 1688 enum __DRIimageBufferMask buffer_type) 1689{ 1690 struct gl_framebuffer *fb = drawable->driverPrivate; 1691 1692 if (!rb || !buffer->bo) 1693 return; 1694 1695 unsigned num_samples = rb->Base.Base.NumSamples; 1696 1697 /* Check and see if we're already bound to the right 1698 * buffer object 1699 */ 1700 struct intel_mipmap_tree *last_mt; 1701 if (num_samples == 0) 1702 last_mt = rb->mt; 1703 else 1704 last_mt = rb->singlesample_mt; 1705 1706 if (last_mt && last_mt->bo == buffer->bo) 1707 return; 1708 1709 intel_update_winsys_renderbuffer_miptree(intel, rb, buffer->bo, 1710 buffer->width, buffer->height, 1711 buffer->pitch); 1712 1713 if (_mesa_is_front_buffer_drawing(fb) && 1714 buffer_type == __DRI_IMAGE_BUFFER_FRONT && 1715 rb->Base.Base.NumSamples > 1) { 1716 intel_renderbuffer_upsample(intel, rb); 1717 } 1718} 1719 1720static void 1721intel_update_image_buffers(struct brw_context *brw, __DRIdrawable *drawable) 1722{ 1723 struct gl_framebuffer *fb = drawable->driverPrivate; 1724 __DRIscreen *screen = brw->intelScreen->driScrnPriv; 1725 struct intel_renderbuffer *front_rb; 1726 struct intel_renderbuffer *back_rb; 1727 struct __DRIimageList images; 1728 unsigned int format; 1729 uint32_t buffer_mask = 0; 1730 int ret; 1731 1732 front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT); 1733 back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT); 1734 1735 if (back_rb) 1736 format = intel_rb_format(back_rb); 1737 else if (front_rb) 1738 format = intel_rb_format(front_rb); 1739 else 1740 return; 1741 1742 if (front_rb && (_mesa_is_front_buffer_drawing(fb) || 1743 _mesa_is_front_buffer_reading(fb) || !back_rb)) { 1744 buffer_mask |= __DRI_IMAGE_BUFFER_FRONT; 1745 } 1746 1747 if (back_rb) 1748 buffer_mask |= __DRI_IMAGE_BUFFER_BACK; 1749 1750 ret = screen->image.loader->getBuffers(drawable, 1751 driGLFormatToImageFormat(format), 1752 &drawable->dri2.stamp, 1753 drawable->loaderPrivate, 1754 buffer_mask, 1755 &images); 1756 if (!ret) 1757 return; 1758 1759 if (images.image_mask & __DRI_IMAGE_BUFFER_FRONT) { 1760 drawable->w = images.front->width; 1761 drawable->h = images.front->height; 1762 intel_update_image_buffer(brw, 1763 drawable, 1764 front_rb, 1765 images.front, 1766 __DRI_IMAGE_BUFFER_FRONT); 1767 } 1768 if (images.image_mask & __DRI_IMAGE_BUFFER_BACK) { 1769 drawable->w = images.back->width; 1770 drawable->h = images.back->height; 1771 intel_update_image_buffer(brw, 1772 drawable, 1773 back_rb, 1774 images.back, 1775 __DRI_IMAGE_BUFFER_BACK); 1776 } 1777} 1778