brw_context.c revision 3423488d55b9c483fcdb3996eb89b424c1031d24
1/*
2 Copyright 2003 VMware, Inc.
3 Copyright (C) Intel Corp.  2006.  All Rights Reserved.
4 Intel funded Tungsten Graphics to
5 develop this 3D driver.
6
7 Permission is hereby granted, free of charge, to any person obtaining
8 a copy of this software and associated documentation files (the
9 "Software"), to deal in the Software without restriction, including
10 without limitation the rights to use, copy, modify, merge, publish,
11 distribute, sublicense, and/or sell copies of the Software, and to
12 permit persons to whom the Software is furnished to do so, subject to
13 the following conditions:
14
15 The above copyright notice and this permission notice (including the
16 next paragraph) shall be included in all copies or substantial
17 portions of the Software.
18
19 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
20 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
22 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
23 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
24 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
25 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26
27 **********************************************************************/
28 /*
29  * Authors:
30  *   Keith Whitwell <keithw@vmware.com>
31  */
32
33
34#include "compiler/nir/nir.h"
35#include "main/api_exec.h"
36#include "main/context.h"
37#include "main/fbobject.h"
38#include "main/extensions.h"
39#include "main/imports.h"
40#include "main/macros.h"
41#include "main/points.h"
42#include "main/version.h"
43#include "main/vtxfmt.h"
44#include "main/texobj.h"
45#include "main/framebuffer.h"
46
47#include "vbo/vbo_context.h"
48
49#include "drivers/common/driverfuncs.h"
50#include "drivers/common/meta.h"
51#include "utils.h"
52
53#include "brw_context.h"
54#include "brw_defines.h"
55#include "brw_blorp.h"
56#include "brw_compiler.h"
57#include "brw_draw.h"
58#include "brw_state.h"
59
60#include "intel_batchbuffer.h"
61#include "intel_buffer_objects.h"
62#include "intel_buffers.h"
63#include "intel_fbo.h"
64#include "intel_mipmap_tree.h"
65#include "intel_pixel.h"
66#include "intel_image.h"
67#include "intel_tex.h"
68#include "intel_tex_obj.h"
69
70#include "swrast_setup/swrast_setup.h"
71#include "tnl/tnl.h"
72#include "tnl/t_pipeline.h"
73#include "util/ralloc.h"
74#include "util/debug.h"
75#include "isl/isl.h"
76
77/***************************************
78 * Mesa's Driver Functions
79 ***************************************/
80
81const char *const brw_vendor_string = "Intel Open Source Technology Center";
82
83static const char *
84get_bsw_model(const struct intel_screen *screen)
85{
86   switch (screen->eu_total) {
87   case 16:
88      return "405";
89   case 12:
90      return "400";
91   default:
92      return "   ";
93   }
94}
95
96const char *
97brw_get_renderer_string(const struct intel_screen *screen)
98{
99   const char *chipset;
100   static char buffer[128];
101   char *bsw = NULL;
102
103   switch (screen->deviceID) {
104#undef CHIPSET
105#define CHIPSET(id, symbol, str) case id: chipset = str; break;
106#include "pci_ids/i965_pci_ids.h"
107   default:
108      chipset = "Unknown Intel Chipset";
109      break;
110   }
111
112   /* Braswell branding is funny, so we have to fix it up here */
113   if (screen->deviceID == 0x22B1) {
114      bsw = strdup(chipset);
115      char *needle = strstr(bsw, "XXX");
116      if (needle) {
117         memcpy(needle, get_bsw_model(screen), 3);
118         chipset = bsw;
119      }
120   }
121
122   (void) driGetRendererString(buffer, chipset, 0);
123   free(bsw);
124   return buffer;
125}
126
127static const GLubyte *
128intel_get_string(struct gl_context * ctx, GLenum name)
129{
130   const struct brw_context *const brw = brw_context(ctx);
131
132   switch (name) {
133   case GL_VENDOR:
134      return (GLubyte *) brw_vendor_string;
135
136   case GL_RENDERER:
137      return
138         (GLubyte *) brw_get_renderer_string(brw->screen);
139
140   default:
141      return NULL;
142   }
143}
144
145static void
146intel_viewport(struct gl_context *ctx)
147{
148   struct brw_context *brw = brw_context(ctx);
149   __DRIcontext *driContext = brw->driContext;
150
151   if (_mesa_is_winsys_fbo(ctx->DrawBuffer)) {
152      if (driContext->driDrawablePriv)
153         dri2InvalidateDrawable(driContext->driDrawablePriv);
154      if (driContext->driReadablePriv)
155         dri2InvalidateDrawable(driContext->driReadablePriv);
156   }
157}
158
159static void
160intel_update_framebuffer(struct gl_context *ctx,
161                         struct gl_framebuffer *fb)
162{
163   struct brw_context *brw = brw_context(ctx);
164
165   /* Quantize the derived default number of samples
166    */
167   fb->DefaultGeometry._NumSamples =
168      intel_quantize_num_samples(brw->screen,
169                                 fb->DefaultGeometry.NumSamples);
170}
171
172static bool
173intel_disable_rb_aux_buffer(struct brw_context *brw, const drm_intel_bo *bo)
174{
175   const struct gl_framebuffer *fb = brw->ctx.DrawBuffer;
176   bool found = false;
177
178   for (unsigned i = 0; i < fb->_NumColorDrawBuffers; i++) {
179      const struct intel_renderbuffer *irb =
180         intel_renderbuffer(fb->_ColorDrawBuffers[i]);
181
182      if (irb && irb->mt->bo == bo) {
183         found = brw->draw_aux_buffer_disabled[i] = true;
184      }
185   }
186
187   return found;
188}
189
190/* On Gen9 color buffers may be compressed by the hardware (lossless
191 * compression). There are, however, format restrictions and care needs to be
192 * taken that the sampler engine is capable for re-interpreting a buffer with
193 * format different the buffer was originally written with.
194 *
195 * For example, SRGB formats are not compressible and the sampler engine isn't
196 * capable of treating RGBA_UNORM as SRGB_ALPHA. In such a case the underlying
197 * color buffer needs to be resolved so that the sampling surface can be
198 * sampled as non-compressed (i.e., without the auxiliary MCS buffer being
199 * set).
200 */
201static bool
202intel_texture_view_requires_resolve(struct brw_context *brw,
203                                    struct intel_texture_object *intel_tex)
204{
205   if (brw->gen < 9 ||
206       !intel_miptree_is_lossless_compressed(brw, intel_tex->mt))
207     return false;
208
209   const uint32_t brw_format = brw_format_for_mesa_format(intel_tex->_Format);
210
211   if (isl_format_supports_lossless_compression(&brw->screen->devinfo,
212                                                brw_format))
213      return false;
214
215   perf_debug("Incompatible sampling format (%s) for rbc (%s)\n",
216              _mesa_get_format_name(intel_tex->_Format),
217              _mesa_get_format_name(intel_tex->mt->format));
218
219   if (intel_disable_rb_aux_buffer(brw, intel_tex->mt->bo))
220      perf_debug("Sampling renderbuffer with non-compressible format - "
221                 "turning off compression");
222
223   return true;
224}
225
226static void
227intel_update_state(struct gl_context * ctx, GLuint new_state)
228{
229   struct brw_context *brw = brw_context(ctx);
230   struct intel_texture_object *tex_obj;
231   struct intel_renderbuffer *depth_irb;
232
233   if (ctx->swrast_context)
234      _swrast_InvalidateState(ctx, new_state);
235   _vbo_InvalidateState(ctx, new_state);
236
237   brw->NewGLState |= new_state;
238
239   _mesa_unlock_context_textures(ctx);
240
241   /* Resolve the depth buffer's HiZ buffer. */
242   depth_irb = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_DEPTH);
243   if (depth_irb)
244      intel_renderbuffer_resolve_hiz(brw, depth_irb);
245
246   memset(brw->draw_aux_buffer_disabled, 0,
247          sizeof(brw->draw_aux_buffer_disabled));
248
249   /* Resolve depth buffer and render cache of each enabled texture. */
250   int maxEnabledUnit = ctx->Texture._MaxEnabledTexImageUnit;
251   for (int i = 0; i <= maxEnabledUnit; i++) {
252      if (!ctx->Texture.Unit[i]._Current)
253	 continue;
254      tex_obj = intel_texture_object(ctx->Texture.Unit[i]._Current);
255      if (!tex_obj || !tex_obj->mt)
256	 continue;
257      intel_miptree_all_slices_resolve_depth(brw, tex_obj->mt);
258      /* Sampling engine understands lossless compression and resolving
259       * those surfaces should be skipped for performance reasons.
260       */
261      const int flags = intel_texture_view_requires_resolve(brw, tex_obj) ?
262                           0 : INTEL_MIPTREE_IGNORE_CCS_E;
263      intel_miptree_resolve_color(brw, tex_obj->mt, flags);
264      brw_render_cache_set_check_flush(brw, tex_obj->mt->bo);
265
266      if (tex_obj->base.StencilSampling ||
267          tex_obj->mt->format == MESA_FORMAT_S_UINT8) {
268         intel_update_r8stencil(brw, tex_obj->mt);
269      }
270   }
271
272   /* Resolve color for each active shader image. */
273   for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
274      const struct gl_linked_shader *shader =
275         ctx->_Shader->CurrentProgram[i] ?
276            ctx->_Shader->CurrentProgram[i]->_LinkedShaders[i] : NULL;
277
278      if (unlikely(shader && shader->NumImages)) {
279         for (unsigned j = 0; j < shader->NumImages; j++) {
280            struct gl_image_unit *u = &ctx->ImageUnits[shader->ImageUnits[j]];
281            tex_obj = intel_texture_object(u->TexObj);
282
283            if (tex_obj && tex_obj->mt) {
284               /* Access to images is implemented using indirect messages
285                * against data port. Normal render target write understands
286                * lossless compression but unfortunately the typed/untyped
287                * read/write interface doesn't. Therefore even lossless
288                * compressed surfaces need to be resolved prior to accessing
289                * them. Hence skip setting INTEL_MIPTREE_IGNORE_CCS_E.
290                */
291               intel_miptree_resolve_color(brw, tex_obj->mt, 0);
292
293               if (intel_miptree_is_lossless_compressed(brw, tex_obj->mt) &&
294                   intel_disable_rb_aux_buffer(brw, tex_obj->mt->bo)) {
295                  perf_debug("Using renderbuffer as shader image - turning "
296                             "off lossless compression");
297               }
298
299               brw_render_cache_set_check_flush(brw, tex_obj->mt->bo);
300            }
301         }
302      }
303   }
304
305   /* Resolve color buffers for non-coherent framebuffer fetch. */
306   if (!ctx->Extensions.MESA_shader_framebuffer_fetch &&
307       ctx->FragmentProgram._Current &&
308       ctx->FragmentProgram._Current->info.outputs_read) {
309      const struct gl_framebuffer *fb = ctx->DrawBuffer;
310
311      for (unsigned i = 0; i < fb->_NumColorDrawBuffers; i++) {
312         const struct intel_renderbuffer *irb =
313            intel_renderbuffer(fb->_ColorDrawBuffers[i]);
314
315         if (irb &&
316             intel_miptree_resolve_color(brw, irb->mt,
317                                         INTEL_MIPTREE_IGNORE_CCS_E))
318            brw_render_cache_set_check_flush(brw, irb->mt->bo);
319      }
320   }
321
322   /* If FRAMEBUFFER_SRGB is used on Gen9+ then we need to resolve any of the
323    * single-sampled color renderbuffers because the CCS buffer isn't
324    * supported for SRGB formats. This only matters if FRAMEBUFFER_SRGB is
325    * enabled because otherwise the surface state will be programmed with the
326    * linear equivalent format anyway.
327    */
328   if (brw->gen >= 9 && ctx->Color.sRGBEnabled) {
329      struct gl_framebuffer *fb = ctx->DrawBuffer;
330      for (int i = 0; i < fb->_NumColorDrawBuffers; i++) {
331         struct gl_renderbuffer *rb = fb->_ColorDrawBuffers[i];
332
333         if (rb == NULL)
334            continue;
335
336         struct intel_renderbuffer *irb = intel_renderbuffer(rb);
337         struct intel_mipmap_tree *mt = irb->mt;
338
339         if (mt == NULL ||
340             mt->num_samples > 1 ||
341             _mesa_get_srgb_format_linear(mt->format) == mt->format)
342               continue;
343
344         /* Lossless compression is not supported for SRGB formats, it
345          * should be impossible to get here with such surfaces.
346          */
347         assert(!intel_miptree_is_lossless_compressed(brw, mt));
348         intel_miptree_resolve_color(brw, mt, 0);
349         brw_render_cache_set_check_flush(brw, mt->bo);
350      }
351   }
352
353   _mesa_lock_context_textures(ctx);
354
355   if (new_state & _NEW_BUFFERS) {
356      intel_update_framebuffer(ctx, ctx->DrawBuffer);
357      if (ctx->DrawBuffer != ctx->ReadBuffer)
358         intel_update_framebuffer(ctx, ctx->ReadBuffer);
359   }
360}
361
362#define flushFront(screen)      ((screen)->image.loader ? (screen)->image.loader->flushFrontBuffer : (screen)->dri2.loader->flushFrontBuffer)
363
364static void
365intel_flush_front(struct gl_context *ctx)
366{
367   struct brw_context *brw = brw_context(ctx);
368   __DRIcontext *driContext = brw->driContext;
369   __DRIdrawable *driDrawable = driContext->driDrawablePriv;
370   __DRIscreen *const dri_screen = brw->screen->driScrnPriv;
371
372   if (brw->front_buffer_dirty && _mesa_is_winsys_fbo(ctx->DrawBuffer)) {
373      if (flushFront(dri_screen) && driDrawable &&
374          driDrawable->loaderPrivate) {
375
376         /* Resolve before flushing FAKE_FRONT_LEFT to FRONT_LEFT.
377          *
378          * This potentially resolves both front and back buffer. It
379          * is unnecessary to resolve the back, but harms nothing except
380          * performance. And no one cares about front-buffer render
381          * performance.
382          */
383         intel_resolve_for_dri2_flush(brw, driDrawable);
384         intel_batchbuffer_flush(brw);
385
386         flushFront(dri_screen)(driDrawable, driDrawable->loaderPrivate);
387
388         /* We set the dirty bit in intel_prepare_render() if we're
389          * front buffer rendering once we get there.
390          */
391         brw->front_buffer_dirty = false;
392      }
393   }
394}
395
396static void
397intel_glFlush(struct gl_context *ctx)
398{
399   struct brw_context *brw = brw_context(ctx);
400
401   intel_batchbuffer_flush(brw);
402   intel_flush_front(ctx);
403
404   brw->need_flush_throttle = true;
405}
406
407static void
408intel_finish(struct gl_context * ctx)
409{
410   struct brw_context *brw = brw_context(ctx);
411
412   intel_glFlush(ctx);
413
414   if (brw->batch.last_bo)
415      drm_intel_bo_wait_rendering(brw->batch.last_bo);
416}
417
418static void
419brw_init_driver_functions(struct brw_context *brw,
420                          struct dd_function_table *functions)
421{
422   _mesa_init_driver_functions(functions);
423
424   /* GLX uses DRI2 invalidate events to handle window resizing.
425    * Unfortunately, EGL does not - libEGL is written in XCB (not Xlib),
426    * which doesn't provide a mechanism for snooping the event queues.
427    *
428    * So EGL still relies on viewport hacks to handle window resizing.
429    * This should go away with DRI3000.
430    */
431   if (!brw->driContext->driScreenPriv->dri2.useInvalidate)
432      functions->Viewport = intel_viewport;
433
434   functions->Flush = intel_glFlush;
435   functions->Finish = intel_finish;
436   functions->GetString = intel_get_string;
437   functions->UpdateState = intel_update_state;
438
439   intelInitTextureFuncs(functions);
440   intelInitTextureImageFuncs(functions);
441   intelInitTextureSubImageFuncs(functions);
442   intelInitTextureCopyImageFuncs(functions);
443   intelInitCopyImageFuncs(functions);
444   intelInitClearFuncs(functions);
445   intelInitBufferFuncs(functions);
446   intelInitPixelFuncs(functions);
447   intelInitBufferObjectFuncs(functions);
448   brw_init_syncobj_functions(functions);
449   brw_init_object_purgeable_functions(functions);
450
451   brwInitFragProgFuncs( functions );
452   brw_init_common_queryobj_functions(functions);
453   if (brw->gen >= 8 || brw->is_haswell)
454      hsw_init_queryobj_functions(functions);
455   else if (brw->gen >= 6)
456      gen6_init_queryobj_functions(functions);
457   else
458      gen4_init_queryobj_functions(functions);
459   brw_init_compute_functions(functions);
460   if (brw->gen >= 7)
461      brw_init_conditional_render_functions(functions);
462
463   functions->QueryInternalFormat = brw_query_internal_format;
464
465   functions->NewTransformFeedback = brw_new_transform_feedback;
466   functions->DeleteTransformFeedback = brw_delete_transform_feedback;
467   if (brw->screen->has_mi_math_and_lrr) {
468      functions->BeginTransformFeedback = hsw_begin_transform_feedback;
469      functions->EndTransformFeedback = hsw_end_transform_feedback;
470      functions->PauseTransformFeedback = hsw_pause_transform_feedback;
471      functions->ResumeTransformFeedback = hsw_resume_transform_feedback;
472   } else if (brw->gen >= 7) {
473      functions->BeginTransformFeedback = gen7_begin_transform_feedback;
474      functions->EndTransformFeedback = gen7_end_transform_feedback;
475      functions->PauseTransformFeedback = gen7_pause_transform_feedback;
476      functions->ResumeTransformFeedback = gen7_resume_transform_feedback;
477      functions->GetTransformFeedbackVertexCount =
478         brw_get_transform_feedback_vertex_count;
479   } else {
480      functions->BeginTransformFeedback = brw_begin_transform_feedback;
481      functions->EndTransformFeedback = brw_end_transform_feedback;
482   }
483
484   if (brw->gen >= 6)
485      functions->GetSamplePosition = gen6_get_sample_position;
486}
487
488static void
489brw_initialize_context_constants(struct brw_context *brw)
490{
491   struct gl_context *ctx = &brw->ctx;
492   const struct brw_compiler *compiler = brw->screen->compiler;
493
494   const bool stage_exists[MESA_SHADER_STAGES] = {
495      [MESA_SHADER_VERTEX] = true,
496      [MESA_SHADER_TESS_CTRL] = brw->gen >= 7,
497      [MESA_SHADER_TESS_EVAL] = brw->gen >= 7,
498      [MESA_SHADER_GEOMETRY] = brw->gen >= 6,
499      [MESA_SHADER_FRAGMENT] = true,
500      [MESA_SHADER_COMPUTE] =
501         (ctx->API == API_OPENGL_CORE &&
502          ctx->Const.MaxComputeWorkGroupSize[0] >= 1024) ||
503         (ctx->API == API_OPENGLES2 &&
504          ctx->Const.MaxComputeWorkGroupSize[0] >= 128) ||
505         _mesa_extension_override_enables.ARB_compute_shader,
506   };
507
508   unsigned num_stages = 0;
509   for (int i = 0; i < MESA_SHADER_STAGES; i++) {
510      if (stage_exists[i])
511         num_stages++;
512   }
513
514   unsigned max_samplers =
515      brw->gen >= 8 || brw->is_haswell ? BRW_MAX_TEX_UNIT : 16;
516
517   ctx->Const.MaxDualSourceDrawBuffers = 1;
518   ctx->Const.MaxDrawBuffers = BRW_MAX_DRAW_BUFFERS;
519   ctx->Const.MaxCombinedShaderOutputResources =
520      MAX_IMAGE_UNITS + BRW_MAX_DRAW_BUFFERS;
521
522   ctx->Const.QueryCounterBits.Timestamp = 36;
523
524   ctx->Const.MaxTextureCoordUnits = 8; /* Mesa limit */
525   ctx->Const.MaxImageUnits = MAX_IMAGE_UNITS;
526   ctx->Const.MaxRenderbufferSize = 8192;
527   ctx->Const.MaxTextureLevels = MIN2(14 /* 8192 */, MAX_TEXTURE_LEVELS);
528   ctx->Const.Max3DTextureLevels = 12; /* 2048 */
529   ctx->Const.MaxCubeTextureLevels = 14; /* 8192 */
530   ctx->Const.MaxArrayTextureLayers = brw->gen >= 7 ? 2048 : 512;
531   ctx->Const.MaxTextureMbytes = 1536;
532   ctx->Const.MaxTextureRectSize = 1 << 12;
533   ctx->Const.MaxTextureMaxAnisotropy = 16.0;
534   ctx->Const.StripTextureBorder = true;
535   if (brw->gen >= 7)
536      ctx->Const.MaxProgramTextureGatherComponents = 4;
537   else if (brw->gen == 6)
538      ctx->Const.MaxProgramTextureGatherComponents = 1;
539
540   ctx->Const.MaxUniformBlockSize = 65536;
541
542   for (int i = 0; i < MESA_SHADER_STAGES; i++) {
543      struct gl_program_constants *prog = &ctx->Const.Program[i];
544
545      if (!stage_exists[i])
546         continue;
547
548      prog->MaxTextureImageUnits = max_samplers;
549
550      prog->MaxUniformBlocks = BRW_MAX_UBO;
551      prog->MaxCombinedUniformComponents =
552         prog->MaxUniformComponents +
553         ctx->Const.MaxUniformBlockSize / 4 * prog->MaxUniformBlocks;
554
555      prog->MaxAtomicCounters = MAX_ATOMIC_COUNTERS;
556      prog->MaxAtomicBuffers = BRW_MAX_ABO;
557      prog->MaxImageUniforms = compiler->scalar_stage[i] ? BRW_MAX_IMAGES : 0;
558      prog->MaxShaderStorageBlocks = BRW_MAX_SSBO;
559   }
560
561   ctx->Const.MaxTextureUnits =
562      MIN2(ctx->Const.MaxTextureCoordUnits,
563           ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits);
564
565   ctx->Const.MaxUniformBufferBindings = num_stages * BRW_MAX_UBO;
566   ctx->Const.MaxCombinedUniformBlocks = num_stages * BRW_MAX_UBO;
567   ctx->Const.MaxCombinedAtomicBuffers = num_stages * BRW_MAX_ABO;
568   ctx->Const.MaxCombinedShaderStorageBlocks = num_stages * BRW_MAX_SSBO;
569   ctx->Const.MaxShaderStorageBufferBindings = num_stages * BRW_MAX_SSBO;
570   ctx->Const.MaxCombinedTextureImageUnits = num_stages * max_samplers;
571   ctx->Const.MaxCombinedImageUniforms = num_stages * BRW_MAX_IMAGES;
572
573
574   /* Hardware only supports a limited number of transform feedback buffers.
575    * So we need to override the Mesa default (which is based only on software
576    * limits).
577    */
578   ctx->Const.MaxTransformFeedbackBuffers = BRW_MAX_SOL_BUFFERS;
579
580   /* On Gen6, in the worst case, we use up one binding table entry per
581    * transform feedback component (see comments above the definition of
582    * BRW_MAX_SOL_BINDINGS, in brw_context.h), so we need to advertise a value
583    * for MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS equal to
584    * BRW_MAX_SOL_BINDINGS.
585    *
586    * In "separate components" mode, we need to divide this value by
587    * BRW_MAX_SOL_BUFFERS, so that the total number of binding table entries
588    * used up by all buffers will not exceed BRW_MAX_SOL_BINDINGS.
589    */
590   ctx->Const.MaxTransformFeedbackInterleavedComponents = BRW_MAX_SOL_BINDINGS;
591   ctx->Const.MaxTransformFeedbackSeparateComponents =
592      BRW_MAX_SOL_BINDINGS / BRW_MAX_SOL_BUFFERS;
593
594   ctx->Const.AlwaysUseGetTransformFeedbackVertexCount =
595      !brw->screen->has_mi_math_and_lrr;
596
597   int max_samples;
598   const int *msaa_modes = intel_supported_msaa_modes(brw->screen);
599   const int clamp_max_samples =
600      driQueryOptioni(&brw->optionCache, "clamp_max_samples");
601
602   if (clamp_max_samples < 0) {
603      max_samples = msaa_modes[0];
604   } else {
605      /* Select the largest supported MSAA mode that does not exceed
606       * clamp_max_samples.
607       */
608      max_samples = 0;
609      for (int i = 0; msaa_modes[i] != 0; ++i) {
610         if (msaa_modes[i] <= clamp_max_samples) {
611            max_samples = msaa_modes[i];
612            break;
613         }
614      }
615   }
616
617   ctx->Const.MaxSamples = max_samples;
618   ctx->Const.MaxColorTextureSamples = max_samples;
619   ctx->Const.MaxDepthTextureSamples = max_samples;
620   ctx->Const.MaxIntegerSamples = max_samples;
621   ctx->Const.MaxImageSamples = 0;
622
623   /* gen6_set_sample_maps() sets SampleMap{2,4,8}x variables which are used
624    * to map indices of rectangular grid to sample numbers within a pixel.
625    * These variables are used by GL_EXT_framebuffer_multisample_blit_scaled
626    * extension implementation. For more details see the comment above
627    * gen6_set_sample_maps() definition.
628    */
629   gen6_set_sample_maps(ctx);
630
631   ctx->Const.MinLineWidth = 1.0;
632   ctx->Const.MinLineWidthAA = 1.0;
633   if (brw->gen >= 6) {
634      ctx->Const.MaxLineWidth = 7.375;
635      ctx->Const.MaxLineWidthAA = 7.375;
636      ctx->Const.LineWidthGranularity = 0.125;
637   } else {
638      ctx->Const.MaxLineWidth = 7.0;
639      ctx->Const.MaxLineWidthAA = 7.0;
640      ctx->Const.LineWidthGranularity = 0.5;
641   }
642
643   /* For non-antialiased lines, we have to round the line width to the
644    * nearest whole number. Make sure that we don't advertise a line
645    * width that, when rounded, will be beyond the actual hardware
646    * maximum.
647    */
648   assert(roundf(ctx->Const.MaxLineWidth) <= ctx->Const.MaxLineWidth);
649
650   ctx->Const.MinPointSize = 1.0;
651   ctx->Const.MinPointSizeAA = 1.0;
652   ctx->Const.MaxPointSize = 255.0;
653   ctx->Const.MaxPointSizeAA = 255.0;
654   ctx->Const.PointSizeGranularity = 1.0;
655
656   if (brw->gen >= 5 || brw->is_g4x)
657      ctx->Const.MaxClipPlanes = 8;
658
659   ctx->Const.LowerTessLevel = true;
660   ctx->Const.LowerTCSPatchVerticesIn = brw->gen >= 8;
661   ctx->Const.LowerTESPatchVerticesIn = true;
662   ctx->Const.PrimitiveRestartForPatches = true;
663
664   ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeInstructions = 16 * 1024;
665   ctx->Const.Program[MESA_SHADER_VERTEX].MaxAluInstructions = 0;
666   ctx->Const.Program[MESA_SHADER_VERTEX].MaxTexInstructions = 0;
667   ctx->Const.Program[MESA_SHADER_VERTEX].MaxTexIndirections = 0;
668   ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAluInstructions = 0;
669   ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTexInstructions = 0;
670   ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTexIndirections = 0;
671   ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAttribs = 16;
672   ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTemps = 256;
673   ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAddressRegs = 1;
674   ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeParameters = 1024;
675   ctx->Const.Program[MESA_SHADER_VERTEX].MaxEnvParams =
676      MIN2(ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeParameters,
677	   ctx->Const.Program[MESA_SHADER_VERTEX].MaxEnvParams);
678
679   ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeInstructions = 1024;
680   ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAluInstructions = 1024;
681   ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTexInstructions = 1024;
682   ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTexIndirections = 1024;
683   ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAttribs = 12;
684   ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTemps = 256;
685   ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAddressRegs = 0;
686   ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeParameters = 1024;
687   ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxEnvParams =
688      MIN2(ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeParameters,
689	   ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxEnvParams);
690
691   /* Fragment shaders use real, 32-bit twos-complement integers for all
692    * integer types.
693    */
694   ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.RangeMin = 31;
695   ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.RangeMax = 30;
696   ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.Precision = 0;
697   ctx->Const.Program[MESA_SHADER_FRAGMENT].HighInt = ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt;
698   ctx->Const.Program[MESA_SHADER_FRAGMENT].MediumInt = ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt;
699
700   ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.RangeMin = 31;
701   ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.RangeMax = 30;
702   ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.Precision = 0;
703   ctx->Const.Program[MESA_SHADER_VERTEX].HighInt = ctx->Const.Program[MESA_SHADER_VERTEX].LowInt;
704   ctx->Const.Program[MESA_SHADER_VERTEX].MediumInt = ctx->Const.Program[MESA_SHADER_VERTEX].LowInt;
705
706   /* Gen6 converts quads to polygon in beginning of 3D pipeline,
707    * but we're not sure how it's actually done for vertex order,
708    * that affect provoking vertex decision. Always use last vertex
709    * convention for quad primitive which works as expected for now.
710    */
711   if (brw->gen >= 6)
712      ctx->Const.QuadsFollowProvokingVertexConvention = false;
713
714   ctx->Const.NativeIntegers = true;
715   ctx->Const.VertexID_is_zero_based = true;
716
717   /* Regarding the CMP instruction, the Ivybridge PRM says:
718    *
719    *   "For each enabled channel 0b or 1b is assigned to the appropriate flag
720    *    bit and 0/all zeros or all ones (e.g, byte 0xFF, word 0xFFFF, DWord
721    *    0xFFFFFFFF) is assigned to dst."
722    *
723    * but PRMs for earlier generations say
724    *
725    *   "In dword format, one GRF may store up to 8 results. When the register
726    *    is used later as a vector of Booleans, as only LSB at each channel
727    *    contains meaning [sic] data, software should make sure all higher bits
728    *    are masked out (e.g. by 'and-ing' an [sic] 0x01 constant)."
729    *
730    * We select the representation of a true boolean uniform to be ~0, and fix
731    * the results of Gen <= 5 CMP instruction's with -(result & 1).
732    */
733   ctx->Const.UniformBooleanTrue = ~0;
734
735   /* From the gen4 PRM, volume 4 page 127:
736    *
737    *     "For SURFTYPE_BUFFER non-rendertarget surfaces, this field specifies
738    *      the base address of the first element of the surface, computed in
739    *      software by adding the surface base address to the byte offset of
740    *      the element in the buffer."
741    *
742    * However, unaligned accesses are slower, so enforce buffer alignment.
743    */
744   ctx->Const.UniformBufferOffsetAlignment = 16;
745
746   /* ShaderStorageBufferOffsetAlignment should be a cacheline (64 bytes) so
747    * that we can safely have the CPU and GPU writing the same SSBO on
748    * non-cachecoherent systems (our Atom CPUs). With UBOs, the GPU never
749    * writes, so there's no problem. For an SSBO, the GPU and the CPU can
750    * be updating disjoint regions of the buffer simultaneously and that will
751    * break if the regions overlap the same cacheline.
752    */
753   ctx->Const.ShaderStorageBufferOffsetAlignment = 64;
754   ctx->Const.TextureBufferOffsetAlignment = 16;
755   ctx->Const.MaxTextureBufferSize = 128 * 1024 * 1024;
756
757   if (brw->gen >= 6) {
758      ctx->Const.MaxVarying = 32;
759      ctx->Const.Program[MESA_SHADER_VERTEX].MaxOutputComponents = 128;
760      ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxInputComponents = 64;
761      ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxOutputComponents = 128;
762      ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxInputComponents = 128;
763      ctx->Const.Program[MESA_SHADER_TESS_CTRL].MaxInputComponents = 128;
764      ctx->Const.Program[MESA_SHADER_TESS_CTRL].MaxOutputComponents = 128;
765      ctx->Const.Program[MESA_SHADER_TESS_EVAL].MaxInputComponents = 128;
766      ctx->Const.Program[MESA_SHADER_TESS_EVAL].MaxOutputComponents = 128;
767   }
768
769   /* We want the GLSL compiler to emit code that uses condition codes */
770   for (int i = 0; i < MESA_SHADER_STAGES; i++) {
771      ctx->Const.ShaderCompilerOptions[i] =
772         brw->screen->compiler->glsl_compiler_options[i];
773   }
774
775   if (brw->gen >= 7) {
776      ctx->Const.MaxViewportWidth = 32768;
777      ctx->Const.MaxViewportHeight = 32768;
778   }
779
780   /* ARB_viewport_array, OES_viewport_array */
781   if ((brw->gen >= 6 && ctx->API == API_OPENGL_CORE) ||
782       (brw->gen >= 8  && ctx->API == API_OPENGLES2)) {
783      ctx->Const.MaxViewports = GEN6_NUM_VIEWPORTS;
784      ctx->Const.ViewportSubpixelBits = 0;
785
786      /* Cast to float before negating because MaxViewportWidth is unsigned.
787       */
788      ctx->Const.ViewportBounds.Min = -(float)ctx->Const.MaxViewportWidth;
789      ctx->Const.ViewportBounds.Max = ctx->Const.MaxViewportWidth;
790   }
791
792   /* ARB_gpu_shader5 */
793   if (brw->gen >= 7)
794      ctx->Const.MaxVertexStreams = MIN2(4, MAX_VERTEX_STREAMS);
795
796   /* ARB_framebuffer_no_attachments */
797   ctx->Const.MaxFramebufferWidth = 16384;
798   ctx->Const.MaxFramebufferHeight = 16384;
799   ctx->Const.MaxFramebufferLayers = ctx->Const.MaxArrayTextureLayers;
800   ctx->Const.MaxFramebufferSamples = max_samples;
801
802   /* OES_primitive_bounding_box */
803   ctx->Const.NoPrimitiveBoundingBoxOutput = true;
804}
805
806static void
807brw_initialize_cs_context_constants(struct brw_context *brw)
808{
809   struct gl_context *ctx = &brw->ctx;
810   const struct intel_screen *screen = brw->screen;
811   struct gen_device_info *devinfo = &brw->screen->devinfo;
812
813   /* FINISHME: Do this for all platforms that the kernel supports */
814   if (brw->is_cherryview &&
815       screen->subslice_total > 0 && screen->eu_total > 0) {
816      /* Logical CS threads = EUs per subslice * 7 threads per EU */
817      uint32_t max_cs_threads = screen->eu_total / screen->subslice_total * 7;
818
819      /* Fuse configurations may give more threads than expected, never less. */
820      if (max_cs_threads > devinfo->max_cs_threads)
821         devinfo->max_cs_threads = max_cs_threads;
822   }
823
824   /* Maximum number of scalar compute shader invocations that can be run in
825    * parallel in the same subslice assuming SIMD32 dispatch.
826    *
827    * We don't advertise more than 64 threads, because we are limited to 64 by
828    * our usage of thread_width_max in the gpgpu walker command. This only
829    * currently impacts Haswell, which otherwise might be able to advertise 70
830    * threads. With SIMD32 and 64 threads, Haswell still provides twice the
831    * required the number of invocation needed for ARB_compute_shader.
832    */
833   const unsigned max_threads = MIN2(64, devinfo->max_cs_threads);
834   const uint32_t max_invocations = 32 * max_threads;
835   ctx->Const.MaxComputeWorkGroupSize[0] = max_invocations;
836   ctx->Const.MaxComputeWorkGroupSize[1] = max_invocations;
837   ctx->Const.MaxComputeWorkGroupSize[2] = max_invocations;
838   ctx->Const.MaxComputeWorkGroupInvocations = max_invocations;
839   ctx->Const.MaxComputeSharedMemorySize = 64 * 1024;
840}
841
842/**
843 * Process driconf (drirc) options, setting appropriate context flags.
844 *
845 * intelInitExtensions still pokes at optionCache directly, in order to
846 * avoid advertising various extensions.  No flags are set, so it makes
847 * sense to continue doing that there.
848 */
849static void
850brw_process_driconf_options(struct brw_context *brw)
851{
852   struct gl_context *ctx = &brw->ctx;
853
854   driOptionCache *options = &brw->optionCache;
855   driParseConfigFiles(options, &brw->screen->optionCache,
856                       brw->driContext->driScreenPriv->myNum, "i965");
857
858   int bo_reuse_mode = driQueryOptioni(options, "bo_reuse");
859   switch (bo_reuse_mode) {
860   case DRI_CONF_BO_REUSE_DISABLED:
861      break;
862   case DRI_CONF_BO_REUSE_ALL:
863      intel_bufmgr_gem_enable_reuse(brw->bufmgr);
864      break;
865   }
866
867   if (!driQueryOptionb(options, "hiz")) {
868       brw->has_hiz = false;
869       /* On gen6, you can only do separate stencil with HIZ. */
870       if (brw->gen == 6)
871          brw->has_separate_stencil = false;
872   }
873
874   if (driQueryOptionb(options, "always_flush_batch")) {
875      fprintf(stderr, "flushing batchbuffer before/after each draw call\n");
876      brw->always_flush_batch = true;
877   }
878
879   if (driQueryOptionb(options, "always_flush_cache")) {
880      fprintf(stderr, "flushing GPU caches before/after each draw call\n");
881      brw->always_flush_cache = true;
882   }
883
884   if (driQueryOptionb(options, "disable_throttling")) {
885      fprintf(stderr, "disabling flush throttling\n");
886      brw->disable_throttling = true;
887   }
888
889   brw->precompile = driQueryOptionb(&brw->optionCache, "shader_precompile");
890
891   if (driQueryOptionb(&brw->optionCache, "precise_trig"))
892      brw->screen->compiler->precise_trig = true;
893
894   ctx->Const.ForceGLSLExtensionsWarn =
895      driQueryOptionb(options, "force_glsl_extensions_warn");
896
897   ctx->Const.DisableGLSLLineContinuations =
898      driQueryOptionb(options, "disable_glsl_line_continuations");
899
900   ctx->Const.AllowGLSLExtensionDirectiveMidShader =
901      driQueryOptionb(options, "allow_glsl_extension_directive_midshader");
902
903   ctx->Const.GLSLZeroInit = driQueryOptionb(options, "glsl_zero_init");
904
905   brw->dual_color_blend_by_location =
906      driQueryOptionb(options, "dual_color_blend_by_location");
907}
908
909GLboolean
910brwCreateContext(gl_api api,
911	         const struct gl_config *mesaVis,
912		 __DRIcontext *driContextPriv,
913                 unsigned major_version,
914                 unsigned minor_version,
915                 uint32_t flags,
916                 bool notify_reset,
917                 unsigned *dri_ctx_error,
918	         void *sharedContextPrivate)
919{
920   struct gl_context *shareCtx = (struct gl_context *) sharedContextPrivate;
921   struct intel_screen *screen = driContextPriv->driScreenPriv->driverPrivate;
922   const struct gen_device_info *devinfo = &screen->devinfo;
923   struct dd_function_table functions;
924
925   /* Only allow the __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS flag if the kernel
926    * provides us with context reset notifications.
927    */
928   uint32_t allowed_flags = __DRI_CTX_FLAG_DEBUG
929      | __DRI_CTX_FLAG_FORWARD_COMPATIBLE;
930
931   if (screen->has_context_reset_notification)
932      allowed_flags |= __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS;
933
934   if (flags & ~allowed_flags) {
935      *dri_ctx_error = __DRI_CTX_ERROR_UNKNOWN_FLAG;
936      return false;
937   }
938
939   struct brw_context *brw = rzalloc(NULL, struct brw_context);
940   if (!brw) {
941      fprintf(stderr, "%s: failed to alloc context\n", __func__);
942      *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
943      return false;
944   }
945
946   driContextPriv->driverPrivate = brw;
947   brw->driContext = driContextPriv;
948   brw->screen = screen;
949   brw->bufmgr = screen->bufmgr;
950
951   brw->gen = devinfo->gen;
952   brw->gt = devinfo->gt;
953   brw->is_g4x = devinfo->is_g4x;
954   brw->is_baytrail = devinfo->is_baytrail;
955   brw->is_haswell = devinfo->is_haswell;
956   brw->is_cherryview = devinfo->is_cherryview;
957   brw->is_broxton = devinfo->is_broxton;
958   brw->has_llc = devinfo->has_llc;
959   brw->has_hiz = devinfo->has_hiz_and_separate_stencil;
960   brw->has_separate_stencil = devinfo->has_hiz_and_separate_stencil;
961   brw->has_pln = devinfo->has_pln;
962   brw->has_compr4 = devinfo->has_compr4;
963   brw->has_surface_tile_offset = devinfo->has_surface_tile_offset;
964   brw->has_negative_rhw_bug = devinfo->has_negative_rhw_bug;
965   brw->needs_unlit_centroid_workaround =
966      devinfo->needs_unlit_centroid_workaround;
967
968   brw->must_use_separate_stencil = devinfo->must_use_separate_stencil;
969   brw->has_swizzling = screen->hw_has_swizzling;
970
971   isl_device_init(&brw->isl_dev, devinfo, screen->hw_has_swizzling);
972
973   brw->vs.base.stage = MESA_SHADER_VERTEX;
974   brw->tcs.base.stage = MESA_SHADER_TESS_CTRL;
975   brw->tes.base.stage = MESA_SHADER_TESS_EVAL;
976   brw->gs.base.stage = MESA_SHADER_GEOMETRY;
977   brw->wm.base.stage = MESA_SHADER_FRAGMENT;
978   if (brw->gen >= 8) {
979      gen8_init_vtable_surface_functions(brw);
980      brw->vtbl.emit_depth_stencil_hiz = gen8_emit_depth_stencil_hiz;
981   } else if (brw->gen >= 7) {
982      gen7_init_vtable_surface_functions(brw);
983      brw->vtbl.emit_depth_stencil_hiz = gen7_emit_depth_stencil_hiz;
984   } else if (brw->gen >= 6) {
985      gen6_init_vtable_surface_functions(brw);
986      brw->vtbl.emit_depth_stencil_hiz = gen6_emit_depth_stencil_hiz;
987   } else {
988      gen4_init_vtable_surface_functions(brw);
989      brw->vtbl.emit_depth_stencil_hiz = brw_emit_depth_stencil_hiz;
990   }
991
992   brw_init_driver_functions(brw, &functions);
993
994   if (notify_reset)
995      functions.GetGraphicsResetStatus = brw_get_graphics_reset_status;
996
997   struct gl_context *ctx = &brw->ctx;
998
999   if (!_mesa_initialize_context(ctx, api, mesaVis, shareCtx, &functions)) {
1000      *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
1001      fprintf(stderr, "%s: failed to init mesa context\n", __func__);
1002      intelDestroyContext(driContextPriv);
1003      return false;
1004   }
1005
1006   driContextSetFlags(ctx, flags);
1007
1008   /* Initialize the software rasterizer and helper modules.
1009    *
1010    * As of GL 3.1 core, the gen4+ driver doesn't need the swrast context for
1011    * software fallbacks (which we have to support on legacy GL to do weird
1012    * glDrawPixels(), glBitmap(), and other functions).
1013    */
1014   if (api != API_OPENGL_CORE && api != API_OPENGLES2) {
1015      _swrast_CreateContext(ctx);
1016   }
1017
1018   _vbo_CreateContext(ctx);
1019   if (ctx->swrast_context) {
1020      _tnl_CreateContext(ctx);
1021      TNL_CONTEXT(ctx)->Driver.RunPipeline = _tnl_run_pipeline;
1022      _swsetup_CreateContext(ctx);
1023
1024      /* Configure swrast to match hardware characteristics: */
1025      _swrast_allow_pixel_fog(ctx, false);
1026      _swrast_allow_vertex_fog(ctx, true);
1027   }
1028
1029   _mesa_meta_init(ctx);
1030
1031   brw_process_driconf_options(brw);
1032
1033   if (INTEL_DEBUG & DEBUG_PERF)
1034      brw->perf_debug = true;
1035
1036   brw_initialize_cs_context_constants(brw);
1037   brw_initialize_context_constants(brw);
1038
1039   ctx->Const.ResetStrategy = notify_reset
1040      ? GL_LOSE_CONTEXT_ON_RESET_ARB : GL_NO_RESET_NOTIFICATION_ARB;
1041
1042   /* Reinitialize the context point state.  It depends on ctx->Const values. */
1043   _mesa_init_point(ctx);
1044
1045   intel_fbo_init(brw);
1046
1047   intel_batchbuffer_init(brw);
1048
1049   if (brw->gen >= 6) {
1050      /* Create a new hardware context.  Using a hardware context means that
1051       * our GPU state will be saved/restored on context switch, allowing us
1052       * to assume that the GPU is in the same state we left it in.
1053       *
1054       * This is required for transform feedback buffer offsets, query objects,
1055       * and also allows us to reduce how much state we have to emit.
1056       */
1057      brw->hw_ctx = drm_intel_gem_context_create(brw->bufmgr);
1058
1059      if (!brw->hw_ctx) {
1060         fprintf(stderr, "Gen6+ requires Kernel 3.6 or later.\n");
1061         intelDestroyContext(driContextPriv);
1062         return false;
1063      }
1064   }
1065
1066   if (brw_init_pipe_control(brw, devinfo)) {
1067      *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
1068      intelDestroyContext(driContextPriv);
1069      return false;
1070   }
1071
1072   brw_init_state(brw);
1073
1074   intelInitExtensions(ctx);
1075
1076   brw_init_surface_formats(brw);
1077
1078   if (brw->gen >= 6)
1079      brw_blorp_init(brw);
1080
1081   brw->urb.size = devinfo->urb.size;
1082
1083   if (brw->gen == 6)
1084      brw->urb.gs_present = false;
1085
1086   brw->prim_restart.in_progress = false;
1087   brw->prim_restart.enable_cut_index = false;
1088   brw->gs.enabled = false;
1089   brw->sf.viewport_transform_enable = true;
1090   brw->clip.viewport_count = 1;
1091
1092   brw->predicate.state = BRW_PREDICATE_STATE_RENDER;
1093
1094   brw->max_gtt_map_object_size = screen->max_gtt_map_object_size;
1095
1096   brw->use_resource_streamer = screen->has_resource_streamer &&
1097      (env_var_as_boolean("INTEL_USE_HW_BT", false) ||
1098       env_var_as_boolean("INTEL_USE_GATHER", false));
1099
1100   ctx->VertexProgram._MaintainTnlProgram = true;
1101   ctx->FragmentProgram._MaintainTexEnvProgram = true;
1102
1103   brw_draw_init( brw );
1104
1105   if ((flags & __DRI_CTX_FLAG_DEBUG) != 0) {
1106      /* Turn on some extra GL_ARB_debug_output generation. */
1107      brw->perf_debug = true;
1108   }
1109
1110   if ((flags & __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS) != 0)
1111      ctx->Const.ContextFlags |= GL_CONTEXT_FLAG_ROBUST_ACCESS_BIT_ARB;
1112
1113   if (INTEL_DEBUG & DEBUG_SHADER_TIME)
1114      brw_init_shader_time(brw);
1115
1116   _mesa_compute_version(ctx);
1117
1118   _mesa_initialize_dispatch_tables(ctx);
1119   _mesa_initialize_vbo_vtxfmt(ctx);
1120
1121   if (ctx->Extensions.AMD_performance_monitor) {
1122      brw_init_performance_monitors(brw);
1123   }
1124
1125   vbo_use_buffer_objects(ctx);
1126   vbo_always_unmap_buffers(ctx);
1127
1128   return true;
1129}
1130
1131void
1132intelDestroyContext(__DRIcontext * driContextPriv)
1133{
1134   struct brw_context *brw =
1135      (struct brw_context *) driContextPriv->driverPrivate;
1136   struct gl_context *ctx = &brw->ctx;
1137
1138   /* Dump a final BMP in case the application doesn't call SwapBuffers */
1139   if (INTEL_DEBUG & DEBUG_AUB) {
1140      intel_batchbuffer_flush(brw);
1141      aub_dump_bmp(&brw->ctx);
1142   }
1143
1144   _mesa_meta_free(&brw->ctx);
1145
1146   if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
1147      /* Force a report. */
1148      brw->shader_time.report_time = 0;
1149
1150      brw_collect_and_report_shader_time(brw);
1151      brw_destroy_shader_time(brw);
1152   }
1153
1154   if (brw->gen >= 6)
1155      blorp_finish(&brw->blorp);
1156
1157   brw_destroy_state(brw);
1158   brw_draw_destroy(brw);
1159
1160   drm_intel_bo_unreference(brw->curbe.curbe_bo);
1161   if (brw->vs.base.scratch_bo)
1162      drm_intel_bo_unreference(brw->vs.base.scratch_bo);
1163   if (brw->tcs.base.scratch_bo)
1164      drm_intel_bo_unreference(brw->tcs.base.scratch_bo);
1165   if (brw->tes.base.scratch_bo)
1166      drm_intel_bo_unreference(brw->tes.base.scratch_bo);
1167   if (brw->gs.base.scratch_bo)
1168      drm_intel_bo_unreference(brw->gs.base.scratch_bo);
1169   if (brw->wm.base.scratch_bo)
1170      drm_intel_bo_unreference(brw->wm.base.scratch_bo);
1171
1172   gen7_reset_hw_bt_pool_offsets(brw);
1173   drm_intel_bo_unreference(brw->hw_bt_pool.bo);
1174   brw->hw_bt_pool.bo = NULL;
1175
1176   drm_intel_gem_context_destroy(brw->hw_ctx);
1177
1178   if (ctx->swrast_context) {
1179      _swsetup_DestroyContext(&brw->ctx);
1180      _tnl_DestroyContext(&brw->ctx);
1181   }
1182   _vbo_DestroyContext(&brw->ctx);
1183
1184   if (ctx->swrast_context)
1185      _swrast_DestroyContext(&brw->ctx);
1186
1187   brw_fini_pipe_control(brw);
1188   intel_batchbuffer_free(brw);
1189
1190   drm_intel_bo_unreference(brw->throttle_batch[1]);
1191   drm_intel_bo_unreference(brw->throttle_batch[0]);
1192   brw->throttle_batch[1] = NULL;
1193   brw->throttle_batch[0] = NULL;
1194
1195   driDestroyOptionCache(&brw->optionCache);
1196
1197   /* free the Mesa context */
1198   _mesa_free_context_data(&brw->ctx);
1199
1200   ralloc_free(brw);
1201   driContextPriv->driverPrivate = NULL;
1202}
1203
1204GLboolean
1205intelUnbindContext(__DRIcontext * driContextPriv)
1206{
1207   /* Unset current context and dispath table */
1208   _mesa_make_current(NULL, NULL, NULL);
1209
1210   return true;
1211}
1212
1213/**
1214 * Fixes up the context for GLES23 with our default-to-sRGB-capable behavior
1215 * on window system framebuffers.
1216 *
1217 * Desktop GL is fairly reasonable in its handling of sRGB: You can ask if
1218 * your renderbuffer can do sRGB encode, and you can flip a switch that does
1219 * sRGB encode if the renderbuffer can handle it.  You can ask specifically
1220 * for a visual where you're guaranteed to be capable, but it turns out that
1221 * everyone just makes all their ARGB8888 visuals capable and doesn't offer
1222 * incapable ones, because there's no difference between the two in resources
1223 * used.  Applications thus get built that accidentally rely on the default
1224 * visual choice being sRGB, so we make ours sRGB capable.  Everything sounds
1225 * great...
1226 *
1227 * But for GLES2/3, they decided that it was silly to not turn on sRGB encode
1228 * for sRGB renderbuffers you made with the GL_EXT_texture_sRGB equivalent.
1229 * So they removed the enable knob and made it "if the renderbuffer is sRGB
1230 * capable, do sRGB encode".  Then, for your window system renderbuffers, you
1231 * can ask for sRGB visuals and get sRGB encode, or not ask for sRGB visuals
1232 * and get no sRGB encode (assuming that both kinds of visual are available).
1233 * Thus our choice to support sRGB by default on our visuals for desktop would
1234 * result in broken rendering of GLES apps that aren't expecting sRGB encode.
1235 *
1236 * Unfortunately, renderbuffer setup happens before a context is created.  So
1237 * in intel_screen.c we always set up sRGB, and here, if you're a GLES2/3
1238 * context (without an sRGB visual, though we don't have sRGB visuals exposed
1239 * yet), we go turn that back off before anyone finds out.
1240 */
1241static void
1242intel_gles3_srgb_workaround(struct brw_context *brw,
1243                            struct gl_framebuffer *fb)
1244{
1245   struct gl_context *ctx = &brw->ctx;
1246
1247   if (_mesa_is_desktop_gl(ctx) || !fb->Visual.sRGBCapable)
1248      return;
1249
1250   /* Some day when we support the sRGB capable bit on visuals available for
1251    * GLES, we'll need to respect that and not disable things here.
1252    */
1253   fb->Visual.sRGBCapable = false;
1254   for (int i = 0; i < BUFFER_COUNT; i++) {
1255      struct gl_renderbuffer *rb = fb->Attachment[i].Renderbuffer;
1256      if (rb)
1257         rb->Format = _mesa_get_srgb_format_linear(rb->Format);
1258   }
1259}
1260
1261GLboolean
1262intelMakeCurrent(__DRIcontext * driContextPriv,
1263                 __DRIdrawable * driDrawPriv,
1264                 __DRIdrawable * driReadPriv)
1265{
1266   struct brw_context *brw;
1267   GET_CURRENT_CONTEXT(curCtx);
1268
1269   if (driContextPriv)
1270      brw = (struct brw_context *) driContextPriv->driverPrivate;
1271   else
1272      brw = NULL;
1273
1274   /* According to the glXMakeCurrent() man page: "Pending commands to
1275    * the previous context, if any, are flushed before it is released."
1276    * But only flush if we're actually changing contexts.
1277    */
1278   if (brw_context(curCtx) && brw_context(curCtx) != brw) {
1279      _mesa_flush(curCtx);
1280   }
1281
1282   if (driContextPriv) {
1283      struct gl_context *ctx = &brw->ctx;
1284      struct gl_framebuffer *fb, *readFb;
1285
1286      if (driDrawPriv == NULL) {
1287         fb = _mesa_get_incomplete_framebuffer();
1288      } else {
1289         fb = driDrawPriv->driverPrivate;
1290         driContextPriv->dri2.draw_stamp = driDrawPriv->dri2.stamp - 1;
1291      }
1292
1293      if (driReadPriv == NULL) {
1294         readFb = _mesa_get_incomplete_framebuffer();
1295      } else {
1296         readFb = driReadPriv->driverPrivate;
1297         driContextPriv->dri2.read_stamp = driReadPriv->dri2.stamp - 1;
1298      }
1299
1300      /* The sRGB workaround changes the renderbuffer's format. We must change
1301       * the format before the renderbuffer's miptree get's allocated, otherwise
1302       * the formats of the renderbuffer and its miptree will differ.
1303       */
1304      intel_gles3_srgb_workaround(brw, fb);
1305      intel_gles3_srgb_workaround(brw, readFb);
1306
1307      /* If the context viewport hasn't been initialized, force a call out to
1308       * the loader to get buffers so we have a drawable size for the initial
1309       * viewport. */
1310      if (!brw->ctx.ViewportInitialized)
1311         intel_prepare_render(brw);
1312
1313      _mesa_make_current(ctx, fb, readFb);
1314   } else {
1315      _mesa_make_current(NULL, NULL, NULL);
1316   }
1317
1318   return true;
1319}
1320
1321void
1322intel_resolve_for_dri2_flush(struct brw_context *brw,
1323                             __DRIdrawable *drawable)
1324{
1325   if (brw->gen < 6) {
1326      /* MSAA and fast color clear are not supported, so don't waste time
1327       * checking whether a resolve is needed.
1328       */
1329      return;
1330   }
1331
1332   struct gl_framebuffer *fb = drawable->driverPrivate;
1333   struct intel_renderbuffer *rb;
1334
1335   /* Usually, only the back buffer will need to be downsampled. However,
1336    * the front buffer will also need it if the user has rendered into it.
1337    */
1338   static const gl_buffer_index buffers[2] = {
1339         BUFFER_BACK_LEFT,
1340         BUFFER_FRONT_LEFT,
1341   };
1342
1343   for (int i = 0; i < 2; ++i) {
1344      rb = intel_get_renderbuffer(fb, buffers[i]);
1345      if (rb == NULL || rb->mt == NULL)
1346         continue;
1347      if (rb->mt->num_samples <= 1)
1348         intel_miptree_resolve_color(brw, rb->mt, 0);
1349      else
1350         intel_renderbuffer_downsample(brw, rb);
1351   }
1352}
1353
1354static unsigned
1355intel_bits_per_pixel(const struct intel_renderbuffer *rb)
1356{
1357   return _mesa_get_format_bytes(intel_rb_format(rb)) * 8;
1358}
1359
1360static void
1361intel_query_dri2_buffers(struct brw_context *brw,
1362                         __DRIdrawable *drawable,
1363                         __DRIbuffer **buffers,
1364                         int *count);
1365
1366static void
1367intel_process_dri2_buffer(struct brw_context *brw,
1368                          __DRIdrawable *drawable,
1369                          __DRIbuffer *buffer,
1370                          struct intel_renderbuffer *rb,
1371                          const char *buffer_name);
1372
1373static void
1374intel_update_image_buffers(struct brw_context *brw, __DRIdrawable *drawable);
1375
1376static void
1377intel_update_dri2_buffers(struct brw_context *brw, __DRIdrawable *drawable)
1378{
1379   struct gl_framebuffer *fb = drawable->driverPrivate;
1380   struct intel_renderbuffer *rb;
1381   __DRIbuffer *buffers = NULL;
1382   int i, count;
1383   const char *region_name;
1384
1385   /* Set this up front, so that in case our buffers get invalidated
1386    * while we're getting new buffers, we don't clobber the stamp and
1387    * thus ignore the invalidate. */
1388   drawable->lastStamp = drawable->dri2.stamp;
1389
1390   if (unlikely(INTEL_DEBUG & DEBUG_DRI))
1391      fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
1392
1393   intel_query_dri2_buffers(brw, drawable, &buffers, &count);
1394
1395   if (buffers == NULL)
1396      return;
1397
1398   for (i = 0; i < count; i++) {
1399       switch (buffers[i].attachment) {
1400       case __DRI_BUFFER_FRONT_LEFT:
1401           rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1402           region_name = "dri2 front buffer";
1403           break;
1404
1405       case __DRI_BUFFER_FAKE_FRONT_LEFT:
1406           rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1407           region_name = "dri2 fake front buffer";
1408           break;
1409
1410       case __DRI_BUFFER_BACK_LEFT:
1411           rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1412           region_name = "dri2 back buffer";
1413           break;
1414
1415       case __DRI_BUFFER_DEPTH:
1416       case __DRI_BUFFER_HIZ:
1417       case __DRI_BUFFER_DEPTH_STENCIL:
1418       case __DRI_BUFFER_STENCIL:
1419       case __DRI_BUFFER_ACCUM:
1420       default:
1421           fprintf(stderr,
1422                   "unhandled buffer attach event, attachment type %d\n",
1423                   buffers[i].attachment);
1424           return;
1425       }
1426
1427       intel_process_dri2_buffer(brw, drawable, &buffers[i], rb, region_name);
1428   }
1429
1430}
1431
1432void
1433intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
1434{
1435   struct brw_context *brw = context->driverPrivate;
1436   __DRIscreen *dri_screen = brw->screen->driScrnPriv;
1437
1438   /* Set this up front, so that in case our buffers get invalidated
1439    * while we're getting new buffers, we don't clobber the stamp and
1440    * thus ignore the invalidate. */
1441   drawable->lastStamp = drawable->dri2.stamp;
1442
1443   if (unlikely(INTEL_DEBUG & DEBUG_DRI))
1444      fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
1445
1446   if (dri_screen->image.loader)
1447      intel_update_image_buffers(brw, drawable);
1448   else
1449      intel_update_dri2_buffers(brw, drawable);
1450
1451   driUpdateFramebufferSize(&brw->ctx, drawable);
1452}
1453
1454/**
1455 * intel_prepare_render should be called anywhere that curent read/drawbuffer
1456 * state is required.
1457 */
1458void
1459intel_prepare_render(struct brw_context *brw)
1460{
1461   struct gl_context *ctx = &brw->ctx;
1462   __DRIcontext *driContext = brw->driContext;
1463   __DRIdrawable *drawable;
1464
1465   drawable = driContext->driDrawablePriv;
1466   if (drawable && drawable->dri2.stamp != driContext->dri2.draw_stamp) {
1467      if (drawable->lastStamp != drawable->dri2.stamp)
1468         intel_update_renderbuffers(driContext, drawable);
1469      driContext->dri2.draw_stamp = drawable->dri2.stamp;
1470   }
1471
1472   drawable = driContext->driReadablePriv;
1473   if (drawable && drawable->dri2.stamp != driContext->dri2.read_stamp) {
1474      if (drawable->lastStamp != drawable->dri2.stamp)
1475         intel_update_renderbuffers(driContext, drawable);
1476      driContext->dri2.read_stamp = drawable->dri2.stamp;
1477   }
1478
1479   /* If we're currently rendering to the front buffer, the rendering
1480    * that will happen next will probably dirty the front buffer.  So
1481    * mark it as dirty here.
1482    */
1483   if (_mesa_is_front_buffer_drawing(ctx->DrawBuffer))
1484      brw->front_buffer_dirty = true;
1485}
1486
1487/**
1488 * \brief Query DRI2 to obtain a DRIdrawable's buffers.
1489 *
1490 * To determine which DRI buffers to request, examine the renderbuffers
1491 * attached to the drawable's framebuffer. Then request the buffers with
1492 * DRI2GetBuffers() or DRI2GetBuffersWithFormat().
1493 *
1494 * This is called from intel_update_renderbuffers().
1495 *
1496 * \param drawable      Drawable whose buffers are queried.
1497 * \param buffers       [out] List of buffers returned by DRI2 query.
1498 * \param buffer_count  [out] Number of buffers returned.
1499 *
1500 * \see intel_update_renderbuffers()
1501 * \see DRI2GetBuffers()
1502 * \see DRI2GetBuffersWithFormat()
1503 */
1504static void
1505intel_query_dri2_buffers(struct brw_context *brw,
1506                         __DRIdrawable *drawable,
1507                         __DRIbuffer **buffers,
1508                         int *buffer_count)
1509{
1510   __DRIscreen *dri_screen = brw->screen->driScrnPriv;
1511   struct gl_framebuffer *fb = drawable->driverPrivate;
1512   int i = 0;
1513   unsigned attachments[8];
1514
1515   struct intel_renderbuffer *front_rb;
1516   struct intel_renderbuffer *back_rb;
1517
1518   front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1519   back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1520
1521   memset(attachments, 0, sizeof(attachments));
1522   if ((_mesa_is_front_buffer_drawing(fb) ||
1523        _mesa_is_front_buffer_reading(fb) ||
1524        !back_rb) && front_rb) {
1525      /* If a fake front buffer is in use, then querying for
1526       * __DRI_BUFFER_FRONT_LEFT will cause the server to copy the image from
1527       * the real front buffer to the fake front buffer.  So before doing the
1528       * query, we need to make sure all the pending drawing has landed in the
1529       * real front buffer.
1530       */
1531      intel_batchbuffer_flush(brw);
1532      intel_flush_front(&brw->ctx);
1533
1534      attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
1535      attachments[i++] = intel_bits_per_pixel(front_rb);
1536   } else if (front_rb && brw->front_buffer_dirty) {
1537      /* We have pending front buffer rendering, but we aren't querying for a
1538       * front buffer.  If the front buffer we have is a fake front buffer,
1539       * the X server is going to throw it away when it processes the query.
1540       * So before doing the query, make sure all the pending drawing has
1541       * landed in the real front buffer.
1542       */
1543      intel_batchbuffer_flush(brw);
1544      intel_flush_front(&brw->ctx);
1545   }
1546
1547   if (back_rb) {
1548      attachments[i++] = __DRI_BUFFER_BACK_LEFT;
1549      attachments[i++] = intel_bits_per_pixel(back_rb);
1550   }
1551
1552   assert(i <= ARRAY_SIZE(attachments));
1553
1554   *buffers =
1555      dri_screen->dri2.loader->getBuffersWithFormat(drawable,
1556                                                    &drawable->w,
1557                                                    &drawable->h,
1558                                                    attachments, i / 2,
1559                                                    buffer_count,
1560                                                    drawable->loaderPrivate);
1561}
1562
1563/**
1564 * \brief Assign a DRI buffer's DRM region to a renderbuffer.
1565 *
1566 * This is called from intel_update_renderbuffers().
1567 *
1568 * \par Note:
1569 *    DRI buffers whose attachment point is DRI2BufferStencil or
1570 *    DRI2BufferDepthStencil are handled as special cases.
1571 *
1572 * \param buffer_name is a human readable name, such as "dri2 front buffer",
1573 *        that is passed to drm_intel_bo_gem_create_from_name().
1574 *
1575 * \see intel_update_renderbuffers()
1576 */
1577static void
1578intel_process_dri2_buffer(struct brw_context *brw,
1579                          __DRIdrawable *drawable,
1580                          __DRIbuffer *buffer,
1581                          struct intel_renderbuffer *rb,
1582                          const char *buffer_name)
1583{
1584   struct gl_framebuffer *fb = drawable->driverPrivate;
1585   drm_intel_bo *bo;
1586
1587   if (!rb)
1588      return;
1589
1590   unsigned num_samples = rb->Base.Base.NumSamples;
1591
1592   /* We try to avoid closing and reopening the same BO name, because the first
1593    * use of a mapping of the buffer involves a bunch of page faulting which is
1594    * moderately expensive.
1595    */
1596   struct intel_mipmap_tree *last_mt;
1597   if (num_samples == 0)
1598      last_mt = rb->mt;
1599   else
1600      last_mt = rb->singlesample_mt;
1601
1602   uint32_t old_name = 0;
1603   if (last_mt) {
1604       /* The bo already has a name because the miptree was created by a
1605	* previous call to intel_process_dri2_buffer(). If a bo already has a
1606	* name, then drm_intel_bo_flink() is a low-cost getter.  It does not
1607	* create a new name.
1608	*/
1609      drm_intel_bo_flink(last_mt->bo, &old_name);
1610   }
1611
1612   if (old_name == buffer->name)
1613      return;
1614
1615   if (unlikely(INTEL_DEBUG & DEBUG_DRI)) {
1616      fprintf(stderr,
1617              "attaching buffer %d, at %d, cpp %d, pitch %d\n",
1618              buffer->name, buffer->attachment,
1619              buffer->cpp, buffer->pitch);
1620   }
1621
1622   bo = drm_intel_bo_gem_create_from_name(brw->bufmgr, buffer_name,
1623                                          buffer->name);
1624   if (!bo) {
1625      fprintf(stderr,
1626              "Failed to open BO for returned DRI2 buffer "
1627              "(%dx%d, %s, named %d).\n"
1628              "This is likely a bug in the X Server that will lead to a "
1629              "crash soon.\n",
1630              drawable->w, drawable->h, buffer_name, buffer->name);
1631      return;
1632   }
1633
1634   intel_update_winsys_renderbuffer_miptree(brw, rb, bo,
1635                                            drawable->w, drawable->h,
1636                                            buffer->pitch);
1637
1638   if (_mesa_is_front_buffer_drawing(fb) &&
1639       (buffer->attachment == __DRI_BUFFER_FRONT_LEFT ||
1640        buffer->attachment == __DRI_BUFFER_FAKE_FRONT_LEFT) &&
1641       rb->Base.Base.NumSamples > 1) {
1642      intel_renderbuffer_upsample(brw, rb);
1643   }
1644
1645   assert(rb->mt);
1646
1647   drm_intel_bo_unreference(bo);
1648}
1649
1650/**
1651 * \brief Query DRI image loader to obtain a DRIdrawable's buffers.
1652 *
1653 * To determine which DRI buffers to request, examine the renderbuffers
1654 * attached to the drawable's framebuffer. Then request the buffers from
1655 * the image loader
1656 *
1657 * This is called from intel_update_renderbuffers().
1658 *
1659 * \param drawable      Drawable whose buffers are queried.
1660 * \param buffers       [out] List of buffers returned by DRI2 query.
1661 * \param buffer_count  [out] Number of buffers returned.
1662 *
1663 * \see intel_update_renderbuffers()
1664 */
1665
1666static void
1667intel_update_image_buffer(struct brw_context *intel,
1668                          __DRIdrawable *drawable,
1669                          struct intel_renderbuffer *rb,
1670                          __DRIimage *buffer,
1671                          enum __DRIimageBufferMask buffer_type)
1672{
1673   struct gl_framebuffer *fb = drawable->driverPrivate;
1674
1675   if (!rb || !buffer->bo)
1676      return;
1677
1678   unsigned num_samples = rb->Base.Base.NumSamples;
1679
1680   /* Check and see if we're already bound to the right
1681    * buffer object
1682    */
1683   struct intel_mipmap_tree *last_mt;
1684   if (num_samples == 0)
1685      last_mt = rb->mt;
1686   else
1687      last_mt = rb->singlesample_mt;
1688
1689   if (last_mt && last_mt->bo == buffer->bo)
1690      return;
1691
1692   intel_update_winsys_renderbuffer_miptree(intel, rb, buffer->bo,
1693                                            buffer->width, buffer->height,
1694                                            buffer->pitch);
1695
1696   if (_mesa_is_front_buffer_drawing(fb) &&
1697       buffer_type == __DRI_IMAGE_BUFFER_FRONT &&
1698       rb->Base.Base.NumSamples > 1) {
1699      intel_renderbuffer_upsample(intel, rb);
1700   }
1701}
1702
1703static void
1704intel_update_image_buffers(struct brw_context *brw, __DRIdrawable *drawable)
1705{
1706   struct gl_framebuffer *fb = drawable->driverPrivate;
1707   __DRIscreen *dri_screen = brw->screen->driScrnPriv;
1708   struct intel_renderbuffer *front_rb;
1709   struct intel_renderbuffer *back_rb;
1710   struct __DRIimageList images;
1711   unsigned int format;
1712   uint32_t buffer_mask = 0;
1713   int ret;
1714
1715   front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1716   back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1717
1718   if (back_rb)
1719      format = intel_rb_format(back_rb);
1720   else if (front_rb)
1721      format = intel_rb_format(front_rb);
1722   else
1723      return;
1724
1725   if (front_rb && (_mesa_is_front_buffer_drawing(fb) ||
1726                    _mesa_is_front_buffer_reading(fb) || !back_rb)) {
1727      buffer_mask |= __DRI_IMAGE_BUFFER_FRONT;
1728   }
1729
1730   if (back_rb)
1731      buffer_mask |= __DRI_IMAGE_BUFFER_BACK;
1732
1733   ret = dri_screen->image.loader->getBuffers(drawable,
1734                                              driGLFormatToImageFormat(format),
1735                                              &drawable->dri2.stamp,
1736                                              drawable->loaderPrivate,
1737                                              buffer_mask,
1738                                              &images);
1739   if (!ret)
1740      return;
1741
1742   if (images.image_mask & __DRI_IMAGE_BUFFER_FRONT) {
1743      drawable->w = images.front->width;
1744      drawable->h = images.front->height;
1745      intel_update_image_buffer(brw,
1746                                drawable,
1747                                front_rb,
1748                                images.front,
1749                                __DRI_IMAGE_BUFFER_FRONT);
1750   }
1751   if (images.image_mask & __DRI_IMAGE_BUFFER_BACK) {
1752      drawable->w = images.back->width;
1753      drawable->h = images.back->height;
1754      intel_update_image_buffer(brw,
1755                                drawable,
1756                                back_rb,
1757                                images.back,
1758                                __DRI_IMAGE_BUFFER_BACK);
1759   }
1760}
1761