1// Copyright 2006-2009 the V8 project authors. All rights reserved.
2// Use of this source code is governed by a BSD-style license that can be
3// found in the LICENSE file.
4
5// CPU specific code for arm independent of OS goes here.
6#ifdef __arm__
7#ifdef __QNXNTO__
8#include <sys/mman.h>  // for cache flushing.
9#undef MAP_TYPE
10#else
11#include <sys/syscall.h>  // for cache flushing.
12#endif
13#endif
14
15#if V8_TARGET_ARCH_ARM
16
17#include "src/assembler.h"
18#include "src/macro-assembler.h"
19
20namespace v8 {
21namespace internal {
22
23void CpuFeatures::FlushICache(void* start, size_t size) {
24#if !defined(USE_SIMULATOR)
25#if V8_OS_QNX
26  msync(start, size, MS_SYNC | MS_INVALIDATE_ICACHE);
27#else
28  register uint32_t beg asm("r0") = reinterpret_cast<uint32_t>(start);
29  register uint32_t end asm("r1") = beg + size;
30  register uint32_t flg asm("r2") = 0;
31
32#ifdef __clang__
33  // This variant of the asm avoids a constant pool entry, which can be
34  // problematic when LTO'ing. It is also slightly shorter.
35  register uint32_t scno asm("r7") = __ARM_NR_cacheflush;
36
37  asm volatile("svc 0\n"
38               :
39               : "r"(beg), "r"(end), "r"(flg), "r"(scno)
40               : "memory");
41#else
42  // Use a different variant of the asm with GCC because some versions doesn't
43  // support r7 as an asm input.
44  asm volatile(
45    // This assembly works for both ARM and Thumb targets.
46
47    // Preserve r7; it is callee-saved, and GCC uses it as a frame pointer for
48    // Thumb targets.
49    "  push {r7}\n"
50                                  // r0 = beg
51                                  // r1 = end
52                                  // r2 = flags (0)
53    "  ldr r7, =%c[scno]\n"       // r7 = syscall number
54    "  svc 0\n"
55
56    "  pop {r7}\n"
57    :
58    : "r" (beg), "r" (end), "r" (flg), [scno] "i" (__ARM_NR_cacheflush)
59    : "memory");
60#endif
61#endif
62#endif  // !USE_SIMULATOR
63}
64
65}  // namespace internal
66}  // namespace v8
67
68#endif  // V8_TARGET_ARCH_ARM
69