1// Copyright 2016, VIXL authors
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are met:
6//
7//   * Redistributions of source code must retain the above copyright notice,
8//     this list of conditions and the following disclaimer.
9//   * Redistributions in binary form must reproduce the above copyright notice,
10//     this list of conditions and the following disclaimer in the documentation
11//     and/or other materials provided with the distribution.
12//   * Neither the name of ARM Limited nor the names of its contributors may be
13//     used to endorse or promote products derived from this software without
14//     specific prior written permission.
15//
16// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
17// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
20// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
23// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26
27
28// -----------------------------------------------------------------------------
29// This file is auto generated from the
30// test/aarch32/config/template-assembler-aarch32.cc.in template file using
31// tools/generate_tests.py.
32//
33// PLEASE DO NOT EDIT.
34// -----------------------------------------------------------------------------
35
36
37#include "test-runner.h"
38
39#include "test-utils.h"
40#include "test-utils-aarch32.h"
41
42#include "aarch32/assembler-aarch32.h"
43#include "aarch32/macro-assembler-aarch32.h"
44
45#define BUF_SIZE (4096)
46
47namespace vixl {
48namespace aarch32 {
49
50// List of instruction mnemonics.
51#define FOREACH_INSTRUCTION(M) M(mov)
52
53
54// The following definitions are defined again in each generated test, therefore
55// we need to place them in an anomymous namespace. It expresses that they are
56// local to this file only, and the compiler is not allowed to share these types
57// across test files during template instantiation. Specifically, `Operands` has
58// various layouts across generated tests so it absolutely cannot be shared.
59
60#ifdef VIXL_INCLUDE_TARGET_T32
61namespace {
62
63// Values to be passed to the assembler to produce the instruction under test.
64struct Operands {
65  Condition cond;
66  Register rd;
67  Register rn;
68  ShiftType shift;
69  uint32_t amount;
70};
71
72// This structure contains all data needed to test one specific
73// instruction.
74struct TestData {
75  // The `operands` field represents what to pass to the assembler to
76  // produce the instruction.
77  Operands operands;
78  // True if we need to generate an IT instruction for this test to be valid.
79  bool in_it_block;
80  // The condition to give the IT instruction, this will be set to "al" by
81  // default.
82  Condition it_condition;
83  // Description of the operands, used for error reporting.
84  const char* operands_description;
85  // Unique identifier, used for generating traces.
86  const char* identifier;
87};
88
89struct TestResult {
90  size_t size;
91  const byte* encoding;
92};
93
94// Each element of this array produce one instruction encoding.
95const TestData kTests[] =
96    {{{ge, r7, r6, LSR, 20}, true, ge, "ge r7 r6 LSR 20", "ge_r7_r6_LSR_20"},
97     {{gt, r4, r6, LSR, 32}, true, gt, "gt r4 r6 LSR 32", "gt_r4_r6_LSR_32"},
98     {{hi, r6, r7, LSR, 29}, true, hi, "hi r6 r7 LSR 29", "hi_r6_r7_LSR_29"},
99     {{mi, r7, r1, LSR, 10}, true, mi, "mi r7 r1 LSR 10", "mi_r7_r1_LSR_10"},
100     {{ls, r7, r6, LSR, 14}, true, ls, "ls r7 r6 LSR 14", "ls_r7_r6_LSR_14"},
101     {{eq, r7, r2, ASR, 14}, true, eq, "eq r7 r2 ASR 14", "eq_r7_r2_ASR_14"},
102     {{le, r3, r7, LSR, 2}, true, le, "le r3 r7 LSR 2", "le_r3_r7_LSR_2"},
103     {{mi, r2, r7, LSR, 32}, true, mi, "mi r2 r7 LSR 32", "mi_r2_r7_LSR_32"},
104     {{ge, r5, r0, ASR, 23}, true, ge, "ge r5 r0 ASR 23", "ge_r5_r0_ASR_23"},
105     {{ne, r3, r7, LSR, 28}, true, ne, "ne r3 r7 LSR 28", "ne_r3_r7_LSR_28"},
106     {{gt, r6, r4, LSR, 13}, true, gt, "gt r6 r4 LSR 13", "gt_r6_r4_LSR_13"},
107     {{hi, r6, r5, LSR, 12}, true, hi, "hi r6 r5 LSR 12", "hi_r6_r5_LSR_12"},
108     {{pl, r6, r1, ASR, 12}, true, pl, "pl r6 r1 ASR 12", "pl_r6_r1_ASR_12"},
109     {{hi, r7, r1, ASR, 30}, true, hi, "hi r7 r1 ASR 30", "hi_r7_r1_ASR_30"},
110     {{mi, r7, r6, ASR, 20}, true, mi, "mi r7 r6 ASR 20", "mi_r7_r6_ASR_20"},
111     {{cc, r3, r6, ASR, 22}, true, cc, "cc r3 r6 ASR 22", "cc_r3_r6_ASR_22"},
112     {{vc, r2, r1, ASR, 29}, true, vc, "vc r2 r1 ASR 29", "vc_r2_r1_ASR_29"},
113     {{pl, r0, r1, ASR, 15}, true, pl, "pl r0 r1 ASR 15", "pl_r0_r1_ASR_15"},
114     {{mi, r2, r1, LSR, 22}, true, mi, "mi r2 r1 LSR 22", "mi_r2_r1_LSR_22"},
115     {{pl, r6, r4, ASR, 6}, true, pl, "pl r6 r4 ASR 6", "pl_r6_r4_ASR_6"},
116     {{hi, r1, r3, ASR, 15}, true, hi, "hi r1 r3 ASR 15", "hi_r1_r3_ASR_15"},
117     {{eq, r3, r5, ASR, 13}, true, eq, "eq r3 r5 ASR 13", "eq_r3_r5_ASR_13"},
118     {{le, r4, r6, ASR, 31}, true, le, "le r4 r6 ASR 31", "le_r4_r6_ASR_31"},
119     {{gt, r5, r1, ASR, 15}, true, gt, "gt r5 r1 ASR 15", "gt_r5_r1_ASR_15"},
120     {{pl, r3, r7, ASR, 29}, true, pl, "pl r3 r7 ASR 29", "pl_r3_r7_ASR_29"},
121     {{cs, r3, r1, ASR, 15}, true, cs, "cs r3 r1 ASR 15", "cs_r3_r1_ASR_15"},
122     {{le, r1, r7, ASR, 32}, true, le, "le r1 r7 ASR 32", "le_r1_r7_ASR_32"},
123     {{vs, r5, r7, LSR, 5}, true, vs, "vs r5 r7 LSR 5", "vs_r5_r7_LSR_5"},
124     {{cs, r3, r1, ASR, 30}, true, cs, "cs r3 r1 ASR 30", "cs_r3_r1_ASR_30"},
125     {{gt, r7, r0, LSR, 26}, true, gt, "gt r7 r0 LSR 26", "gt_r7_r0_LSR_26"},
126     {{ne, r2, r6, LSR, 24}, true, ne, "ne r2 r6 LSR 24", "ne_r2_r6_LSR_24"},
127     {{pl, r2, r3, ASR, 5}, true, pl, "pl r2 r3 ASR 5", "pl_r2_r3_ASR_5"},
128     {{le, r3, r4, ASR, 30}, true, le, "le r3 r4 ASR 30", "le_r3_r4_ASR_30"},
129     {{cs, r5, r7, ASR, 13}, true, cs, "cs r5 r7 ASR 13", "cs_r5_r7_ASR_13"},
130     {{eq, r0, r1, LSR, 31}, true, eq, "eq r0 r1 LSR 31", "eq_r0_r1_LSR_31"},
131     {{eq, r7, r2, LSR, 2}, true, eq, "eq r7 r2 LSR 2", "eq_r7_r2_LSR_2"},
132     {{vc, r2, r5, ASR, 30}, true, vc, "vc r2 r5 ASR 30", "vc_r2_r5_ASR_30"},
133     {{eq, r2, r1, ASR, 5}, true, eq, "eq r2 r1 ASR 5", "eq_r2_r1_ASR_5"},
134     {{le, r4, r7, LSR, 10}, true, le, "le r4 r7 LSR 10", "le_r4_r7_LSR_10"},
135     {{cs, r6, r1, ASR, 13}, true, cs, "cs r6 r1 ASR 13", "cs_r6_r1_ASR_13"},
136     {{ls, r7, r4, LSR, 26}, true, ls, "ls r7 r4 LSR 26", "ls_r7_r4_LSR_26"},
137     {{ge, r7, r3, ASR, 28}, true, ge, "ge r7 r3 ASR 28", "ge_r7_r3_ASR_28"},
138     {{mi, r4, r4, LSR, 16}, true, mi, "mi r4 r4 LSR 16", "mi_r4_r4_LSR_16"},
139     {{ge, r3, r7, LSR, 23}, true, ge, "ge r3 r7 LSR 23", "ge_r3_r7_LSR_23"},
140     {{ge, r3, r3, LSR, 25}, true, ge, "ge r3 r3 LSR 25", "ge_r3_r3_LSR_25"},
141     {{ne, r2, r2, ASR, 19}, true, ne, "ne r2 r2 ASR 19", "ne_r2_r2_ASR_19"},
142     {{hi, r0, r5, LSR, 29}, true, hi, "hi r0 r5 LSR 29", "hi_r0_r5_LSR_29"},
143     {{vc, r0, r0, ASR, 18}, true, vc, "vc r0 r0 ASR 18", "vc_r0_r0_ASR_18"},
144     {{gt, r5, r3, ASR, 3}, true, gt, "gt r5 r3 ASR 3", "gt_r5_r3_ASR_3"},
145     {{mi, r6, r2, ASR, 28}, true, mi, "mi r6 r2 ASR 28", "mi_r6_r2_ASR_28"},
146     {{ls, r2, r6, LSR, 31}, true, ls, "ls r2 r6 LSR 31", "ls_r2_r6_LSR_31"},
147     {{cs, r4, r0, LSR, 5}, true, cs, "cs r4 r0 LSR 5", "cs_r4_r0_LSR_5"},
148     {{eq, r6, r2, ASR, 17}, true, eq, "eq r6 r2 ASR 17", "eq_r6_r2_ASR_17"},
149     {{cs, r7, r5, LSR, 2}, true, cs, "cs r7 r5 LSR 2", "cs_r7_r5_LSR_2"},
150     {{vc, r5, r3, LSR, 17}, true, vc, "vc r5 r3 LSR 17", "vc_r5_r3_LSR_17"},
151     {{pl, r5, r1, LSR, 12}, true, pl, "pl r5 r1 LSR 12", "pl_r5_r1_LSR_12"},
152     {{lt, r2, r1, LSR, 2}, true, lt, "lt r2 r1 LSR 2", "lt_r2_r1_LSR_2"},
153     {{hi, r6, r5, ASR, 3}, true, hi, "hi r6 r5 ASR 3", "hi_r6_r5_ASR_3"},
154     {{gt, r1, r6, ASR, 19}, true, gt, "gt r1 r6 ASR 19", "gt_r1_r6_ASR_19"},
155     {{ne, r3, r7, ASR, 24}, true, ne, "ne r3 r7 ASR 24", "ne_r3_r7_ASR_24"},
156     {{mi, r3, r2, ASR, 27}, true, mi, "mi r3 r2 ASR 27", "mi_r3_r2_ASR_27"},
157     {{ge, r0, r5, ASR, 24}, true, ge, "ge r0 r5 ASR 24", "ge_r0_r5_ASR_24"},
158     {{hi, r0, r2, ASR, 12}, true, hi, "hi r0 r2 ASR 12", "hi_r0_r2_ASR_12"},
159     {{vs, r4, r7, LSR, 8}, true, vs, "vs r4 r7 LSR 8", "vs_r4_r7_LSR_8"},
160     {{vc, r0, r4, LSR, 6}, true, vc, "vc r0 r4 LSR 6", "vc_r0_r4_LSR_6"},
161     {{cs, r3, r7, LSR, 2}, true, cs, "cs r3 r7 LSR 2", "cs_r3_r7_LSR_2"},
162     {{cc, r2, r3, ASR, 7}, true, cc, "cc r2 r3 ASR 7", "cc_r2_r3_ASR_7"},
163     {{lt, r5, r4, LSR, 26}, true, lt, "lt r5 r4 LSR 26", "lt_r5_r4_LSR_26"},
164     {{vs, r6, r3, LSR, 16}, true, vs, "vs r6 r3 LSR 16", "vs_r6_r3_LSR_16"},
165     {{hi, r5, r3, ASR, 19}, true, hi, "hi r5 r3 ASR 19", "hi_r5_r3_ASR_19"},
166     {{cc, r3, r6, LSR, 16}, true, cc, "cc r3 r6 LSR 16", "cc_r3_r6_LSR_16"},
167     {{cc, r0, r6, LSR, 31}, true, cc, "cc r0 r6 LSR 31", "cc_r0_r6_LSR_31"},
168     {{hi, r6, r7, ASR, 32}, true, hi, "hi r6 r7 ASR 32", "hi_r6_r7_ASR_32"},
169     {{vc, r3, r4, ASR, 12}, true, vc, "vc r3 r4 ASR 12", "vc_r3_r4_ASR_12"},
170     {{cs, r5, r7, ASR, 9}, true, cs, "cs r5 r7 ASR 9", "cs_r5_r7_ASR_9"},
171     {{lt, r5, r0, ASR, 4}, true, lt, "lt r5 r0 ASR 4", "lt_r5_r0_ASR_4"},
172     {{cc, r3, r1, ASR, 17}, true, cc, "cc r3 r1 ASR 17", "cc_r3_r1_ASR_17"},
173     {{vs, r7, r4, ASR, 16}, true, vs, "vs r7 r4 ASR 16", "vs_r7_r4_ASR_16"},
174     {{eq, r7, r6, ASR, 14}, true, eq, "eq r7 r6 ASR 14", "eq_r7_r6_ASR_14"},
175     {{ne, r1, r0, ASR, 21}, true, ne, "ne r1 r0 ASR 21", "ne_r1_r0_ASR_21"},
176     {{ls, r0, r1, LSR, 19}, true, ls, "ls r0 r1 LSR 19", "ls_r0_r1_LSR_19"},
177     {{cc, r1, r7, ASR, 6}, true, cc, "cc r1 r7 ASR 6", "cc_r1_r7_ASR_6"},
178     {{lt, r5, r2, LSR, 1}, true, lt, "lt r5 r2 LSR 1", "lt_r5_r2_LSR_1"},
179     {{lt, r7, r0, LSR, 13}, true, lt, "lt r7 r0 LSR 13", "lt_r7_r0_LSR_13"},
180     {{gt, r2, r6, ASR, 14}, true, gt, "gt r2 r6 ASR 14", "gt_r2_r6_ASR_14"},
181     {{ls, r5, r5, ASR, 23}, true, ls, "ls r5 r5 ASR 23", "ls_r5_r5_ASR_23"},
182     {{cs, r1, r1, ASR, 12}, true, cs, "cs r1 r1 ASR 12", "cs_r1_r1_ASR_12"},
183     {{pl, r0, r2, LSR, 3}, true, pl, "pl r0 r2 LSR 3", "pl_r0_r2_LSR_3"},
184     {{le, r0, r1, LSR, 5}, true, le, "le r0 r1 LSR 5", "le_r0_r1_LSR_5"},
185     {{ne, r0, r5, LSR, 29}, true, ne, "ne r0 r5 LSR 29", "ne_r0_r5_LSR_29"},
186     {{vs, r6, r5, LSR, 14}, true, vs, "vs r6 r5 LSR 14", "vs_r6_r5_LSR_14"},
187     {{hi, r1, r7, ASR, 25}, true, hi, "hi r1 r7 ASR 25", "hi_r1_r7_ASR_25"},
188     {{mi, r2, r5, ASR, 24}, true, mi, "mi r2 r5 ASR 24", "mi_r2_r5_ASR_24"},
189     {{vc, r3, r4, ASR, 3}, true, vc, "vc r3 r4 ASR 3", "vc_r3_r4_ASR_3"},
190     {{cs, r4, r0, LSR, 29}, true, cs, "cs r4 r0 LSR 29", "cs_r4_r0_LSR_29"},
191     {{ne, r6, r6, ASR, 24}, true, ne, "ne r6 r6 ASR 24", "ne_r6_r6_ASR_24"},
192     {{lt, r1, r1, LSR, 1}, true, lt, "lt r1 r1 LSR 1", "lt_r1_r1_LSR_1"},
193     {{gt, r5, r3, ASR, 8}, true, gt, "gt r5 r3 ASR 8", "gt_r5_r3_ASR_8"},
194     {{mi, r4, r3, LSR, 10}, true, mi, "mi r4 r3 LSR 10", "mi_r4_r3_LSR_10"},
195     {{ge, r0, r4, LSR, 24}, true, ge, "ge r0 r4 LSR 24", "ge_r0_r4_LSR_24"},
196     {{hi, r0, r5, LSR, 17}, true, hi, "hi r0 r5 LSR 17", "hi_r0_r5_LSR_17"},
197     {{gt, r6, r7, ASR, 12}, true, gt, "gt r6 r7 ASR 12", "gt_r6_r7_ASR_12"},
198     {{mi, r2, r2, LSR, 15}, true, mi, "mi r2 r2 LSR 15", "mi_r2_r2_LSR_15"},
199     {{ls, r3, r0, ASR, 1}, true, ls, "ls r3 r0 ASR 1", "ls_r3_r0_ASR_1"},
200     {{lt, r4, r0, LSR, 5}, true, lt, "lt r4 r0 LSR 5", "lt_r4_r0_LSR_5"},
201     {{hi, r0, r1, LSR, 18}, true, hi, "hi r0 r1 LSR 18", "hi_r0_r1_LSR_18"},
202     {{hi, r6, r4, LSR, 28}, true, hi, "hi r6 r4 LSR 28", "hi_r6_r4_LSR_28"},
203     {{pl, r1, r1, LSR, 24}, true, pl, "pl r1 r1 LSR 24", "pl_r1_r1_LSR_24"},
204     {{vs, r6, r0, ASR, 8}, true, vs, "vs r6 r0 ASR 8", "vs_r6_r0_ASR_8"},
205     {{vs, r3, r4, LSR, 8}, true, vs, "vs r3 r4 LSR 8", "vs_r3_r4_LSR_8"},
206     {{cs, r2, r6, LSR, 13}, true, cs, "cs r2 r6 LSR 13", "cs_r2_r6_LSR_13"},
207     {{lt, r7, r6, ASR, 15}, true, lt, "lt r7 r6 ASR 15", "lt_r7_r6_ASR_15"},
208     {{le, r6, r1, ASR, 32}, true, le, "le r6 r1 ASR 32", "le_r6_r1_ASR_32"},
209     {{cc, r7, r5, LSR, 3}, true, cc, "cc r7 r5 LSR 3", "cc_r7_r5_LSR_3"},
210     {{hi, r5, r1, LSR, 7}, true, hi, "hi r5 r1 LSR 7", "hi_r5_r1_LSR_7"},
211     {{lt, r5, r4, LSR, 5}, true, lt, "lt r5 r4 LSR 5", "lt_r5_r4_LSR_5"},
212     {{mi, r4, r2, LSR, 9}, true, mi, "mi r4 r2 LSR 9", "mi_r4_r2_LSR_9"},
213     {{pl, r3, r3, ASR, 10}, true, pl, "pl r3 r3 ASR 10", "pl_r3_r3_ASR_10"},
214     {{ge, r3, r7, LSR, 17}, true, ge, "ge r3 r7 LSR 17", "ge_r3_r7_LSR_17"},
215     {{ls, r4, r1, LSR, 5}, true, ls, "ls r4 r1 LSR 5", "ls_r4_r1_LSR_5"},
216     {{mi, r4, r3, LSR, 28}, true, mi, "mi r4 r3 LSR 28", "mi_r4_r3_LSR_28"},
217     {{ne, r7, r1, ASR, 14}, true, ne, "ne r7 r1 ASR 14", "ne_r7_r1_ASR_14"},
218     {{ge, r7, r7, ASR, 20}, true, ge, "ge r7 r7 ASR 20", "ge_r7_r7_ASR_20"},
219     {{ne, r2, r3, LSR, 11}, true, ne, "ne r2 r3 LSR 11", "ne_r2_r3_LSR_11"},
220     {{lt, r6, r5, ASR, 15}, true, lt, "lt r6 r5 ASR 15", "lt_r6_r5_ASR_15"},
221     {{cs, r6, r7, ASR, 3}, true, cs, "cs r6 r7 ASR 3", "cs_r6_r7_ASR_3"},
222     {{hi, r7, r7, LSR, 12}, true, hi, "hi r7 r7 LSR 12", "hi_r7_r7_LSR_12"},
223     {{cs, r2, r4, ASR, 4}, true, cs, "cs r2 r4 ASR 4", "cs_r2_r4_ASR_4"},
224     {{lt, r7, r7, ASR, 3}, true, lt, "lt r7 r7 ASR 3", "lt_r7_r7_ASR_3"},
225     {{le, r1, r3, ASR, 27}, true, le, "le r1 r3 ASR 27", "le_r1_r3_ASR_27"},
226     {{vs, r2, r3, LSR, 28}, true, vs, "vs r2 r3 LSR 28", "vs_r2_r3_LSR_28"},
227     {{pl, r2, r0, ASR, 8}, true, pl, "pl r2 r0 ASR 8", "pl_r2_r0_ASR_8"},
228     {{hi, r5, r2, ASR, 15}, true, hi, "hi r5 r2 ASR 15", "hi_r5_r2_ASR_15"},
229     {{vs, r6, r0, LSR, 5}, true, vs, "vs r6 r0 LSR 5", "vs_r6_r0_LSR_5"},
230     {{le, r1, r6, ASR, 22}, true, le, "le r1 r6 ASR 22", "le_r1_r6_ASR_22"},
231     {{hi, r3, r2, ASR, 17}, true, hi, "hi r3 r2 ASR 17", "hi_r3_r2_ASR_17"},
232     {{gt, r1, r5, ASR, 16}, true, gt, "gt r1 r5 ASR 16", "gt_r1_r5_ASR_16"},
233     {{hi, r2, r0, ASR, 26}, true, hi, "hi r2 r0 ASR 26", "hi_r2_r0_ASR_26"},
234     {{vs, r1, r4, LSR, 27}, true, vs, "vs r1 r4 LSR 27", "vs_r1_r4_LSR_27"},
235     {{ls, r3, r4, ASR, 15}, true, ls, "ls r3 r4 ASR 15", "ls_r3_r4_ASR_15"},
236     {{ge, r7, r4, LSR, 15}, true, ge, "ge r7 r4 LSR 15", "ge_r7_r4_LSR_15"},
237     {{vc, r7, r2, LSR, 21}, true, vc, "vc r7 r2 LSR 21", "vc_r7_r2_LSR_21"},
238     {{ls, r2, r7, ASR, 22}, true, ls, "ls r2 r7 ASR 22", "ls_r2_r7_ASR_22"},
239     {{pl, r5, r5, LSR, 21}, true, pl, "pl r5 r5 LSR 21", "pl_r5_r5_LSR_21"},
240     {{cs, r2, r4, ASR, 25}, true, cs, "cs r2 r4 ASR 25", "cs_r2_r4_ASR_25"},
241     {{gt, r7, r6, LSR, 5}, true, gt, "gt r7 r6 LSR 5", "gt_r7_r6_LSR_5"},
242     {{gt, r5, r6, ASR, 25}, true, gt, "gt r5 r6 ASR 25", "gt_r5_r6_ASR_25"},
243     {{vs, r3, r0, LSR, 30}, true, vs, "vs r3 r0 LSR 30", "vs_r3_r0_LSR_30"},
244     {{pl, r6, r0, LSR, 17}, true, pl, "pl r6 r0 LSR 17", "pl_r6_r0_LSR_17"},
245     {{pl, r6, r2, ASR, 7}, true, pl, "pl r6 r2 ASR 7", "pl_r6_r2_ASR_7"},
246     {{lt, r4, r4, LSR, 17}, true, lt, "lt r4 r4 LSR 17", "lt_r4_r4_LSR_17"},
247     {{vc, r4, r5, LSR, 3}, true, vc, "vc r4 r5 LSR 3", "vc_r4_r5_LSR_3"},
248     {{cc, r4, r4, ASR, 21}, true, cc, "cc r4 r4 ASR 21", "cc_r4_r4_ASR_21"},
249     {{vs, r4, r2, ASR, 10}, true, vs, "vs r4 r2 ASR 10", "vs_r4_r2_ASR_10"},
250     {{cs, r7, r4, ASR, 10}, true, cs, "cs r7 r4 ASR 10", "cs_r7_r4_ASR_10"},
251     {{hi, r6, r1, LSR, 17}, true, hi, "hi r6 r1 LSR 17", "hi_r6_r1_LSR_17"},
252     {{vc, r4, r6, LSR, 24}, true, vc, "vc r4 r6 LSR 24", "vc_r4_r6_LSR_24"},
253     {{pl, r3, r2, ASR, 7}, true, pl, "pl r3 r2 ASR 7", "pl_r3_r2_ASR_7"},
254     {{mi, r3, r7, LSR, 17}, true, mi, "mi r3 r7 LSR 17", "mi_r3_r7_LSR_17"},
255     {{pl, r7, r3, ASR, 7}, true, pl, "pl r7 r3 ASR 7", "pl_r7_r3_ASR_7"},
256     {{vc, r0, r4, LSR, 10}, true, vc, "vc r0 r4 LSR 10", "vc_r0_r4_LSR_10"},
257     {{le, r2, r1, ASR, 24}, true, le, "le r2 r1 ASR 24", "le_r2_r1_ASR_24"},
258     {{le, r2, r7, LSR, 11}, true, le, "le r2 r7 LSR 11", "le_r2_r7_LSR_11"},
259     {{cs, r6, r0, ASR, 13}, true, cs, "cs r6 r0 ASR 13", "cs_r6_r0_ASR_13"},
260     {{ge, r3, r0, ASR, 27}, true, ge, "ge r3 r0 ASR 27", "ge_r3_r0_ASR_27"},
261     {{cc, r6, r0, ASR, 17}, true, cc, "cc r6 r0 ASR 17", "cc_r6_r0_ASR_17"},
262     {{hi, r7, r7, ASR, 6}, true, hi, "hi r7 r7 ASR 6", "hi_r7_r7_ASR_6"},
263     {{vc, r6, r7, LSR, 21}, true, vc, "vc r6 r7 LSR 21", "vc_r6_r7_LSR_21"},
264     {{ge, r6, r4, ASR, 25}, true, ge, "ge r6 r4 ASR 25", "ge_r6_r4_ASR_25"},
265     {{gt, r5, r2, ASR, 7}, true, gt, "gt r5 r2 ASR 7", "gt_r5_r2_ASR_7"},
266     {{gt, r6, r1, LSR, 8}, true, gt, "gt r6 r1 LSR 8", "gt_r6_r1_LSR_8"},
267     {{le, r1, r6, ASR, 13}, true, le, "le r1 r6 ASR 13", "le_r1_r6_ASR_13"},
268     {{hi, r6, r0, ASR, 24}, true, hi, "hi r6 r0 ASR 24", "hi_r6_r0_ASR_24"},
269     {{le, r1, r5, ASR, 29}, true, le, "le r1 r5 ASR 29", "le_r1_r5_ASR_29"},
270     {{vs, r5, r1, ASR, 23}, true, vs, "vs r5 r1 ASR 23", "vs_r5_r1_ASR_23"},
271     {{le, r0, r6, LSR, 7}, true, le, "le r0 r6 LSR 7", "le_r0_r6_LSR_7"},
272     {{pl, r7, r1, LSR, 17}, true, pl, "pl r7 r1 LSR 17", "pl_r7_r1_LSR_17"},
273     {{ne, r4, r7, ASR, 5}, true, ne, "ne r4 r7 ASR 5", "ne_r4_r7_ASR_5"},
274     {{ne, r5, r5, LSR, 22}, true, ne, "ne r5 r5 LSR 22", "ne_r5_r5_LSR_22"},
275     {{lt, r7, r2, ASR, 29}, true, lt, "lt r7 r2 ASR 29", "lt_r7_r2_ASR_29"},
276     {{le, r5, r3, LSR, 28}, true, le, "le r5 r3 LSR 28", "le_r5_r3_LSR_28"},
277     {{eq, r7, r5, ASR, 29}, true, eq, "eq r7 r5 ASR 29", "eq_r7_r5_ASR_29"},
278     {{cs, r2, r6, LSR, 4}, true, cs, "cs r2 r6 LSR 4", "cs_r2_r6_LSR_4"},
279     {{ne, r1, r0, LSR, 17}, true, ne, "ne r1 r0 LSR 17", "ne_r1_r0_LSR_17"},
280     {{ls, r2, r6, ASR, 28}, true, ls, "ls r2 r6 ASR 28", "ls_r2_r6_ASR_28"},
281     {{ge, r5, r7, ASR, 32}, true, ge, "ge r5 r7 ASR 32", "ge_r5_r7_ASR_32"},
282     {{cs, r0, r0, ASR, 1}, true, cs, "cs r0 r0 ASR 1", "cs_r0_r0_ASR_1"},
283     {{mi, r6, r5, LSR, 11}, true, mi, "mi r6 r5 LSR 11", "mi_r6_r5_LSR_11"},
284     {{mi, r5, r3, ASR, 29}, true, mi, "mi r5 r3 ASR 29", "mi_r5_r3_ASR_29"},
285     {{eq, r2, r2, LSR, 30}, true, eq, "eq r2 r2 LSR 30", "eq_r2_r2_LSR_30"},
286     {{mi, r4, r2, ASR, 25}, true, mi, "mi r4 r2 ASR 25", "mi_r4_r2_ASR_25"},
287     {{cs, r5, r0, LSR, 13}, true, cs, "cs r5 r0 LSR 13", "cs_r5_r0_LSR_13"},
288     {{cc, r7, r4, ASR, 10}, true, cc, "cc r7 r4 ASR 10", "cc_r7_r4_ASR_10"},
289     {{mi, r1, r5, LSR, 21}, true, mi, "mi r1 r5 LSR 21", "mi_r1_r5_LSR_21"},
290     {{vs, r3, r2, LSR, 2}, true, vs, "vs r3 r2 LSR 2", "vs_r3_r2_LSR_2"},
291     {{ls, r4, r4, ASR, 14}, true, ls, "ls r4 r4 ASR 14", "ls_r4_r4_ASR_14"},
292     {{eq, r5, r4, LSR, 23}, true, eq, "eq r5 r4 LSR 23", "eq_r5_r4_LSR_23"},
293     {{gt, r7, r1, ASR, 20}, true, gt, "gt r7 r1 ASR 20", "gt_r7_r1_ASR_20"},
294     {{vs, r2, r5, ASR, 5}, true, vs, "vs r2 r5 ASR 5", "vs_r2_r5_ASR_5"},
295     {{le, r6, r0, LSR, 14}, true, le, "le r6 r0 LSR 14", "le_r6_r0_LSR_14"},
296     {{cs, r6, r5, LSR, 14}, true, cs, "cs r6 r5 LSR 14", "cs_r6_r5_LSR_14"},
297     {{ls, r7, r4, ASR, 22}, true, ls, "ls r7 r4 ASR 22", "ls_r7_r4_ASR_22"},
298     {{cs, r3, r2, ASR, 1}, true, cs, "cs r3 r2 ASR 1", "cs_r3_r2_ASR_1"},
299     {{ne, r7, r1, LSR, 30}, true, ne, "ne r7 r1 LSR 30", "ne_r7_r1_LSR_30"},
300     {{ge, r3, r6, LSR, 32}, true, ge, "ge r3 r6 LSR 32", "ge_r3_r6_LSR_32"},
301     {{ne, r2, r5, ASR, 11}, true, ne, "ne r2 r5 ASR 11", "ne_r2_r5_ASR_11"},
302     {{cc, r4, r4, LSR, 4}, true, cc, "cc r4 r4 LSR 4", "cc_r4_r4_LSR_4"},
303     {{lt, r6, r0, ASR, 31}, true, lt, "lt r6 r0 ASR 31", "lt_r6_r0_ASR_31"},
304     {{cc, r7, r0, LSR, 26}, true, cc, "cc r7 r0 LSR 26", "cc_r7_r0_LSR_26"},
305     {{vs, r1, r4, LSR, 31}, true, vs, "vs r1 r4 LSR 31", "vs_r1_r4_LSR_31"},
306     {{vc, r3, r6, LSR, 11}, true, vc, "vc r3 r6 LSR 11", "vc_r3_r6_LSR_11"},
307     {{cs, r0, r4, LSR, 26}, true, cs, "cs r0 r4 LSR 26", "cs_r0_r4_LSR_26"},
308     {{eq, r0, r6, ASR, 31}, true, eq, "eq r0 r6 ASR 31", "eq_r0_r6_ASR_31"},
309     {{eq, r0, r1, ASR, 27}, true, eq, "eq r0 r1 ASR 27", "eq_r0_r1_ASR_27"},
310     {{ls, r2, r0, LSR, 16}, true, ls, "ls r2 r0 LSR 16", "ls_r2_r0_LSR_16"},
311     {{vs, r1, r7, LSR, 10}, true, vs, "vs r1 r7 LSR 10", "vs_r1_r7_LSR_10"},
312     {{gt, r1, r2, ASR, 7}, true, gt, "gt r1 r2 ASR 7", "gt_r1_r2_ASR_7"},
313     {{vc, r6, r5, LSR, 6}, true, vc, "vc r6 r5 LSR 6", "vc_r6_r5_LSR_6"},
314     {{ge, r7, r2, ASR, 4}, true, ge, "ge r7 r2 ASR 4", "ge_r7_r2_ASR_4"},
315     {{cs, r6, r0, LSR, 24}, true, cs, "cs r6 r0 LSR 24", "cs_r6_r0_LSR_24"},
316     {{vc, r3, r0, LSR, 25}, true, vc, "vc r3 r0 LSR 25", "vc_r3_r0_LSR_25"},
317     {{vc, r6, r6, ASR, 4}, true, vc, "vc r6 r6 ASR 4", "vc_r6_r6_ASR_4"},
318     {{vc, r1, r3, LSR, 15}, true, vc, "vc r1 r3 LSR 15", "vc_r1_r3_LSR_15"},
319     {{cc, r4, r2, ASR, 26}, true, cc, "cc r4 r2 ASR 26", "cc_r4_r2_ASR_26"},
320     {{pl, r2, r2, LSR, 10}, true, pl, "pl r2 r2 LSR 10", "pl_r2_r2_LSR_10"},
321     {{pl, r3, r0, LSR, 27}, true, pl, "pl r3 r0 LSR 27", "pl_r3_r0_LSR_27"},
322     {{pl, r7, r7, LSR, 21}, true, pl, "pl r7 r7 LSR 21", "pl_r7_r7_LSR_21"},
323     {{le, r3, r3, LSR, 31}, true, le, "le r3 r3 LSR 31", "le_r3_r3_LSR_31"},
324     {{ge, r2, r2, LSR, 10}, true, ge, "ge r2 r2 LSR 10", "ge_r2_r2_LSR_10"},
325     {{le, r2, r1, LSR, 20}, true, le, "le r2 r1 LSR 20", "le_r2_r1_LSR_20"},
326     {{eq, r3, r3, LSR, 4}, true, eq, "eq r3 r3 LSR 4", "eq_r3_r3_LSR_4"},
327     {{mi, r3, r6, ASR, 7}, true, mi, "mi r3 r6 ASR 7", "mi_r3_r6_ASR_7"},
328     {{hi, r2, r6, ASR, 29}, true, hi, "hi r2 r6 ASR 29", "hi_r2_r6_ASR_29"},
329     {{pl, r2, r0, LSR, 14}, true, pl, "pl r2 r0 LSR 14", "pl_r2_r0_LSR_14"},
330     {{gt, r0, r7, ASR, 26}, true, gt, "gt r0 r7 ASR 26", "gt_r0_r7_ASR_26"},
331     {{lt, r1, r6, LSR, 20}, true, lt, "lt r1 r6 LSR 20", "lt_r1_r6_LSR_20"},
332     {{le, r7, r1, ASR, 20}, true, le, "le r7 r1 ASR 20", "le_r7_r1_ASR_20"},
333     {{mi, r5, r5, LSR, 7}, true, mi, "mi r5 r5 LSR 7", "mi_r5_r5_LSR_7"},
334     {{cc, r2, r3, LSR, 23}, true, cc, "cc r2 r3 LSR 23", "cc_r2_r3_LSR_23"},
335     {{gt, r4, r2, LSR, 4}, true, gt, "gt r4 r2 LSR 4", "gt_r4_r2_LSR_4"},
336     {{vc, r3, r0, LSR, 32}, true, vc, "vc r3 r0 LSR 32", "vc_r3_r0_LSR_32"},
337     {{mi, r4, r0, LSR, 15}, true, mi, "mi r4 r0 LSR 15", "mi_r4_r0_LSR_15"},
338     {{pl, r4, r2, ASR, 19}, true, pl, "pl r4 r2 ASR 19", "pl_r4_r2_ASR_19"},
339     {{ge, r3, r3, ASR, 3}, true, ge, "ge r3 r3 ASR 3", "ge_r3_r3_ASR_3"},
340     {{cc, r4, r1, ASR, 11}, true, cc, "cc r4 r1 ASR 11", "cc_r4_r1_ASR_11"},
341     {{ne, r4, r1, LSR, 14}, true, ne, "ne r4 r1 LSR 14", "ne_r4_r1_LSR_14"},
342     {{hi, r4, r7, ASR, 29}, true, hi, "hi r4 r7 ASR 29", "hi_r4_r7_ASR_29"},
343     {{ls, r0, r2, LSR, 6}, true, ls, "ls r0 r2 LSR 6", "ls_r0_r2_LSR_6"},
344     {{hi, r3, r0, LSR, 18}, true, hi, "hi r3 r0 LSR 18", "hi_r3_r0_LSR_18"},
345     {{ge, r2, r5, ASR, 27}, true, ge, "ge r2 r5 ASR 27", "ge_r2_r5_ASR_27"},
346     {{vs, r6, r3, ASR, 10}, true, vs, "vs r6 r3 ASR 10", "vs_r6_r3_ASR_10"},
347     {{cs, r7, r2, LSR, 19}, true, cs, "cs r7 r2 LSR 19", "cs_r7_r2_LSR_19"},
348     {{vs, r2, r6, ASR, 4}, true, vs, "vs r2 r6 ASR 4", "vs_r2_r6_ASR_4"},
349     {{vs, r3, r2, ASR, 26}, true, vs, "vs r3 r2 ASR 26", "vs_r3_r2_ASR_26"},
350     {{gt, r3, r3, LSR, 14}, true, gt, "gt r3 r3 LSR 14", "gt_r3_r3_LSR_14"},
351     {{mi, r1, r3, ASR, 20}, true, mi, "mi r1 r3 ASR 20", "mi_r1_r3_ASR_20"},
352     {{eq, r2, r0, LSR, 3}, true, eq, "eq r2 r0 LSR 3", "eq_r2_r0_LSR_3"},
353     {{lt, r4, r3, LSR, 14}, true, lt, "lt r4 r3 LSR 14", "lt_r4_r3_LSR_14"},
354     {{vs, r2, r7, ASR, 13}, true, vs, "vs r2 r7 ASR 13", "vs_r2_r7_ASR_13"},
355     {{ls, r4, r1, ASR, 31}, true, ls, "ls r4 r1 ASR 31", "ls_r4_r1_ASR_31"},
356     {{le, r4, r3, ASR, 17}, true, le, "le r4 r3 ASR 17", "le_r4_r3_ASR_17"},
357     {{mi, r7, r0, LSR, 14}, true, mi, "mi r7 r0 LSR 14", "mi_r7_r0_LSR_14"},
358     {{ne, r5, r6, LSR, 6}, true, ne, "ne r5 r6 LSR 6", "ne_r5_r6_LSR_6"},
359     {{lt, r5, r2, LSR, 6}, true, lt, "lt r5 r2 LSR 6", "lt_r5_r2_LSR_6"},
360     {{gt, r6, r1, ASR, 30}, true, gt, "gt r6 r1 ASR 30", "gt_r6_r1_ASR_30"},
361     {{ne, r7, r7, ASR, 30}, true, ne, "ne r7 r7 ASR 30", "ne_r7_r7_ASR_30"},
362     {{ls, r5, r1, ASR, 25}, true, ls, "ls r5 r1 ASR 25", "ls_r5_r1_ASR_25"},
363     {{lt, r3, r2, LSR, 29}, true, lt, "lt r3 r2 LSR 29", "lt_r3_r2_LSR_29"},
364     {{le, r6, r1, LSR, 6}, true, le, "le r6 r1 LSR 6", "le_r6_r1_LSR_6"},
365     {{gt, r7, r6, ASR, 12}, true, gt, "gt r7 r6 ASR 12", "gt_r7_r6_ASR_12"},
366     {{ls, r6, r2, ASR, 10}, true, ls, "ls r6 r2 ASR 10", "ls_r6_r2_ASR_10"},
367     {{ne, r7, r7, LSR, 6}, true, ne, "ne r7 r7 LSR 6", "ne_r7_r7_LSR_6"},
368     {{mi, r0, r3, ASR, 5}, true, mi, "mi r0 r3 ASR 5", "mi_r0_r3_ASR_5"},
369     {{ne, r0, r4, LSR, 3}, true, ne, "ne r0 r4 LSR 3", "ne_r0_r4_LSR_3"},
370     {{ge, r3, r4, ASR, 16}, true, ge, "ge r3 r4 ASR 16", "ge_r3_r4_ASR_16"},
371     {{ls, r4, r5, ASR, 19}, true, ls, "ls r4 r5 ASR 19", "ls_r4_r5_ASR_19"},
372     {{eq, r1, r7, ASR, 21}, true, eq, "eq r1 r7 ASR 21", "eq_r1_r7_ASR_21"},
373     {{hi, r6, r4, ASR, 30}, true, hi, "hi r6 r4 ASR 30", "hi_r6_r4_ASR_30"},
374     {{eq, r7, r1, LSR, 3}, true, eq, "eq r7 r1 LSR 3", "eq_r7_r1_LSR_3"},
375     {{pl, r6, r2, ASR, 12}, true, pl, "pl r6 r2 ASR 12", "pl_r6_r2_ASR_12"},
376     {{eq, r6, r3, LSR, 28}, true, eq, "eq r6 r3 LSR 28", "eq_r6_r3_LSR_28"},
377     {{cc, r6, r6, LSR, 5}, true, cc, "cc r6 r6 LSR 5", "cc_r6_r6_LSR_5"},
378     {{le, r2, r4, ASR, 3}, true, le, "le r2 r4 ASR 3", "le_r2_r4_ASR_3"},
379     {{vc, r7, r4, LSR, 30}, true, vc, "vc r7 r4 LSR 30", "vc_r7_r4_LSR_30"},
380     {{ge, r0, r0, LSR, 25}, true, ge, "ge r0 r0 LSR 25", "ge_r0_r0_LSR_25"},
381     {{ls, r0, r2, ASR, 27}, true, ls, "ls r0 r2 ASR 27", "ls_r0_r2_ASR_27"},
382     {{cc, r5, r6, LSR, 22}, true, cc, "cc r5 r6 LSR 22", "cc_r5_r6_LSR_22"},
383     {{lt, r0, r4, LSR, 17}, true, lt, "lt r0 r4 LSR 17", "lt_r0_r4_LSR_17"},
384     {{le, r0, r4, ASR, 1}, true, le, "le r0 r4 ASR 1", "le_r0_r4_ASR_1"},
385     {{hi, r5, r5, ASR, 6}, true, hi, "hi r5 r5 ASR 6", "hi_r5_r5_ASR_6"},
386     {{vc, r7, r0, LSR, 16}, true, vc, "vc r7 r0 LSR 16", "vc_r7_r0_LSR_16"},
387     {{ne, r6, r1, ASR, 16}, true, ne, "ne r6 r1 ASR 16", "ne_r6_r1_ASR_16"},
388     {{vs, r7, r0, LSR, 31}, true, vs, "vs r7 r0 LSR 31", "vs_r7_r0_LSR_31"},
389     {{ne, r3, r2, ASR, 18}, true, ne, "ne r3 r2 ASR 18", "ne_r3_r2_ASR_18"},
390     {{vs, r2, r2, LSR, 18}, true, vs, "vs r2 r2 LSR 18", "vs_r2_r2_LSR_18"},
391     {{mi, r6, r2, ASR, 25}, true, mi, "mi r6 r2 ASR 25", "mi_r6_r2_ASR_25"},
392     {{hi, r7, r6, ASR, 28}, true, hi, "hi r7 r6 ASR 28", "hi_r7_r6_ASR_28"},
393     {{gt, r2, r1, ASR, 3}, true, gt, "gt r2 r1 ASR 3", "gt_r2_r1_ASR_3"},
394     {{ne, r0, r1, ASR, 31}, true, ne, "ne r0 r1 ASR 31", "ne_r0_r1_ASR_31"},
395     {{hi, r2, r7, ASR, 24}, true, hi, "hi r2 r7 ASR 24", "hi_r2_r7_ASR_24"},
396     {{hi, r2, r5, ASR, 30}, true, hi, "hi r2 r5 ASR 30", "hi_r2_r5_ASR_30"},
397     {{gt, r3, r2, ASR, 11}, true, gt, "gt r3 r2 ASR 11", "gt_r3_r2_ASR_11"},
398     {{ge, r4, r0, ASR, 3}, true, ge, "ge r4 r0 ASR 3", "ge_r4_r0_ASR_3"},
399     {{mi, r0, r4, LSR, 19}, true, mi, "mi r0 r4 LSR 19", "mi_r0_r4_LSR_19"},
400     {{gt, r0, r5, ASR, 30}, true, gt, "gt r0 r5 ASR 30", "gt_r0_r5_ASR_30"},
401     {{vs, r0, r3, LSR, 16}, true, vs, "vs r0 r3 LSR 16", "vs_r0_r3_LSR_16"},
402     {{ls, r4, r1, LSR, 3}, true, ls, "ls r4 r1 LSR 3", "ls_r4_r1_LSR_3"},
403     {{vc, r4, r3, ASR, 17}, true, vc, "vc r4 r3 ASR 17", "vc_r4_r3_ASR_17"},
404     {{gt, r0, r1, LSR, 5}, true, gt, "gt r0 r1 LSR 5", "gt_r0_r1_LSR_5"},
405     {{ls, r1, r4, ASR, 6}, true, ls, "ls r1 r4 ASR 6", "ls_r1_r4_ASR_6"},
406     {{ge, r1, r1, ASR, 23}, true, ge, "ge r1 r1 ASR 23", "ge_r1_r1_ASR_23"},
407     {{hi, r1, r3, ASR, 28}, true, hi, "hi r1 r3 ASR 28", "hi_r1_r3_ASR_28"},
408     {{vc, r1, r1, ASR, 11}, true, vc, "vc r1 r1 ASR 11", "vc_r1_r1_ASR_11"},
409     {{le, r0, r4, ASR, 24}, true, le, "le r0 r4 ASR 24", "le_r0_r4_ASR_24"},
410     {{cc, r4, r7, LSR, 4}, true, cc, "cc r4 r7 LSR 4", "cc_r4_r7_LSR_4"},
411     {{hi, r6, r2, LSR, 7}, true, hi, "hi r6 r2 LSR 7", "hi_r6_r2_LSR_7"},
412     {{le, r1, r1, LSR, 22}, true, le, "le r1 r1 LSR 22", "le_r1_r1_LSR_22"},
413     {{le, r6, r4, LSR, 6}, true, le, "le r6 r4 LSR 6", "le_r6_r4_LSR_6"},
414     {{le, r2, r5, ASR, 11}, true, le, "le r2 r5 ASR 11", "le_r2_r5_ASR_11"},
415     {{vc, r5, r1, ASR, 2}, true, vc, "vc r5 r1 ASR 2", "vc_r5_r1_ASR_2"},
416     {{lt, r7, r4, LSR, 31}, true, lt, "lt r7 r4 LSR 31", "lt_r7_r4_LSR_31"},
417     {{hi, r6, r1, LSR, 28}, true, hi, "hi r6 r1 LSR 28", "hi_r6_r1_LSR_28"},
418     {{ne, r7, r7, LSR, 24}, true, ne, "ne r7 r7 LSR 24", "ne_r7_r7_LSR_24"},
419     {{ge, r7, r6, LSR, 32}, true, ge, "ge r7 r6 LSR 32", "ge_r7_r6_LSR_32"},
420     {{hi, r6, r4, LSR, 25}, true, hi, "hi r6 r4 LSR 25", "hi_r6_r4_LSR_25"},
421     {{pl, r2, r6, ASR, 3}, true, pl, "pl r2 r6 ASR 3", "pl_r2_r6_ASR_3"},
422     {{ls, r5, r1, LSR, 20}, true, ls, "ls r5 r1 LSR 20", "ls_r5_r1_LSR_20"},
423     {{hi, r1, r1, LSR, 10}, true, hi, "hi r1 r1 LSR 10", "hi_r1_r1_LSR_10"},
424     {{lt, r6, r1, ASR, 29}, true, lt, "lt r6 r1 ASR 29", "lt_r6_r1_ASR_29"},
425     {{mi, r7, r5, ASR, 14}, true, mi, "mi r7 r5 ASR 14", "mi_r7_r5_ASR_14"},
426     {{le, r1, r0, ASR, 5}, true, le, "le r1 r0 ASR 5", "le_r1_r0_ASR_5"},
427     {{gt, r7, r2, ASR, 18}, true, gt, "gt r7 r2 ASR 18", "gt_r7_r2_ASR_18"},
428     {{pl, r5, r4, LSR, 12}, true, pl, "pl r5 r4 LSR 12", "pl_r5_r4_LSR_12"},
429     {{mi, r1, r3, ASR, 21}, true, mi, "mi r1 r3 ASR 21", "mi_r1_r3_ASR_21"},
430     {{mi, r7, r7, LSR, 13}, true, mi, "mi r7 r7 LSR 13", "mi_r7_r7_LSR_13"},
431     {{gt, r1, r4, LSR, 7}, true, gt, "gt r1 r4 LSR 7", "gt_r1_r4_LSR_7"},
432     {{vc, r5, r5, ASR, 28}, true, vc, "vc r5 r5 ASR 28", "vc_r5_r5_ASR_28"},
433     {{mi, r3, r3, LSR, 24}, true, mi, "mi r3 r3 LSR 24", "mi_r3_r3_LSR_24"},
434     {{ls, r4, r7, LSR, 32}, true, ls, "ls r4 r7 LSR 32", "ls_r4_r7_LSR_32"},
435     {{mi, r1, r4, LSR, 18}, true, mi, "mi r1 r4 LSR 18", "mi_r1_r4_LSR_18"},
436     {{le, r3, r6, LSR, 10}, true, le, "le r3 r6 LSR 10", "le_r3_r6_LSR_10"},
437     {{gt, r3, r3, ASR, 17}, true, gt, "gt r3 r3 ASR 17", "gt_r3_r3_ASR_17"},
438     {{ls, r1, r5, LSR, 25}, true, ls, "ls r1 r5 LSR 25", "ls_r1_r5_LSR_25"},
439     {{vs, r1, r0, ASR, 11}, true, vs, "vs r1 r0 ASR 11", "vs_r1_r0_ASR_11"},
440     {{cs, r0, r6, ASR, 17}, true, cs, "cs r0 r6 ASR 17", "cs_r0_r6_ASR_17"},
441     {{cs, r0, r6, LSR, 14}, true, cs, "cs r0 r6 LSR 14", "cs_r0_r6_LSR_14"},
442     {{lt, r4, r6, LSR, 13}, true, lt, "lt r4 r6 LSR 13", "lt_r4_r6_LSR_13"},
443     {{vs, r6, r4, ASR, 23}, true, vs, "vs r6 r4 ASR 23", "vs_r6_r4_ASR_23"},
444     {{cc, r4, r4, ASR, 12}, true, cc, "cc r4 r4 ASR 12", "cc_r4_r4_ASR_12"},
445     {{lt, r1, r6, LSR, 28}, true, lt, "lt r1 r6 LSR 28", "lt_r1_r6_LSR_28"},
446     {{cc, r4, r2, ASR, 2}, true, cc, "cc r4 r2 ASR 2", "cc_r4_r2_ASR_2"},
447     {{ls, r2, r0, ASR, 27}, true, ls, "ls r2 r0 ASR 27", "ls_r2_r0_ASR_27"},
448     {{le, r6, r3, LSR, 32}, true, le, "le r6 r3 LSR 32", "le_r6_r3_LSR_32"},
449     {{cs, r6, r7, ASR, 10}, true, cs, "cs r6 r7 ASR 10", "cs_r6_r7_ASR_10"},
450     {{vs, r0, r1, ASR, 31}, true, vs, "vs r0 r1 ASR 31", "vs_r0_r1_ASR_31"},
451     {{vc, r2, r3, ASR, 2}, true, vc, "vc r2 r3 ASR 2", "vc_r2_r3_ASR_2"},
452     {{ge, r1, r7, ASR, 24}, true, ge, "ge r1 r7 ASR 24", "ge_r1_r7_ASR_24"},
453     {{eq, r3, r2, LSR, 21}, true, eq, "eq r3 r2 LSR 21", "eq_r3_r2_LSR_21"},
454     {{ge, r4, r3, ASR, 22}, true, ge, "ge r4 r3 ASR 22", "ge_r4_r3_ASR_22"},
455     {{hi, r2, r0, LSR, 1}, true, hi, "hi r2 r0 LSR 1", "hi_r2_r0_LSR_1"},
456     {{vs, r2, r4, LSR, 9}, true, vs, "vs r2 r4 LSR 9", "vs_r2_r4_LSR_9"},
457     {{ls, r5, r3, LSR, 20}, true, ls, "ls r5 r3 LSR 20", "ls_r5_r3_LSR_20"},
458     {{cs, r4, r0, ASR, 5}, true, cs, "cs r4 r0 ASR 5", "cs_r4_r0_ASR_5"},
459     {{lt, r6, r2, LSR, 5}, true, lt, "lt r6 r2 LSR 5", "lt_r6_r2_LSR_5"},
460     {{ls, r4, r6, LSR, 24}, true, ls, "ls r4 r6 LSR 24", "ls_r4_r6_LSR_24"},
461     {{le, r6, r3, LSR, 26}, true, le, "le r6 r3 LSR 26", "le_r6_r3_LSR_26"},
462     {{ne, r4, r5, ASR, 27}, true, ne, "ne r4 r5 ASR 27", "ne_r4_r5_ASR_27"},
463     {{hi, r2, r1, LSR, 19}, true, hi, "hi r2 r1 LSR 19", "hi_r2_r1_LSR_19"},
464     {{mi, r2, r3, LSR, 17}, true, mi, "mi r2 r3 LSR 17", "mi_r2_r3_LSR_17"},
465     {{eq, r6, r4, LSR, 3}, true, eq, "eq r6 r4 LSR 3", "eq_r6_r4_LSR_3"},
466     {{ne, r3, r1, LSR, 5}, true, ne, "ne r3 r1 LSR 5", "ne_r3_r1_LSR_5"},
467     {{vs, r1, r4, ASR, 4}, true, vs, "vs r1 r4 ASR 4", "vs_r1_r4_ASR_4"},
468     {{ls, r0, r3, LSR, 22}, true, ls, "ls r0 r3 LSR 22", "ls_r0_r3_LSR_22"},
469     {{mi, r6, r4, LSR, 1}, true, mi, "mi r6 r4 LSR 1", "mi_r6_r4_LSR_1"},
470     {{hi, r5, r4, LSR, 12}, true, hi, "hi r5 r4 LSR 12", "hi_r5_r4_LSR_12"},
471     {{le, r0, r3, LSR, 3}, true, le, "le r0 r3 LSR 3", "le_r0_r3_LSR_3"},
472     {{pl, r1, r6, LSR, 30}, true, pl, "pl r1 r6 LSR 30", "pl_r1_r6_LSR_30"},
473     {{ne, r7, r2, ASR, 31}, true, ne, "ne r7 r2 ASR 31", "ne_r7_r2_ASR_31"},
474     {{ge, r6, r2, ASR, 11}, true, ge, "ge r6 r2 ASR 11", "ge_r6_r2_ASR_11"},
475     {{pl, r0, r1, LSR, 28}, true, pl, "pl r0 r1 LSR 28", "pl_r0_r1_LSR_28"},
476     {{lt, r6, r4, LSR, 23}, true, lt, "lt r6 r4 LSR 23", "lt_r6_r4_LSR_23"},
477     {{mi, r2, r4, LSR, 1}, true, mi, "mi r2 r4 LSR 1", "mi_r2_r4_LSR_1"},
478     {{mi, r7, r3, ASR, 18}, true, mi, "mi r7 r3 ASR 18", "mi_r7_r3_ASR_18"},
479     {{ls, r4, r1, LSR, 24}, true, ls, "ls r4 r1 LSR 24", "ls_r4_r1_LSR_24"},
480     {{ne, r4, r4, ASR, 7}, true, ne, "ne r4 r4 ASR 7", "ne_r4_r4_ASR_7"},
481     {{lt, r4, r4, ASR, 23}, true, lt, "lt r4 r4 ASR 23", "lt_r4_r4_ASR_23"},
482     {{vs, r7, r2, ASR, 24}, true, vs, "vs r7 r2 ASR 24", "vs_r7_r2_ASR_24"},
483     {{cs, r2, r4, ASR, 24}, true, cs, "cs r2 r4 ASR 24", "cs_r2_r4_ASR_24"},
484     {{ge, r6, r0, LSR, 9}, true, ge, "ge r6 r0 LSR 9", "ge_r6_r0_LSR_9"},
485     {{mi, r2, r1, ASR, 10}, true, mi, "mi r2 r1 ASR 10", "mi_r2_r1_ASR_10"},
486     {{mi, r6, r3, ASR, 13}, true, mi, "mi r6 r3 ASR 13", "mi_r6_r3_ASR_13"},
487     {{vc, r4, r6, ASR, 28}, true, vc, "vc r4 r6 ASR 28", "vc_r4_r6_ASR_28"},
488     {{pl, r6, r7, ASR, 1}, true, pl, "pl r6 r7 ASR 1", "pl_r6_r7_ASR_1"},
489     {{gt, r1, r2, ASR, 18}, true, gt, "gt r1 r2 ASR 18", "gt_r1_r2_ASR_18"},
490     {{hi, r6, r2, LSR, 32}, true, hi, "hi r6 r2 LSR 32", "hi_r6_r2_LSR_32"},
491     {{eq, r3, r0, ASR, 10}, true, eq, "eq r3 r0 ASR 10", "eq_r3_r0_ASR_10"},
492     {{mi, r0, r3, ASR, 8}, true, mi, "mi r0 r3 ASR 8", "mi_r0_r3_ASR_8"},
493     {{pl, r6, r0, ASR, 27}, true, pl, "pl r6 r0 ASR 27", "pl_r6_r0_ASR_27"},
494     {{lt, r6, r4, ASR, 28}, true, lt, "lt r6 r4 ASR 28", "lt_r6_r4_ASR_28"},
495     {{ne, r6, r3, ASR, 25}, true, ne, "ne r6 r3 ASR 25", "ne_r6_r3_ASR_25"},
496     {{lt, r1, r1, LSR, 16}, true, lt, "lt r1 r1 LSR 16", "lt_r1_r1_LSR_16"},
497     {{vs, r4, r3, ASR, 18}, true, vs, "vs r4 r3 ASR 18", "vs_r4_r3_ASR_18"},
498     {{vs, r3, r5, LSR, 16}, true, vs, "vs r3 r5 LSR 16", "vs_r3_r5_LSR_16"},
499     {{le, r6, r1, LSR, 31}, true, le, "le r6 r1 LSR 31", "le_r6_r1_LSR_31"},
500     {{ls, r6, r3, LSR, 14}, true, ls, "ls r6 r3 LSR 14", "ls_r6_r3_LSR_14"},
501     {{pl, r3, r6, ASR, 17}, true, pl, "pl r3 r6 ASR 17", "pl_r3_r6_ASR_17"},
502     {{vc, r7, r7, ASR, 1}, true, vc, "vc r7 r7 ASR 1", "vc_r7_r7_ASR_1"},
503     {{cc, r2, r0, ASR, 17}, true, cc, "cc r2 r0 ASR 17", "cc_r2_r0_ASR_17"},
504     {{le, r7, r1, LSR, 32}, true, le, "le r7 r1 LSR 32", "le_r7_r1_LSR_32"},
505     {{eq, r1, r3, ASR, 8}, true, eq, "eq r1 r3 ASR 8", "eq_r1_r3_ASR_8"},
506     {{vc, r4, r5, LSR, 18}, true, vc, "vc r4 r5 LSR 18", "vc_r4_r5_LSR_18"},
507     {{hi, r0, r2, ASR, 32}, true, hi, "hi r0 r2 ASR 32", "hi_r0_r2_ASR_32"},
508     {{le, r4, r6, ASR, 4}, true, le, "le r4 r6 ASR 4", "le_r4_r6_ASR_4"},
509     {{mi, r5, r5, ASR, 7}, true, mi, "mi r5 r5 ASR 7", "mi_r5_r5_ASR_7"},
510     {{eq, r6, r5, LSR, 24}, true, eq, "eq r6 r5 LSR 24", "eq_r6_r5_LSR_24"},
511     {{pl, r5, r5, ASR, 9}, true, pl, "pl r5 r5 ASR 9", "pl_r5_r5_ASR_9"},
512     {{ne, r6, r2, ASR, 24}, true, ne, "ne r6 r2 ASR 24", "ne_r6_r2_ASR_24"},
513     {{eq, r3, r7, ASR, 3}, true, eq, "eq r3 r7 ASR 3", "eq_r3_r7_ASR_3"},
514     {{lt, r6, r0, LSR, 25}, true, lt, "lt r6 r0 LSR 25", "lt_r6_r0_LSR_25"},
515     {{ls, r5, r5, ASR, 8}, true, ls, "ls r5 r5 ASR 8", "ls_r5_r5_ASR_8"},
516     {{hi, r5, r6, ASR, 17}, true, hi, "hi r5 r6 ASR 17", "hi_r5_r6_ASR_17"},
517     {{ne, r4, r0, ASR, 18}, true, ne, "ne r4 r0 ASR 18", "ne_r4_r0_ASR_18"},
518     {{mi, r2, r4, LSR, 30}, true, mi, "mi r2 r4 LSR 30", "mi_r2_r4_LSR_30"},
519     {{cc, r1, r6, ASR, 5}, true, cc, "cc r1 r6 ASR 5", "cc_r1_r6_ASR_5"},
520     {{hi, r7, r2, LSR, 15}, true, hi, "hi r7 r2 LSR 15", "hi_r7_r2_LSR_15"},
521     {{cc, r7, r7, ASR, 29}, true, cc, "cc r7 r7 ASR 29", "cc_r7_r7_ASR_29"},
522     {{eq, r7, r4, ASR, 22}, true, eq, "eq r7 r4 ASR 22", "eq_r7_r4_ASR_22"},
523     {{mi, r3, r3, ASR, 2}, true, mi, "mi r3 r3 ASR 2", "mi_r3_r3_ASR_2"},
524     {{le, r2, r5, LSR, 14}, true, le, "le r2 r5 LSR 14", "le_r2_r5_LSR_14"},
525     {{pl, r6, r5, ASR, 12}, true, pl, "pl r6 r5 ASR 12", "pl_r6_r5_ASR_12"},
526     {{ne, r5, r6, LSR, 11}, true, ne, "ne r5 r6 LSR 11", "ne_r5_r6_LSR_11"},
527     {{cs, r0, r1, ASR, 29}, true, cs, "cs r0 r1 ASR 29", "cs_r0_r1_ASR_29"},
528     {{cc, r3, r6, LSR, 5}, true, cc, "cc r3 r6 LSR 5", "cc_r3_r6_LSR_5"},
529     {{ge, r5, r4, LSR, 10}, true, ge, "ge r5 r4 LSR 10", "ge_r5_r4_LSR_10"},
530     {{vs, r7, r5, ASR, 9}, true, vs, "vs r7 r5 ASR 9", "vs_r7_r5_ASR_9"},
531     {{ge, r6, r4, LSR, 22}, true, ge, "ge r6 r4 LSR 22", "ge_r6_r4_LSR_22"},
532     {{vs, r0, r7, ASR, 20}, true, vs, "vs r0 r7 ASR 20", "vs_r0_r7_ASR_20"},
533     {{ls, r1, r5, LSR, 21}, true, ls, "ls r1 r5 LSR 21", "ls_r1_r5_LSR_21"},
534     {{cc, r3, r3, ASR, 16}, true, cc, "cc r3 r3 ASR 16", "cc_r3_r3_ASR_16"},
535     {{hi, r2, r3, ASR, 30}, true, hi, "hi r2 r3 ASR 30", "hi_r2_r3_ASR_30"},
536     {{cs, r5, r3, LSR, 12}, true, cs, "cs r5 r3 LSR 12", "cs_r5_r3_LSR_12"},
537     {{cc, r5, r5, ASR, 24}, true, cc, "cc r5 r5 ASR 24", "cc_r5_r5_ASR_24"},
538     {{vc, r7, r0, ASR, 18}, true, vc, "vc r7 r0 ASR 18", "vc_r7_r0_ASR_18"},
539     {{mi, r4, r7, ASR, 30}, true, mi, "mi r4 r7 ASR 30", "mi_r4_r7_ASR_30"},
540     {{vc, r6, r0, LSR, 17}, true, vc, "vc r6 r0 LSR 17", "vc_r6_r0_LSR_17"},
541     {{eq, r3, r3, ASR, 2}, true, eq, "eq r3 r3 ASR 2", "eq_r3_r3_ASR_2"},
542     {{ne, r5, r2, LSR, 31}, true, ne, "ne r5 r2 LSR 31", "ne_r5_r2_LSR_31"},
543     {{ne, r4, r2, ASR, 6}, true, ne, "ne r4 r2 ASR 6", "ne_r4_r2_ASR_6"},
544     {{eq, r3, r7, ASR, 25}, true, eq, "eq r3 r7 ASR 25", "eq_r3_r7_ASR_25"},
545     {{pl, r1, r7, LSR, 11}, true, pl, "pl r1 r7 LSR 11", "pl_r1_r7_LSR_11"},
546     {{lt, r4, r4, ASR, 1}, true, lt, "lt r4 r4 ASR 1", "lt_r4_r4_ASR_1"},
547     {{vc, r7, r4, LSR, 8}, true, vc, "vc r7 r4 LSR 8", "vc_r7_r4_LSR_8"},
548     {{ls, r1, r4, ASR, 4}, true, ls, "ls r1 r4 ASR 4", "ls_r1_r4_ASR_4"},
549     {{cc, r2, r4, LSR, 18}, true, cc, "cc r2 r4 LSR 18", "cc_r2_r4_LSR_18"},
550     {{gt, r0, r5, LSR, 8}, true, gt, "gt r0 r5 LSR 8", "gt_r0_r5_LSR_8"},
551     {{lt, r4, r1, LSR, 4}, true, lt, "lt r4 r1 LSR 4", "lt_r4_r1_LSR_4"},
552     {{gt, r7, r7, ASR, 12}, true, gt, "gt r7 r7 ASR 12", "gt_r7_r7_ASR_12"},
553     {{vs, r0, r6, LSR, 28}, true, vs, "vs r0 r6 LSR 28", "vs_r0_r6_LSR_28"},
554     {{vs, r0, r5, LSR, 25}, true, vs, "vs r0 r5 LSR 25", "vs_r0_r5_LSR_25"},
555     {{pl, r7, r1, ASR, 13}, true, pl, "pl r7 r1 ASR 13", "pl_r7_r1_ASR_13"},
556     {{le, r7, r0, LSR, 28}, true, le, "le r7 r0 LSR 28", "le_r7_r0_LSR_28"},
557     {{vs, r2, r5, LSR, 25}, true, vs, "vs r2 r5 LSR 25", "vs_r2_r5_LSR_25"},
558     {{cs, r0, r5, LSR, 14}, true, cs, "cs r0 r5 LSR 14", "cs_r0_r5_LSR_14"},
559     {{cs, r0, r5, ASR, 31}, true, cs, "cs r0 r5 ASR 31", "cs_r0_r5_ASR_31"},
560     {{pl, r5, r5, ASR, 13}, true, pl, "pl r5 r5 ASR 13", "pl_r5_r5_ASR_13"},
561     {{vc, r2, r1, LSR, 18}, true, vc, "vc r2 r1 LSR 18", "vc_r2_r1_LSR_18"},
562     {{hi, r2, r1, ASR, 31}, true, hi, "hi r2 r1 ASR 31", "hi_r2_r1_ASR_31"},
563     {{cc, r6, r0, LSR, 11}, true, cc, "cc r6 r0 LSR 11", "cc_r6_r0_LSR_11"},
564     {{pl, r6, r0, LSR, 1}, true, pl, "pl r6 r0 LSR 1", "pl_r6_r0_LSR_1"},
565     {{lt, r5, r1, LSR, 3}, true, lt, "lt r5 r1 LSR 3", "lt_r5_r1_LSR_3"},
566     {{eq, r3, r6, LSR, 2}, true, eq, "eq r3 r6 LSR 2", "eq_r3_r6_LSR_2"},
567     {{mi, r7, r3, ASR, 5}, true, mi, "mi r7 r3 ASR 5", "mi_r7_r3_ASR_5"},
568     {{vs, r5, r5, LSR, 3}, true, vs, "vs r5 r5 LSR 3", "vs_r5_r5_LSR_3"},
569     {{hi, r5, r3, ASR, 18}, true, hi, "hi r5 r3 ASR 18", "hi_r5_r3_ASR_18"},
570     {{cc, r1, r6, ASR, 13}, true, cc, "cc r1 r6 ASR 13", "cc_r1_r6_ASR_13"},
571     {{vs, r7, r1, LSR, 25}, true, vs, "vs r7 r1 LSR 25", "vs_r7_r1_LSR_25"},
572     {{lt, r1, r4, ASR, 22}, true, lt, "lt r1 r4 ASR 22", "lt_r1_r4_ASR_22"},
573     {{ls, r4, r5, LSR, 13}, true, ls, "ls r4 r5 LSR 13", "ls_r4_r5_LSR_13"},
574     {{cc, r4, r7, LSR, 26}, true, cc, "cc r4 r7 LSR 26", "cc_r4_r7_LSR_26"},
575     {{cs, r7, r7, LSR, 21}, true, cs, "cs r7 r7 LSR 21", "cs_r7_r7_LSR_21"},
576     {{lt, r4, r4, ASR, 2}, true, lt, "lt r4 r4 ASR 2", "lt_r4_r4_ASR_2"},
577     {{eq, r7, r1, ASR, 22}, true, eq, "eq r7 r1 ASR 22", "eq_r7_r1_ASR_22"},
578     {{vc, r7, r6, ASR, 32}, true, vc, "vc r7 r6 ASR 32", "vc_r7_r6_ASR_32"},
579     {{cs, r1, r7, LSR, 5}, true, cs, "cs r1 r7 LSR 5", "cs_r1_r7_LSR_5"},
580     {{vs, r6, r2, LSR, 19}, true, vs, "vs r6 r2 LSR 19", "vs_r6_r2_LSR_19"},
581     {{cs, r3, r2, ASR, 16}, true, cs, "cs r3 r2 ASR 16", "cs_r3_r2_ASR_16"},
582     {{vs, r2, r3, LSR, 27}, true, vs, "vs r2 r3 LSR 27", "vs_r2_r3_LSR_27"},
583     {{pl, r3, r3, LSR, 29}, true, pl, "pl r3 r3 LSR 29", "pl_r3_r3_LSR_29"},
584     {{lt, r3, r4, LSR, 24}, true, lt, "lt r3 r4 LSR 24", "lt_r3_r4_LSR_24"},
585     {{le, r0, r4, LSR, 15}, true, le, "le r0 r4 LSR 15", "le_r0_r4_LSR_15"},
586     {{ne, r6, r1, ASR, 8}, true, ne, "ne r6 r1 ASR 8", "ne_r6_r1_ASR_8"},
587     {{pl, r2, r1, LSR, 31}, true, pl, "pl r2 r1 LSR 31", "pl_r2_r1_LSR_31"},
588     {{vs, r1, r4, ASR, 19}, true, vs, "vs r1 r4 ASR 19", "vs_r1_r4_ASR_19"},
589     {{pl, r4, r1, LSR, 15}, true, pl, "pl r4 r1 LSR 15", "pl_r4_r1_LSR_15"},
590     {{pl, r0, r7, LSR, 10}, true, pl, "pl r0 r7 LSR 10", "pl_r0_r7_LSR_10"},
591     {{eq, r6, r0, ASR, 7}, true, eq, "eq r6 r0 ASR 7", "eq_r6_r0_ASR_7"},
592     {{ne, r2, r6, LSR, 12}, true, ne, "ne r2 r6 LSR 12", "ne_r2_r6_LSR_12"},
593     {{ls, r0, r3, ASR, 4}, true, ls, "ls r0 r3 ASR 4", "ls_r0_r3_ASR_4"},
594     {{cs, r3, r5, ASR, 11}, true, cs, "cs r3 r5 ASR 11", "cs_r3_r5_ASR_11"},
595     {{gt, r7, r0, ASR, 19}, true, gt, "gt r7 r0 ASR 19", "gt_r7_r0_ASR_19"}};
596
597// These headers each contain an array of `TestResult` with the reference output
598// values. The reference arrays are names `kReference{mnemonic}`.
599#include "aarch32/traces/assembler-cond-rd-operand-rn-shift-amount-1to32-in-it-block-mov-t32.h"
600
601
602// The maximum number of errors to report in detail for each test.
603const unsigned kErrorReportLimit = 8;
604
605typedef void (MacroAssembler::*Fn)(Condition cond,
606                                   Register rd,
607                                   const Operand& op);
608
609void TestHelper(Fn instruction,
610                const char* mnemonic,
611                const TestResult reference[]) {
612  unsigned total_error_count = 0;
613  MacroAssembler masm(BUF_SIZE);
614
615  masm.UseT32();
616
617  for (unsigned i = 0; i < ARRAY_SIZE(kTests); i++) {
618    // Values to pass to the macro-assembler.
619    Condition cond = kTests[i].operands.cond;
620    Register rd = kTests[i].operands.rd;
621    Register rn = kTests[i].operands.rn;
622    ShiftType shift = kTests[i].operands.shift;
623    uint32_t amount = kTests[i].operands.amount;
624    Operand op(rn, shift, amount);
625
626    int32_t start = masm.GetCursorOffset();
627    {
628      // We never generate more that 4 bytes, as IT instructions are only
629      // allowed for narrow encodings.
630      ExactAssemblyScope scope(&masm, 4, ExactAssemblyScope::kMaximumSize);
631      if (kTests[i].in_it_block) {
632        masm.it(kTests[i].it_condition);
633      }
634      (masm.*instruction)(cond, rd, op);
635    }
636    int32_t end = masm.GetCursorOffset();
637
638    const byte* result_ptr =
639        masm.GetBuffer()->GetOffsetAddress<const byte*>(start);
640    VIXL_ASSERT(start < end);
641    uint32_t result_size = end - start;
642
643    if (Test::generate_test_trace()) {
644      // Print the result bytes.
645      printf("const byte kInstruction_%s_%s[] = {\n",
646             mnemonic,
647             kTests[i].identifier);
648      for (uint32_t j = 0; j < result_size; j++) {
649        if (j == 0) {
650          printf("  0x%02" PRIx8, result_ptr[j]);
651        } else {
652          printf(", 0x%02" PRIx8, result_ptr[j]);
653        }
654      }
655      // This comment is meant to be used by external tools to validate
656      // the encoding. We can parse the comment to figure out what
657      // instruction this corresponds to.
658      if (kTests[i].in_it_block) {
659        printf(" // It %s; %s %s\n};\n",
660               kTests[i].it_condition.GetName(),
661               mnemonic,
662               kTests[i].operands_description);
663      } else {
664        printf(" // %s %s\n};\n", mnemonic, kTests[i].operands_description);
665      }
666    } else {
667      // Check we've emitted the exact same encoding as present in the
668      // trace file. Only print up to `kErrorReportLimit` errors.
669      if (((result_size != reference[i].size) ||
670           (memcmp(result_ptr, reference[i].encoding, reference[i].size) !=
671            0)) &&
672          (++total_error_count <= kErrorReportLimit)) {
673        printf("Error when testing \"%s\" with operands \"%s\":\n",
674               mnemonic,
675               kTests[i].operands_description);
676        printf("  Expected: ");
677        for (uint32_t j = 0; j < reference[i].size; j++) {
678          if (j == 0) {
679            printf("0x%02" PRIx8, reference[i].encoding[j]);
680          } else {
681            printf(", 0x%02" PRIx8, reference[i].encoding[j]);
682          }
683        }
684        printf("\n");
685        printf("  Found:    ");
686        for (uint32_t j = 0; j < result_size; j++) {
687          if (j == 0) {
688            printf("0x%02" PRIx8, result_ptr[j]);
689          } else {
690            printf(", 0x%02" PRIx8, result_ptr[j]);
691          }
692        }
693        printf("\n");
694      }
695    }
696  }
697
698  masm.FinalizeCode();
699
700  if (Test::generate_test_trace()) {
701    // Finalize the trace file by writing the final `TestResult` array
702    // which links all generated instruction encodings.
703    printf("const TestResult kReference%s[] = {\n", mnemonic);
704    for (unsigned i = 0; i < ARRAY_SIZE(kTests); i++) {
705      printf("  {\n");
706      printf("    ARRAY_SIZE(kInstruction_%s_%s),\n",
707             mnemonic,
708             kTests[i].identifier);
709      printf("    kInstruction_%s_%s,\n", mnemonic, kTests[i].identifier);
710      printf("  },\n");
711    }
712    printf("};\n");
713  } else {
714    if (total_error_count > kErrorReportLimit) {
715      printf("%u other errors follow.\n",
716             total_error_count - kErrorReportLimit);
717    }
718    // Crash if the test failed.
719    VIXL_CHECK(total_error_count == 0);
720  }
721}
722
723// Instantiate tests for each instruction in the list.
724#define TEST(mnemonic)                                                      \
725  void Test_##mnemonic() {                                                  \
726    TestHelper(&MacroAssembler::mnemonic, #mnemonic, kReference##mnemonic); \
727  }                                                                         \
728  Test test_##mnemonic(                                                     \
729      "AARCH32_ASSEMBLER_COND_RD_OPERAND_RN_SHIFT_AMOUNT_1TO32_IN_IT_"      \
730      "BLOCK_" #mnemonic "_T32",                                            \
731      &Test_##mnemonic);
732FOREACH_INSTRUCTION(TEST)
733#undef TEST
734
735}  // namespace
736#endif
737
738}  // namespace aarch32
739}  // namespace vixl
740