1/*-------------------------------------------------------------------------- 2Copyright (c) 2013, The Linux Foundation. All rights reserved. 3 4 Redistribution and use in source and binary forms, with or without 5 modification, are permitted provided that the following conditions 6 are met: 7 8 * Redistributions of source code must retain the above copyright 9 notice, this list of conditions and the following disclaimer. 10 * Redistributions in binary form must reproduce the above 11 copyright notice, this list of conditions and the following 12 disclaimer in the documentation and/or other materials provided 13 with the distribution. 14 * Neither the name of The Linux Foundation nor the names of its 15 contributors may be used to endorse or promote products derived 16 from this software without specific prior written permission. 17 18THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED 19WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 20MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT 21ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS 22BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 25BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 26WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE 27OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN 28IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29--------------------------------------------------------------------------*/ 30#ifndef __OMX_VDEC_HEVC_H__ 31#define __OMX_VDEC_HEVC_H__ 32/*============================================================================ 33 O p e n M A X Component 34 Video Decoder 35 36*//** @file comx_vdec_hevc.h 37 This module contains the class definition for openMAX decoder component. 38 39*//*========================================================================*/ 40 41////////////////////////////////////////////////////////////////////////////// 42// Include Files 43////////////////////////////////////////////////////////////////////////////// 44 45#include <stdlib.h> 46#include <stdio.h> 47#include <string.h> 48#include <inttypes.h> 49#include <cstddef> 50 51static ptrdiff_t x; 52 53#ifdef _ANDROID_ 54#ifdef MAX_RES_720P 55#define LOG_TAG "OMX-VDEC-720P" 56#elif MAX_RES_1080P 57#define LOG_TAG "OMX-VDEC-1080P" 58#else 59#define LOG_TAG "OMX-VDEC" 60#endif 61 62#ifdef USE_ION 63#include <linux/msm_ion.h> 64#endif 65#include <binder/MemoryHeapBase.h> 66#include <ui/ANativeObjectBase.h> 67extern "C" { 68#include <utils/Log.h> 69} 70#include <linux/videodev2.h> 71#include <poll.h> 72#include "hevc_utils.h" 73#define TIMEOUT 5000 74 75#endif // _ANDROID_ 76 77 78#if defined (_ANDROID_HONEYCOMB_) || defined (_ANDROID_ICS_) 79#include <media/hardware/HardwareAPI.h> 80#endif 81 82#include <unistd.h> 83 84#if defined (_ANDROID_ICS_) 85#include <gralloc_priv.h> 86#endif 87 88#include <pthread.h> 89#ifndef PC_DEBUG 90#include <semaphore.h> 91#endif 92#include "OMX_Core.h" 93#include "OMX_QCOMExtns.h" 94#include "qc_omx_component.h" 95#include <linux/msm_vidc_dec.h> 96#include <media/msm_vidc.h> 97#include "frameparser.h" 98#ifdef MAX_RES_1080P 99#include "mp4_utils.h" 100#endif 101#include "extra_data_handler.h" 102#include "ts_parser.h" 103#include "vidc_color_converter.h" 104#include "vidc_debug.h" 105extern "C" { 106 OMX_API void * get_omx_component_factory_fn(void); 107} 108 109#ifdef _ANDROID_ 110using namespace android; 111#ifdef USE_ION 112class VideoHeap : public MemoryHeapBase 113{ 114 public: 115 VideoHeap(int devicefd, size_t size, void* base,struct ion_handle *handle,int mapfd); 116 virtual ~VideoHeap() {} 117 private: 118 int m_ion_device_fd; 119 struct ion_handle *m_ion_handle; 120}; 121#else 122// local pmem heap object 123class VideoHeap : public MemoryHeapBase 124{ 125 public: 126 VideoHeap(int fd, size_t size, void* base); 127 virtual ~VideoHeap() {} 128}; 129#endif 130#endif // _ANDROID_ 131////////////////////////////////////////////////////////////////////////////// 132// Module specific globals 133////////////////////////////////////////////////////////////////////////////// 134#define OMX_SPEC_VERSION 0x00000101 135 136 137////////////////////////////////////////////////////////////////////////////// 138// Macros 139////////////////////////////////////////////////////////////////////////////// 140#define PrintFrameHdr(bufHdr) DEBUG_PRINT("bufHdr %x buf %x size %d TS %d\n",\ 141 (unsigned) bufHdr,\ 142 (unsigned)((OMX_BUFFERHEADERTYPE *)bufHdr)->pBuffer,\ 143 (unsigned)((OMX_BUFFERHEADERTYPE *)bufHdr)->nFilledLen,\ 144 (unsigned)((OMX_BUFFERHEADERTYPE *)bufHdr)->nTimeStamp) 145 146// BitMask Management logic 147#define BITS_PER_BYTE 32 148#define BITMASK_SIZE(mIndex) (((mIndex) + BITS_PER_BYTE - 1)/BITS_PER_BYTE) 149#define BITMASK_OFFSET(mIndex) ((mIndex)/BITS_PER_BYTE) 150#define BITMASK_FLAG(mIndex) (1 << ((mIndex) % BITS_PER_BYTE)) 151#define BITMASK_CLEAR(mArray,mIndex) (mArray)[BITMASK_OFFSET(mIndex)] \ 152 &= ~(BITMASK_FLAG(mIndex)) 153#define BITMASK_SET(mArray,mIndex) (mArray)[BITMASK_OFFSET(mIndex)] \ 154 |= BITMASK_FLAG(mIndex) 155#define BITMASK_PRESENT(mArray,mIndex) ((mArray)[BITMASK_OFFSET(mIndex)] \ 156 & BITMASK_FLAG(mIndex)) 157#define BITMASK_ABSENT(mArray,mIndex) (((mArray)[BITMASK_OFFSET(mIndex)] \ 158 & BITMASK_FLAG(mIndex)) == 0x0) 159#define BITMASK_PRESENT(mArray,mIndex) ((mArray)[BITMASK_OFFSET(mIndex)] \ 160 & BITMASK_FLAG(mIndex)) 161#define BITMASK_ABSENT(mArray,mIndex) (((mArray)[BITMASK_OFFSET(mIndex)] \ 162 & BITMASK_FLAG(mIndex)) == 0x0) 163 164#define OMX_CORE_CONTROL_CMDQ_SIZE 100 165#define OMX_CORE_QCIF_HEIGHT 144 166#define OMX_CORE_QCIF_WIDTH 176 167#define OMX_CORE_VGA_HEIGHT 480 168#define OMX_CORE_VGA_WIDTH 640 169#define OMX_CORE_WVGA_HEIGHT 480 170#define OMX_CORE_WVGA_WIDTH 800 171 172#define DESC_BUFFER_SIZE (8192 * 16) 173 174#ifdef _ANDROID_ 175#define MAX_NUM_INPUT_OUTPUT_BUFFERS 32 176#endif 177 178#define OMX_FRAMEINFO_EXTRADATA 0x00010000 179#define OMX_INTERLACE_EXTRADATA 0x00020000 180#define OMX_TIMEINFO_EXTRADATA 0x00040000 181#define OMX_PORTDEF_EXTRADATA 0x00080000 182#define OMX_EXTNUSER_EXTRADATA 0x00100000 183#define DRIVER_EXTRADATA_MASK 0x0000FFFF 184 185#define OMX_INTERLACE_EXTRADATA_SIZE ((sizeof(OMX_OTHER_EXTRADATATYPE) +\ 186 sizeof(OMX_STREAMINTERLACEFORMAT) + 3)&(~3)) 187#define OMX_FRAMEINFO_EXTRADATA_SIZE ((sizeof(OMX_OTHER_EXTRADATATYPE) +\ 188 sizeof(OMX_QCOM_EXTRADATA_FRAMEINFO) + 3)&(~3)) 189#define OMX_PORTDEF_EXTRADATA_SIZE ((sizeof(OMX_OTHER_EXTRADATATYPE) +\ 190 sizeof(OMX_PARAM_PORTDEFINITIONTYPE) + 3)&(~3)) 191 192// Define next macro with required values to enable default extradata, 193// VDEC_EXTRADATA_MB_ERROR_MAP 194// OMX_INTERLACE_EXTRADATA 195// OMX_FRAMEINFO_EXTRADATA 196// OMX_TIMEINFO_EXTRADATA 197 198//#define DEFAULT_EXTRADATA (OMX_FRAMEINFO_EXTRADATA|OMX_INTERLACE_EXTRADATA) 199 200enum port_indexes { 201 OMX_CORE_INPUT_PORT_INDEX =0, 202 OMX_CORE_OUTPUT_PORT_INDEX =1 203}; 204#ifdef USE_ION 205struct vdec_ion { 206 int ion_device_fd; 207 struct ion_fd_data fd_ion_data; 208 struct ion_allocation_data ion_alloc_data; 209}; 210#endif 211 212#ifdef _MSM8974_ 213struct extradata_buffer_info { 214 int buffer_size; 215 char* uaddr; 216 int count; 217 int size; 218#ifdef USE_ION 219 struct vdec_ion ion; 220#endif 221}; 222#endif 223 224struct video_driver_context { 225 int video_driver_fd; 226 enum vdec_codec decoder_format; 227 enum vdec_output_fromat output_format; 228 enum vdec_interlaced_format interlace; 229 enum vdec_output_order picture_order; 230 struct vdec_picsize video_resolution; 231 struct vdec_allocatorproperty ip_buf; 232 struct vdec_allocatorproperty op_buf; 233 struct vdec_bufferpayload *ptr_inputbuffer; 234 struct vdec_bufferpayload *ptr_outputbuffer; 235 struct vdec_output_frameinfo *ptr_respbuffer; 236#ifdef USE_ION 237 struct vdec_ion *ip_buf_ion_info; 238 struct vdec_ion *op_buf_ion_info; 239 struct vdec_ion h264_mv; 240 struct vdec_ion meta_buffer; 241 struct vdec_ion meta_buffer_iommu; 242#endif 243 struct vdec_framerate frame_rate; 244 unsigned extradata; 245 bool timestamp_adjust; 246 char kind[128]; 247 bool idr_only_decoding; 248 unsigned disable_dmx; 249#ifdef _MSM8974_ 250 struct extradata_buffer_info extradata_info; 251 int num_planes; 252#endif 253}; 254 255#ifdef _ANDROID_ 256class DivXDrmDecrypt; 257#endif //_ANDROID_ 258 259// OMX video decoder class 260class omx_vdec: public qc_omx_component 261{ 262 263 public: 264 omx_vdec(); // constructor 265 virtual ~omx_vdec(); // destructor 266 267 static int async_message_process (void *context, void* message); 268 static void process_event_cb(void *ctxt,unsigned char id); 269 270 OMX_ERRORTYPE allocate_buffer( 271 OMX_HANDLETYPE hComp, 272 OMX_BUFFERHEADERTYPE **bufferHdr, 273 OMX_U32 port, 274 OMX_PTR appData, 275 OMX_U32 bytes 276 ); 277 278 279 OMX_ERRORTYPE component_deinit(OMX_HANDLETYPE hComp); 280 281 OMX_ERRORTYPE component_init(OMX_STRING role); 282 283 OMX_ERRORTYPE component_role_enum( 284 OMX_HANDLETYPE hComp, 285 OMX_U8 *role, 286 OMX_U32 index 287 ); 288 289 OMX_ERRORTYPE component_tunnel_request( 290 OMX_HANDLETYPE hComp, 291 OMX_U32 port, 292 OMX_HANDLETYPE peerComponent, 293 OMX_U32 peerPort, 294 OMX_TUNNELSETUPTYPE *tunnelSetup 295 ); 296 297 OMX_ERRORTYPE empty_this_buffer( 298 OMX_HANDLETYPE hComp, 299 OMX_BUFFERHEADERTYPE *buffer 300 ); 301 302 303 304 OMX_ERRORTYPE fill_this_buffer( 305 OMX_HANDLETYPE hComp, 306 OMX_BUFFERHEADERTYPE *buffer 307 ); 308 309 310 OMX_ERRORTYPE free_buffer( 311 OMX_HANDLETYPE hComp, 312 OMX_U32 port, 313 OMX_BUFFERHEADERTYPE *buffer 314 ); 315 316 OMX_ERRORTYPE get_component_version( 317 OMX_HANDLETYPE hComp, 318 OMX_STRING componentName, 319 OMX_VERSIONTYPE *componentVersion, 320 OMX_VERSIONTYPE *specVersion, 321 OMX_UUIDTYPE *componentUUID 322 ); 323 324 OMX_ERRORTYPE get_config( 325 OMX_HANDLETYPE hComp, 326 OMX_INDEXTYPE configIndex, 327 OMX_PTR configData 328 ); 329 330 OMX_ERRORTYPE get_extension_index( 331 OMX_HANDLETYPE hComp, 332 OMX_STRING paramName, 333 OMX_INDEXTYPE *indexType 334 ); 335 336 OMX_ERRORTYPE get_parameter(OMX_HANDLETYPE hComp, 337 OMX_INDEXTYPE paramIndex, 338 OMX_PTR paramData); 339 340 OMX_ERRORTYPE get_state(OMX_HANDLETYPE hComp, 341 OMX_STATETYPE *state); 342 343 344 345 OMX_ERRORTYPE send_command(OMX_HANDLETYPE hComp, 346 OMX_COMMANDTYPE cmd, 347 OMX_U32 param1, 348 OMX_PTR cmdData); 349 350 351 OMX_ERRORTYPE set_callbacks(OMX_HANDLETYPE hComp, 352 OMX_CALLBACKTYPE *callbacks, 353 OMX_PTR appData); 354 355 OMX_ERRORTYPE set_config(OMX_HANDLETYPE hComp, 356 OMX_INDEXTYPE configIndex, 357 OMX_PTR configData); 358 359 OMX_ERRORTYPE set_parameter(OMX_HANDLETYPE hComp, 360 OMX_INDEXTYPE paramIndex, 361 OMX_PTR paramData); 362 363 OMX_ERRORTYPE use_buffer(OMX_HANDLETYPE hComp, 364 OMX_BUFFERHEADERTYPE **bufferHdr, 365 OMX_U32 port, 366 OMX_PTR appData, 367 OMX_U32 bytes, 368 OMX_U8 *buffer); 369 370 OMX_ERRORTYPE use_input_heap_buffers( 371 OMX_HANDLETYPE hComp, 372 OMX_BUFFERHEADERTYPE** bufferHdr, 373 OMX_U32 port, 374 OMX_PTR appData, 375 OMX_U32 bytes, 376 OMX_U8* buffer); 377 378 OMX_ERRORTYPE use_EGL_image(OMX_HANDLETYPE hComp, 379 OMX_BUFFERHEADERTYPE **bufferHdr, 380 OMX_U32 port, 381 OMX_PTR appData, 382 void * eglImage); 383 void complete_pending_buffer_done_cbs(); 384 struct video_driver_context drv_ctx; 385#ifdef _MSM8974_ 386 OMX_ERRORTYPE allocate_extradata(); 387 void free_extradata(); 388 void update_resolution(int width, int height); 389#endif 390 int m_pipe_in; 391 int m_pipe_out; 392 pthread_t msg_thread_id; 393 pthread_t async_thread_id; 394 bool is_component_secure(); 395 396 private: 397 // Bit Positions 398 enum flags_bit_positions { 399 // Defer transition to IDLE 400 OMX_COMPONENT_IDLE_PENDING =0x1, 401 // Defer transition to LOADING 402 OMX_COMPONENT_LOADING_PENDING =0x2, 403 // First Buffer Pending 404 OMX_COMPONENT_FIRST_BUFFER_PENDING =0x3, 405 // Second Buffer Pending 406 OMX_COMPONENT_SECOND_BUFFER_PENDING =0x4, 407 // Defer transition to Enable 408 OMX_COMPONENT_INPUT_ENABLE_PENDING =0x5, 409 // Defer transition to Enable 410 OMX_COMPONENT_OUTPUT_ENABLE_PENDING =0x6, 411 // Defer transition to Disable 412 OMX_COMPONENT_INPUT_DISABLE_PENDING =0x7, 413 // Defer transition to Disable 414 OMX_COMPONENT_OUTPUT_DISABLE_PENDING =0x8, 415 //defer flush notification 416 OMX_COMPONENT_OUTPUT_FLUSH_PENDING =0x9, 417 OMX_COMPONENT_INPUT_FLUSH_PENDING =0xA, 418 OMX_COMPONENT_PAUSE_PENDING =0xB, 419 OMX_COMPONENT_EXECUTE_PENDING =0xC, 420 OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING =0xD, 421 OMX_COMPONENT_DISABLE_OUTPUT_DEFERRED=0xE 422 }; 423 424 // Deferred callback identifiers 425 enum { 426 //Event Callbacks from the vdec component thread context 427 OMX_COMPONENT_GENERATE_EVENT = 0x1, 428 //Buffer Done callbacks from the vdec component thread context 429 OMX_COMPONENT_GENERATE_BUFFER_DONE = 0x2, 430 //Frame Done callbacks from the vdec component thread context 431 OMX_COMPONENT_GENERATE_FRAME_DONE = 0x3, 432 //Buffer Done callbacks from the vdec component thread context 433 OMX_COMPONENT_GENERATE_FTB = 0x4, 434 //Frame Done callbacks from the vdec component thread context 435 OMX_COMPONENT_GENERATE_ETB = 0x5, 436 //Command 437 OMX_COMPONENT_GENERATE_COMMAND = 0x6, 438 //Push-Pending Buffers 439 OMX_COMPONENT_PUSH_PENDING_BUFS = 0x7, 440 // Empty Buffer Done callbacks 441 OMX_COMPONENT_GENERATE_EBD = 0x8, 442 //Flush Event Callbacks from the vdec component thread context 443 OMX_COMPONENT_GENERATE_EVENT_FLUSH = 0x9, 444 OMX_COMPONENT_GENERATE_EVENT_INPUT_FLUSH = 0x0A, 445 OMX_COMPONENT_GENERATE_EVENT_OUTPUT_FLUSH = 0x0B, 446 OMX_COMPONENT_GENERATE_FBD = 0xc, 447 OMX_COMPONENT_GENERATE_START_DONE = 0xD, 448 OMX_COMPONENT_GENERATE_PAUSE_DONE = 0xE, 449 OMX_COMPONENT_GENERATE_RESUME_DONE = 0xF, 450 OMX_COMPONENT_GENERATE_STOP_DONE = 0x10, 451 OMX_COMPONENT_GENERATE_HARDWARE_ERROR = 0x11, 452 OMX_COMPONENT_GENERATE_ETB_ARBITRARY = 0x12, 453 OMX_COMPONENT_GENERATE_PORT_RECONFIG = 0x13, 454 OMX_COMPONENT_GENERATE_EOS_DONE = 0x14, 455 OMX_COMPONENT_GENERATE_INFO_PORT_RECONFIG = 0x15, 456 OMX_COMPONENT_GENERATE_INFO_FIELD_DROPPED = 0x16, 457 }; 458 459 enum vc1_profile_type { 460 VC1_SP_MP_RCV = 1, 461 VC1_AP = 2 462 }; 463 464#ifdef _MSM8974_ 465 enum v4l2_ports { 466 CAPTURE_PORT, 467 OUTPUT_PORT, 468 MAX_PORT 469 }; 470#endif 471 472 struct omx_event { 473 unsigned param1; 474 unsigned param2; 475 unsigned id; 476 }; 477 478 struct omx_cmd_queue { 479 omx_event m_q[OMX_CORE_CONTROL_CMDQ_SIZE]; 480 unsigned m_read; 481 unsigned m_write; 482 unsigned m_size; 483 484 omx_cmd_queue(); 485 ~omx_cmd_queue(); 486 bool insert_entry(unsigned p1, unsigned p2, unsigned id); 487 bool pop_entry(unsigned *p1,unsigned *p2, unsigned *id); 488 // get msgtype of the first ele from the queue 489 unsigned get_q_msg_type(); 490 491 }; 492 493#ifdef _ANDROID_ 494 struct ts_entry { 495 OMX_TICKS timestamp; 496 bool valid; 497 }; 498 499 struct ts_arr_list { 500 ts_entry m_ts_arr_list[MAX_NUM_INPUT_OUTPUT_BUFFERS]; 501 502 ts_arr_list(); 503 ~ts_arr_list(); 504 505 bool insert_ts(OMX_TICKS ts); 506 bool pop_min_ts(OMX_TICKS &ts); 507 bool reset_ts_list(); 508 }; 509#endif 510 511 struct desc_buffer_hdr { 512 OMX_U8 *buf_addr; 513 OMX_U32 desc_data_size; 514 }; 515 bool allocate_done(void); 516 bool allocate_input_done(void); 517 bool allocate_output_done(void); 518 519 OMX_ERRORTYPE free_input_buffer(OMX_BUFFERHEADERTYPE *bufferHdr); 520 OMX_ERRORTYPE free_input_buffer(unsigned int bufferindex, 521 OMX_BUFFERHEADERTYPE *pmem_bufferHdr); 522 OMX_ERRORTYPE free_output_buffer(OMX_BUFFERHEADERTYPE *bufferHdr); 523 void free_output_buffer_header(); 524 void free_input_buffer_header(); 525 526 OMX_ERRORTYPE allocate_input_heap_buffer(OMX_HANDLETYPE hComp, 527 OMX_BUFFERHEADERTYPE **bufferHdr, 528 OMX_U32 port, 529 OMX_PTR appData, 530 OMX_U32 bytes); 531 532 533 OMX_ERRORTYPE allocate_input_buffer(OMX_HANDLETYPE hComp, 534 OMX_BUFFERHEADERTYPE **bufferHdr, 535 OMX_U32 port, 536 OMX_PTR appData, 537 OMX_U32 bytes); 538 539 OMX_ERRORTYPE allocate_output_buffer(OMX_HANDLETYPE hComp, 540 OMX_BUFFERHEADERTYPE **bufferHdr, 541 OMX_U32 port,OMX_PTR appData, 542 OMX_U32 bytes); 543 OMX_ERRORTYPE use_output_buffer(OMX_HANDLETYPE hComp, 544 OMX_BUFFERHEADERTYPE **bufferHdr, 545 OMX_U32 port, 546 OMX_PTR appData, 547 OMX_U32 bytes, 548 OMX_U8 *buffer); 549#ifdef MAX_RES_720P 550 OMX_ERRORTYPE get_supported_profile_level_for_720p(OMX_VIDEO_PARAM_PROFILELEVELTYPE *profileLevelType); 551#endif 552#ifdef MAX_RES_1080P 553 OMX_ERRORTYPE get_supported_profile_level_for_1080p(OMX_VIDEO_PARAM_PROFILELEVELTYPE *profileLevelType); 554#endif 555 556 OMX_ERRORTYPE allocate_desc_buffer(OMX_U32 index); 557 OMX_ERRORTYPE allocate_output_headers(); 558 bool execute_omx_flush(OMX_U32); 559 bool execute_output_flush(); 560 bool execute_input_flush(); 561 OMX_ERRORTYPE empty_buffer_done(OMX_HANDLETYPE hComp, 562 OMX_BUFFERHEADERTYPE * buffer); 563 564 OMX_ERRORTYPE fill_buffer_done(OMX_HANDLETYPE hComp, 565 OMX_BUFFERHEADERTYPE * buffer); 566 OMX_ERRORTYPE empty_this_buffer_proxy(OMX_HANDLETYPE hComp, 567 OMX_BUFFERHEADERTYPE *buffer); 568 569 OMX_ERRORTYPE empty_this_buffer_proxy_arbitrary(OMX_HANDLETYPE hComp, 570 OMX_BUFFERHEADERTYPE *buffer 571 ); 572 573 OMX_ERRORTYPE push_input_buffer (OMX_HANDLETYPE hComp); 574 OMX_ERRORTYPE push_input_sc_codec (OMX_HANDLETYPE hComp); 575 OMX_ERRORTYPE push_input_h264 (OMX_HANDLETYPE hComp); 576 OMX_ERRORTYPE push_input_hevc (OMX_HANDLETYPE hComp); 577 OMX_ERRORTYPE push_input_vc1 (OMX_HANDLETYPE hComp); 578 579 OMX_ERRORTYPE fill_this_buffer_proxy(OMX_HANDLETYPE hComp, 580 OMX_BUFFERHEADERTYPE *buffer); 581 bool release_done(); 582 583 bool release_output_done(); 584 bool release_input_done(); 585 OMX_ERRORTYPE get_buffer_req(vdec_allocatorproperty *buffer_prop); 586 OMX_ERRORTYPE set_buffer_req(vdec_allocatorproperty *buffer_prop); 587 OMX_ERRORTYPE start_port_reconfig(); 588 OMX_ERRORTYPE update_picture_resolution(); 589 int stream_off(OMX_U32 port); 590 void adjust_timestamp(OMX_S64 &act_timestamp); 591 void set_frame_rate(OMX_S64 act_timestamp); 592 void handle_extradata_secure(OMX_BUFFERHEADERTYPE *p_buf_hdr); 593 void handle_extradata(OMX_BUFFERHEADERTYPE *p_buf_hdr); 594 void print_debug_extradata(OMX_OTHER_EXTRADATATYPE *extra); 595#ifdef _MSM8974_ 596 void append_interlace_extradata(OMX_OTHER_EXTRADATATYPE *extra, 597 OMX_U32 interlaced_format_type); 598 OMX_ERRORTYPE enable_extradata(OMX_U32 requested_extradata, bool is_internal, 599 bool enable = true); 600 void append_frame_info_extradata(OMX_OTHER_EXTRADATATYPE *extra, 601 OMX_U32 num_conceal_mb, 602 OMX_U32 picture_type, 603 OMX_U32 frame_rate, 604 struct msm_vidc_panscan_window_payload *panscan_payload, 605 struct vdec_aspectratioinfo *aspect_ratio_info); 606#else 607 void append_interlace_extradata(OMX_OTHER_EXTRADATATYPE *extra, 608 OMX_U32 interlaced_format_type, OMX_U32 buf_index); 609 OMX_ERRORTYPE enable_extradata(OMX_U32 requested_extradata, bool enable = true); 610#endif 611 void append_frame_info_extradata(OMX_OTHER_EXTRADATATYPE *extra, 612 OMX_U32 num_conceal_mb, 613 OMX_U32 picture_type, 614 OMX_S64 timestamp, 615 OMX_U32 frame_rate, 616 struct vdec_aspectratioinfo *aspect_ratio_info); 617 void fill_aspect_ratio_info(struct vdec_aspectratioinfo *aspect_ratio_info, 618 OMX_QCOM_EXTRADATA_FRAMEINFO *frame_info); 619 void append_terminator_extradata(OMX_OTHER_EXTRADATATYPE *extra); 620 OMX_ERRORTYPE update_portdef(OMX_PARAM_PORTDEFINITIONTYPE *portDefn); 621 void append_portdef_extradata(OMX_OTHER_EXTRADATATYPE *extra); 622 void append_extn_extradata(OMX_OTHER_EXTRADATATYPE *extra, OMX_OTHER_EXTRADATATYPE *p_extn); 623 void append_user_extradata(OMX_OTHER_EXTRADATATYPE *extra, OMX_OTHER_EXTRADATATYPE *p_user); 624 void insert_demux_addr_offset(OMX_U32 address_offset); 625 void extract_demux_addr_offsets(OMX_BUFFERHEADERTYPE *buf_hdr); 626 OMX_ERRORTYPE handle_demux_data(OMX_BUFFERHEADERTYPE *buf_hdr); 627 OMX_U32 count_MB_in_extradata(OMX_OTHER_EXTRADATATYPE *extra); 628 629 bool align_pmem_buffers(int pmem_fd, OMX_U32 buffer_size, 630 OMX_U32 alignment); 631#ifdef USE_ION 632 int alloc_map_ion_memory(OMX_U32 buffer_size, 633 OMX_U32 alignment, struct ion_allocation_data *alloc_data, 634 struct ion_fd_data *fd_data,int flag); 635 void free_ion_memory(struct vdec_ion *buf_ion_info); 636#endif 637 638 639 OMX_ERRORTYPE send_command_proxy(OMX_HANDLETYPE hComp, 640 OMX_COMMANDTYPE cmd, 641 OMX_U32 param1, 642 OMX_PTR cmdData); 643 bool post_event( unsigned int p1, 644 unsigned int p2, 645 unsigned int id 646 ); 647 inline int clip2(int x) { 648 x = x -1; 649 x = x | x >> 1; 650 x = x | x >> 2; 651 x = x | x >> 4; 652 x = x | x >> 16; 653 x = x + 1; 654 return x; 655 } 656 657#ifdef MAX_RES_1080P 658 OMX_ERRORTYPE vdec_alloc_h264_mv(); 659 void vdec_dealloc_h264_mv(); 660 OMX_ERRORTYPE vdec_alloc_meta_buffers(); 661 void vdec_dealloc_meta_buffers(); 662#endif 663 664 inline void omx_report_error () { 665 if (m_cb.EventHandler && !m_error_propogated) { 666 ALOGE("\nERROR: Sending OMX_EventError to Client"); 667 m_error_propogated = true; 668 m_cb.EventHandler(&m_cmp,m_app_data, 669 OMX_EventError,OMX_ErrorHardware,0,NULL); 670 } 671 } 672#ifdef _ANDROID_ 673 OMX_ERRORTYPE createDivxDrmContext(); 674#endif //_ANDROID_ 675#if defined (_ANDROID_HONEYCOMB_) || defined (_ANDROID_ICS_) 676 OMX_ERRORTYPE use_android_native_buffer(OMX_IN OMX_HANDLETYPE hComp, OMX_PTR data); 677#endif 678#if defined (_ANDROID_ICS_) 679 struct nativebuffer { 680 native_handle_t *nativehandle; 681 private_handle_t *privatehandle; 682 int inuse; 683 }; 684 nativebuffer native_buffer[MAX_NUM_INPUT_OUTPUT_BUFFERS]; 685#endif 686 687 688 //************************************************************* 689 //*******************MEMBER VARIABLES ************************* 690 //************************************************************* 691 pthread_mutex_t m_lock; 692 pthread_mutex_t c_lock; 693 //sem to handle the minimum procesing of commands 694 sem_t m_cmd_lock; 695 bool m_error_propogated; 696 // compression format 697 OMX_VIDEO_CODINGTYPE eCompressionFormat; 698 // OMX State 699 OMX_STATETYPE m_state; 700 // Application data 701 OMX_PTR m_app_data; 702 // Application callbacks 703 OMX_CALLBACKTYPE m_cb; 704 OMX_PRIORITYMGMTTYPE m_priority_mgm ; 705 OMX_PARAM_BUFFERSUPPLIERTYPE m_buffer_supplier; 706 // fill this buffer queue 707 omx_cmd_queue m_ftb_q; 708 // Command Q for rest of the events 709 omx_cmd_queue m_cmd_q; 710 omx_cmd_queue m_etb_q; 711 // Input memory pointer 712 OMX_BUFFERHEADERTYPE *m_inp_mem_ptr; 713 // Output memory pointer 714 OMX_BUFFERHEADERTYPE *m_out_mem_ptr; 715 // number of input bitstream error frame count 716 unsigned int m_inp_err_count; 717#ifdef _ANDROID_ 718 // Timestamp list 719 ts_arr_list m_timestamp_list; 720#endif 721 722 bool input_flush_progress; 723 bool output_flush_progress; 724 bool input_use_buffer; 725 bool output_use_buffer; 726 bool ouput_egl_buffers; 727 OMX_BOOL m_use_output_pmem; 728 OMX_BOOL m_out_mem_region_smi; 729 OMX_BOOL m_out_pvt_entry_pmem; 730 731 int pending_input_buffers; 732 int pending_output_buffers; 733 // bitmask array size for output side 734 unsigned int m_out_bm_count; 735 // bitmask array size for input side 736 unsigned int m_inp_bm_count; 737 //Input port Populated 738 OMX_BOOL m_inp_bPopulated; 739 //Output port Populated 740 OMX_BOOL m_out_bPopulated; 741 // encapsulate the waiting states. 742 unsigned int m_flags; 743 744#ifdef _ANDROID_ 745 // Heap pointer to frame buffers 746 struct vidc_heap { 747 sp<MemoryHeapBase> video_heap_ptr; 748 }; 749 struct vidc_heap *m_heap_ptr; 750 unsigned int m_heap_count; 751#endif //_ANDROID_ 752 // store I/P PORT state 753 OMX_BOOL m_inp_bEnabled; 754 // store O/P PORT state 755 OMX_BOOL m_out_bEnabled; 756 OMX_U32 m_in_alloc_cnt; 757 OMX_U8 m_cRole[OMX_MAX_STRINGNAME_SIZE]; 758 // Platform specific details 759 OMX_QCOM_PLATFORM_PRIVATE_LIST *m_platform_list; 760 OMX_QCOM_PLATFORM_PRIVATE_ENTRY *m_platform_entry; 761 OMX_QCOM_PLATFORM_PRIVATE_PMEM_INFO *m_pmem_info; 762 // SPS+PPS sent as part of set_config 763 OMX_VENDOR_EXTRADATATYPE m_vendor_config; 764 765 /*Variables for arbitrary Byte parsing support*/ 766 frame_parse m_frame_parser; 767 omx_cmd_queue m_input_pending_q; 768 omx_cmd_queue m_input_free_q; 769 bool arbitrary_bytes; 770 OMX_BUFFERHEADERTYPE h264_scratch; 771 OMX_BUFFERHEADERTYPE *psource_frame; 772 OMX_BUFFERHEADERTYPE *pdest_frame; 773 OMX_BUFFERHEADERTYPE *m_inp_heap_ptr; 774 OMX_BUFFERHEADERTYPE **m_phdr_pmem_ptr; 775 unsigned int m_heap_inp_bm_count; 776 codec_type codec_type_parse; 777 bool first_frame_meta; 778 unsigned frame_count; 779 unsigned nal_count; 780 unsigned nal_length; 781 bool look_ahead_nal; 782 int first_frame; 783 unsigned char *first_buffer; 784 int first_frame_size; 785 unsigned char m_hwdevice_name[80]; 786 FILE *m_device_file_ptr; 787 enum vc1_profile_type m_vc1_profile; 788 OMX_S64 h264_last_au_ts; 789 OMX_U32 h264_last_au_flags; 790 OMX_U32 m_demux_offsets[8192]; 791 OMX_U32 m_demux_entries; 792 OMX_U32 m_disp_hor_size; 793 OMX_U32 m_disp_vert_size; 794 795 OMX_S64 prev_ts; 796 bool rst_prev_ts; 797 OMX_U32 frm_int; 798 799 struct vdec_allocatorproperty op_buf_rcnfg; 800 bool in_reconfig; 801 OMX_NATIVE_WINDOWTYPE m_display_id; 802 h264_stream_parser *h264_parser; 803 OMX_U32 client_extradata; 804#ifdef _ANDROID_ 805 bool m_debug_timestamp; 806 bool perf_flag; 807 OMX_U32 proc_frms, latency; 808 perf_metrics fps_metrics; 809 perf_metrics dec_time; 810 bool m_enable_android_native_buffers; 811 bool m_use_android_native_buffers; 812 bool m_debug_extradata; 813 bool m_debug_concealedmb; 814#endif 815#ifdef MAX_RES_1080P 816 MP4_Utils mp4_headerparser; 817#endif 818 819 struct h264_mv_buffer { 820 unsigned char* buffer; 821 int size; 822 int count; 823 int pmem_fd; 824 int offset; 825 }; 826 h264_mv_buffer h264_mv_buff; 827 828 struct meta_buffer { 829 unsigned char* buffer; 830 int size; 831 int count; 832 int pmem_fd; 833 int pmem_fd_iommu; 834 int offset; 835 }; 836 meta_buffer meta_buff; 837 extra_data_handler extra_data_handle; 838#ifdef _ANDROID_ 839 DivXDrmDecrypt* iDivXDrmDecrypt; 840#endif //_ANDROID_ 841 OMX_PARAM_PORTDEFINITIONTYPE m_port_def; 842 omx_time_stamp_reorder time_stamp_dts; 843 desc_buffer_hdr *m_desc_buffer_ptr; 844 bool secure_mode; 845 bool external_meta_buffer; 846 bool external_meta_buffer_iommu; 847 OMX_QCOM_EXTRADATA_FRAMEINFO *m_extradata; 848 bool codec_config_flag; 849#ifdef _MSM8974_ 850 int capture_capability; 851 int output_capability; 852 bool streaming[MAX_PORT]; 853 OMX_CONFIG_RECTTYPE rectangle; 854#endif 855 bool m_power_hinted; 856 OMX_ERRORTYPE power_module_register(); 857 OMX_ERRORTYPE power_module_deregister(); 858 bool msg_thread_created; 859 bool async_thread_created; 860 861 unsigned int m_fill_output_msg; 862 class allocate_color_convert_buf 863 { 864 public: 865 allocate_color_convert_buf(); 866 ~allocate_color_convert_buf(); 867 void set_vdec_client(void *); 868 void update_client(); 869 bool set_color_format(OMX_COLOR_FORMATTYPE dest_color_format); 870 bool get_color_format(OMX_COLOR_FORMATTYPE &dest_color_format); 871 bool update_buffer_req(); 872 bool get_buffer_req(unsigned int &buffer_size); 873 OMX_BUFFERHEADERTYPE* get_il_buf_hdr(); 874 OMX_BUFFERHEADERTYPE* get_il_buf_hdr(OMX_BUFFERHEADERTYPE *input_hdr); 875 OMX_BUFFERHEADERTYPE* get_dr_buf_hdr(OMX_BUFFERHEADERTYPE *input_hdr); 876 OMX_BUFFERHEADERTYPE* convert(OMX_BUFFERHEADERTYPE *header); 877 OMX_BUFFERHEADERTYPE* queue_buffer(OMX_BUFFERHEADERTYPE *header); 878 OMX_ERRORTYPE allocate_buffers_color_convert(OMX_HANDLETYPE hComp, 879 OMX_BUFFERHEADERTYPE **bufferHdr,OMX_U32 port,OMX_PTR appData, 880 OMX_U32 bytes); 881 OMX_ERRORTYPE free_output_buffer(OMX_BUFFERHEADERTYPE *bufferHdr); 882 private: 883#define MAX_COUNT 32 884 omx_vdec *omx; 885 bool enabled; 886 OMX_COLOR_FORMATTYPE ColorFormat; 887 void init_members(); 888 bool color_convert_mode; 889 ColorConvertFormat dest_format; 890 class omx_c2d_conv c2d; 891 unsigned int allocated_count; 892 unsigned int buffer_size_req; 893 unsigned int buffer_alignment_req; 894 OMX_QCOM_PLATFORM_PRIVATE_LIST m_platform_list_client[MAX_COUNT]; 895 OMX_QCOM_PLATFORM_PRIVATE_ENTRY m_platform_entry_client[MAX_COUNT]; 896 OMX_QCOM_PLATFORM_PRIVATE_PMEM_INFO m_pmem_info_client[MAX_COUNT]; 897 OMX_BUFFERHEADERTYPE m_out_mem_ptr_client[MAX_COUNT]; 898#ifdef USE_ION 899 struct vdec_ion op_buf_ion_info[MAX_COUNT]; 900#endif 901 unsigned char *pmem_baseaddress[MAX_COUNT]; 902 int pmem_fd[MAX_COUNT]; 903 struct vidc_heap { 904 sp<MemoryHeapBase> video_heap_ptr; 905 }; 906 struct vidc_heap m_heap_ptr[MAX_COUNT]; 907 }; 908#if defined (_MSM8960_) || defined (_MSM8974_) 909 allocate_color_convert_buf client_buffers; 910#endif 911 HEVC_Utils mHEVCutils; 912}; 913 914#ifdef _MSM8974_ 915enum instance_state { 916 MSM_VIDC_CORE_UNINIT_DONE = 0x0001, 917 MSM_VIDC_CORE_INIT, 918 MSM_VIDC_CORE_INIT_DONE, 919 MSM_VIDC_OPEN, 920 MSM_VIDC_OPEN_DONE, 921 MSM_VIDC_LOAD_RESOURCES, 922 MSM_VIDC_LOAD_RESOURCES_DONE, 923 MSM_VIDC_START, 924 MSM_VIDC_START_DONE, 925 MSM_VIDC_STOP, 926 MSM_VIDC_STOP_DONE, 927 MSM_VIDC_RELEASE_RESOURCES, 928 MSM_VIDC_RELEASE_RESOURCES_DONE, 929 MSM_VIDC_CLOSE, 930 MSM_VIDC_CLOSE_DONE, 931 MSM_VIDC_CORE_UNINIT, 932}; 933 934enum vidc_resposes_id { 935 MSM_VIDC_DECODER_FLUSH_DONE = 0x11, 936 MSM_VIDC_DECODER_EVENT_CHANGE, 937}; 938 939#endif // _MSM8974_ 940 941#endif // __OMX_VDEC_H__ 942